[intel-lts:5.10/KMB-yocto 58/62] drivers/spi/spi-dw-core.c:507:9: error: implicit declaration of function 'dw_spi_dual_quad_config'; did you mean 'dw_spi_update_config'?

[intel-lts:5.10/KMB-yocto 58/62] drivers/spi/spi-dw-core.c:507:9: error: implicit declaration of function 'dw_spi_dual_quad_config'; did you mean 'dw_spi_update_config'?

[kernel test robot]

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tree:   https://github.com/intel/linux-intel-lts.git 5.10/KMB-yocto
head:   afd0620ed0e5ce91d03f51deb2e551721ba97640
commit: de6f8390867e1796aa6ad8d0603a8c7676e54fac [58/62] SPI DUAL QUAD mode fixes for Designware SPI
config: sparc-randconfig-r001-20211207 (https://download.01.org/0day-ci/archive/20211209/202112090029.GAo9Vr3z-lkp(a)intel.com/config)
compiler: sparc-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel/linux-intel-lts/commit/de6f8390867e1796aa6ad8d0603a8c7676e54fac
        git remote add intel-lts https://github.com/intel/linux-intel-lts.git
        git fetch --no-tags intel-lts 5.10/KMB-yocto
        git checkout de6f8390867e1796aa6ad8d0603a8c7676e54fac
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=sparc SHELL=/bin/bash drivers/spi/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/spi/spi-dw-core.c: In function 'dw_spi_transfer_one':
>> drivers/spi/spi-dw-core.c:507:9: error: implicit declaration of function 'dw_spi_dual_quad_config'; did you mean 'dw_spi_update_config'? [-Werror=implicit-function-declaration]
     507 |         dw_spi_dual_quad_config(dws, spi, &cfg, transfer);
         |         ^~~~~~~~~~~~~~~~~~~~~~~
         |         dw_spi_update_config
   cc1: some warnings being treated as errors


vim +507 drivers/spi/spi-dw-core.c

   478	
   479	static int dw_spi_transfer_one(struct spi_controller *master,
   480			struct spi_device *spi, struct spi_transfer *transfer)
   481	{
   482		struct dw_spi *dws = spi_controller_get_devdata(master);
   483		struct dw_spi_cfg cfg = {
   484			.tmode = SPI_TMOD_TR,
   485			.dfs = transfer->bits_per_word,
   486			.freq = transfer->speed_hz,
   487		};
   488		int ret;
   489	
   490		dws->dma_mapped = 0;
   491		dws->n_bytes = DIV_ROUND_UP(transfer->bits_per_word, BITS_PER_BYTE);
   492		dws->tx = (void *)transfer->tx_buf;
   493		dws->rx = transfer->rx_buf;
   494		dws->tx_len = transfer->len / dws->n_bytes;
   495		if (dws->rx)
   496			dws->rx_len = dws->tx_len;
   497		else {
   498			cfg.tmode = SPI_TMOD_TO;
   499			dws->rx_len = 0;
   500		}
   501	
   502		/* Ensure the data above is visible for all CPUs */
   503		smp_mb();
   504	
   505		spi_enable_chip(dws, 0);
   506	
 > 507		dw_spi_dual_quad_config(dws, spi, &cfg, transfer);
   508	
   509		dw_spi_update_config(dws, spi, &cfg);
   510	
   511		transfer->effective_speed_hz = dws->current_freq;
   512	
   513		/* Check if current transfer is a DMA transaction */
   514		if (master->can_dma && master->can_dma(master, spi, transfer))
   515			dws->dma_mapped = master->cur_msg_mapped;
   516	
   517		/* For poll mode just disable all interrupts */
   518		spi_mask_intr(dws, 0xff);
   519	
   520		if (dws->dma_mapped) {
   521			ret = dws->dma_ops->dma_setup(dws, transfer);
   522			if (ret)
   523				return ret;
   524		}
   525	
   526		spi_enable_chip(dws, 1);
   527	
   528		if (dws->dma_mapped)
   529			return dws->dma_ops->dma_transfer(dws, transfer);
   530		else if (dws->irq == IRQ_NOTCONNECTED)
   531			return dw_spi_poll_transfer(dws, transfer);
   532	
   533		dw_spi_irq_setup(dws);
   534	
   535		return 1;
   536	}
   537	

---
0-DAY CI Kernel Test Service, Intel Corporation
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