[igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Mastan Katragadda]

This test makes assumptions about the backend scheduling algorithm that
a real world UMD would never assume. This test is not testing a UMD-KMD
contract, rather a specific backend.It is an invalid test case thus we
are skipping.

Changes Since v1:
             -Updated commit message

Cc: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
---
 tests/i915/gem_exec_balancer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index cc07a5a9..d58734ab 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -3320,6 +3320,7 @@ igt_main
 
 	igt_subtest_group {
 		igt_fixture {
+			igt_require(!gem_using_guc_submission(i915));
 			intel_allocator_multiprocess_start();
 		}
 
-- 
2.25.1

[igt-dev] ✓ Fi.CI.BAT: success for tests/i915/exec_balancer: Added Skip Guc Submission (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5518 bytes --]

== Series Details ==

Series: tests/i915/exec_balancer: Added Skip Guc Submission (rev3)
URL   : https://patchwork.freedesktop.org/series/97304/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10984 -> IGTPW_6484
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/index.html

Participating hosts (44 -> 36)
------------------------------

  Additional (1): fi-kbl-soraka 
  Missing    (9): fi-ilk-m540 bat-dg1-6 fi-hsw-4200u fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 bat-jsl-2 fi-bdw-samus 

Known issues
------------

  Here are the changes found in IGTPW_6484 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fence@basic-busy@bcs0:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +8 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-7567u:       [PASS][4] -> [DMESG-FAIL][5] ([i915#2291] / [i915#541])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][6] ([i915#1886] / [i915#2291])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#533])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
    - fi-skl-6600u:       [PASS][9] -> [FAIL][10] ([i915#4547])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@runner@aborted:
    - fi-skl-6600u:       NOTRUN -> [FAIL][11] ([i915#3363] / [i915#4312])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-skl-6600u/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-glk-dsi:         [DMESG-WARN][12] ([i915#2943]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-glk-dsi/igt@gem_exec_suspend@basic-s0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-glk-dsi/igt@gem_exec_suspend@basic-s0.html
    - fi-tgl-1115g4:      [FAIL][14] ([i915#1888]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-cml-u2:          [DMESG-WARN][16] ([i915#4269]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6304 -> IGTPW_6484

  CI-20190529: 20190529
  CI_DRM_10984: d7b5243a6417de5fc244d7dc45109f6835aa7c88 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6484: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/index.html
  IGT_6304: ef0df2fbe5847fe5c4426b8a86a0b101588d0586 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/index.html

[-- Attachment #2: Type: text/html, Size: 6729 bytes --]

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Matthew Brost]

On Thu, Dec 09, 2021 at 01:50:53PM +0530, Mastan Katragadda wrote:
> This test makes assumptions about the backend scheduling algorithm that
> a real world UMD would never assume. This test is not testing a UMD-KMD
> contract, rather a specific backend.It is an invalid test case thus we
> are skipping.
> 
> Changes Since v1:
>              -Updated commit message
> 
> Cc: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  tests/i915/gem_exec_balancer.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
> index cc07a5a9..d58734ab 100644
> --- a/tests/i915/gem_exec_balancer.c
> +++ b/tests/i915/gem_exec_balancer.c
> @@ -3320,6 +3320,7 @@ igt_main
>  
>  	igt_subtest_group {
>  		igt_fixture {
> +			igt_require(!gem_using_guc_submission(i915));
>  			intel_allocator_multiprocess_start();
>  		}
>  
> -- 
> 2.25.1
> 

[igt-dev] ✓ Fi.CI.IGT: success for tests/i915/exec_balancer: Added Skip Guc Submission (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30276 bytes --]

== Series Details ==

Series: tests/i915/exec_balancer: Added Skip Guc Submission (rev3)
URL   : https://patchwork.freedesktop.org/series/97304/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10984_full -> IGTPW_6484_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/index.html

Participating hosts (10 -> 7)
------------------------------

  Missing    (3): pig-skl-6260u pig-glk-j5005 shard-rkl 

Known issues
------------

  Here are the changes found in IGTPW_6484_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][1] ([i915#3002])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl7/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@hang:
    - shard-snb:          NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-snb5/igt@gem_ctx_persistence@hang.html

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [PASS][3] -> [TIMEOUT][4] ([i915#2481] / [i915#3070])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb7/igt@gem_eio@unwedge-stress.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb5/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-tglb:         NOTRUN -> [SKIP][5] ([i915#4525]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         NOTRUN -> [SKIP][6] ([i915#4525]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][7] -> [FAIL][8] ([i915#2846])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk2/igt@gem_exec_fair@basic-deadline.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          NOTRUN -> [FAIL][9] ([i915#2842])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][10] ([i915#2842]) +4 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk6/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_whisper@basic-queues-forked-all:
    - shard-glk:          [PASS][15] -> [DMESG-WARN][16] ([i915#118]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk6/igt@gem_exec_whisper@basic-queues-forked-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk5/igt@gem_exec_whisper@basic-queues-forked-all.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][17] -> [SKIP][18] ([i915#2190])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb1/igt@gem_huc_copy@huc-copy.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl2/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_lmem_swapping@verify:
    - shard-apl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl3/igt@gem_lmem_swapping@verify.html

  * igt@gem_mmap_gtt@coherency:
    - shard-tglb:         NOTRUN -> [SKIP][21] ([fdo#111656])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@gem_mmap_gtt@coherency.html

  * igt@gem_pxp@fail-invalid-protected-context:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#4270])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb1/igt@gem_pxp@fail-invalid-protected-context.html
    - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#4270])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb1/igt@gem_pxp@fail-invalid-protected-context.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([i915#768])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb5/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_softpin@evict-snoop:
    - shard-iclb:         NOTRUN -> [SKIP][25] ([fdo#109312])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@gem_softpin@evict-snoop.html
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109312])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@input-checking:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][27] ([i915#3002])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl3/igt@gem_userptr_blits@input-checking.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#3297])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@gem_userptr_blits@readonly-unsync.html
    - shard-iclb:         NOTRUN -> [SKIP][29] ([i915#3297])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-kbl:          NOTRUN -> [FAIL][30] ([i915#3318])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl2/igt@gem_userptr_blits@vma-merge.html

  * igt@gen9_exec_parse@cmd-crossing-page:
    - shard-tglb:         NOTRUN -> [SKIP][31] ([i915#2856])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb6/igt@gen9_exec_parse@cmd-crossing-page.html
    - shard-iclb:         NOTRUN -> [SKIP][32] ([i915#2856])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb2/igt@gen9_exec_parse@cmd-crossing-page.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([i915#454])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-tglb:         NOTRUN -> [SKIP][35] ([fdo#109506] / [i915#2411])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb5/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_suspend@debugfs-reader:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][36] ([i915#180]) +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@i915_suspend@debugfs-reader.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-iclb:         NOTRUN -> [SKIP][37] ([i915#1769])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
    - shard-tglb:         NOTRUN -> [SKIP][38] ([i915#1769])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][39] ([fdo#110725] / [fdo#111614])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@kms_big_fb@linear-32bpp-rotate-270.html
    - shard-tglb:         NOTRUN -> [SKIP][40] ([fdo#111614])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb6/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-glk:          [PASS][41] -> [FAIL][42] ([i915#1888] / [i915#3653])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk3/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk3/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3777]) +4 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([fdo#111615])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb2/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3777])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#3886]) +8 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl4/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
    - shard-glk:          NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +3 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk4/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([i915#3689]) +2 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb8/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#111615] / [i915#3689]) +4 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@kms_ccs@pipe-b-crc-primary-basic-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([fdo#109278]) +21 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109278] / [i915#3886]) +5 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
    - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#3886]) +9 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3689] / [i915#3886]) +2 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109284] / [fdo#111827]) +7 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb4/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_chamelium@hdmi-edid-change-during-suspend:
    - shard-apl:          NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +9 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl4/igt@kms_chamelium@hdmi-edid-change-during-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-0-75:
    - shard-kbl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
    - shard-tglb:         NOTRUN -> [SKIP][57] ([fdo#109284] / [fdo#111827]) +7 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
    - shard-snb:          NOTRUN -> [SKIP][58] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-c-ctm-0-75:
    - shard-glk:          NOTRUN -> [SKIP][59] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk7/igt@kms_color_chamelium@pipe-c-ctm-0-75.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][60] ([i915#1319])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl6/igt@kms_content_protection@lic.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen:
    - shard-iclb:         NOTRUN -> [SKIP][61] ([fdo#109278] / [fdo#109279])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb1/igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-random:
    - shard-tglb:         NOTRUN -> [SKIP][62] ([i915#3319])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-32x32-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][63] ([i915#3359]) +5 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x170-sliding:
    - shard-tglb:         NOTRUN -> [SKIP][64] ([fdo#109279] / [i915#3359])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-512x170-sliding.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-tglb:         NOTRUN -> [SKIP][65] ([i915#4103])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-iclb:         NOTRUN -> [SKIP][66] ([fdo#109274] / [fdo#109278]) +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_dsc@basic-dsc-enable:
    - shard-iclb:         NOTRUN -> [SKIP][67] ([i915#3840])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb4/igt@kms_dsc@basic-dsc-enable.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][68] -> [INCOMPLETE][69] ([i915#180] / [i915#1982])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([fdo#109274]) +6 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb8/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][71] ([fdo#109280]) +9 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-kbl:          NOTRUN -> [SKIP][72] ([fdo#109271]) +191 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [PASS][73] -> [DMESG-WARN][74] ([i915#180]) +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-tglb:         NOTRUN -> [SKIP][75] ([fdo#111825]) +16 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          [PASS][76] -> [DMESG-WARN][77] ([i915#180]) +2 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl3/igt@kms_hdr@bpc-switch-suspend.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-kbl:          NOTRUN -> [FAIL][78] ([fdo#108145] / [i915#265])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_cursor@pipe-d-viewport-size-256:
    - shard-glk:          NOTRUN -> [SKIP][79] ([fdo#109271]) +36 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk2/igt@kms_plane_cursor@pipe-d-viewport-size-256.html

  * igt@kms_plane_lowres@pipe-c-tiling-none:
    - shard-iclb:         NOTRUN -> [SKIP][80] ([i915#3536])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
    - shard-tglb:         NOTRUN -> [SKIP][81] ([i915#3536])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@kms_plane_lowres@pipe-c-tiling-none.html

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([fdo#111615] / [fdo#112054])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb1/igt@kms_plane_multiple@atomic-pipe-b-tiling-yf.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-kbl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2733])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-tglb:         NOTRUN -> [SKIP][84] ([i915#2920])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglb:         NOTRUN -> [SKIP][85] ([i915#1911])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb8/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-kbl:          NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#658]) +3 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl1/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-apl:          NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#658]) +3 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl3/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-glk:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk5/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-iclb:         NOTRUN -> [SKIP][89] ([i915#658])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb4/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         NOTRUN -> [SKIP][90] ([fdo#109441])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb8/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][91] -> [SKIP][92] ([fdo#109441])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_selftest@all@check_plane_state:
    - shard-kbl:          NOTRUN -> [INCOMPLETE][93] ([i915#4663])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl3/igt@kms_selftest@all@check_plane_state.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#533]) +2 similar issues
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl2/igt@kms_vblank@pipe-d-wait-idle.html
    - shard-apl:          NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#533]) +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl2/igt@kms_vblank@pipe-d-wait-idle.html
    - shard-glk:          NOTRUN -> [SKIP][96] ([fdo#109271] / [i915#533]) +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk9/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@nouveau_crc@pipe-c-ctx-flip-detection:
    - shard-iclb:         NOTRUN -> [SKIP][97] ([i915#2530])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb7/igt@nouveau_crc@pipe-c-ctx-flip-detection.html

  * igt@perf@gen12-oa-tlb-invalidate:
    - shard-iclb:         NOTRUN -> [SKIP][98] ([fdo#109289]) +1 similar issue
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@perf@gen12-oa-tlb-invalidate.html

  * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
    - shard-apl:          NOTRUN -> [SKIP][99] ([fdo#109271]) +137 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl7/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html

  * igt@prime_vgem@fence-write-hang:
    - shard-iclb:         NOTRUN -> [SKIP][100] ([fdo#109295])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb5/igt@prime_vgem@fence-write-hang.html

  * igt@sysfs_clients@create:
    - shard-apl:          NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2994]) +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl7/igt@sysfs_clients@create.html

  * igt@sysfs_clients@fair-1:
    - shard-kbl:          NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#2994]) +2 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@sysfs_clients@fair-1.html

  * igt@sysfs_clients@sema-50:
    - shard-iclb:         NOTRUN -> [SKIP][103] ([i915#2994])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb3/igt@sysfs_clients@sema-50.html
    - shard-glk:          NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#2994])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk2/igt@sysfs_clients@sema-50.html
    - shard-tglb:         NOTRUN -> [SKIP][105] ([i915#2994])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb2/igt@sysfs_clients@sema-50.html

  * igt@sysfs_heartbeat_interval@precise@rcs0:
    - shard-snb:          NOTRUN -> [SKIP][106] ([fdo#109271]) +81 similar issues
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-snb6/igt@sysfs_heartbeat_interval@precise@rcs0.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-tglb:         [TIMEOUT][107] ([i915#3063]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb2/igt@gem_eio@in-flight-contexts-10ms.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb3/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          [FAIL][109] ([i915#2846]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl4/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none@rcs0:
    - shard-glk:          [FAIL][111] ([i915#2842]) -> [PASS][112] +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk3/igt@gem_exec_fair@basic-none@rcs0.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-apl:          [FAIL][113] ([i915#2842]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl1/igt@gem_exec_fair@basic-none@vecs0.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl3/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-tglb:         [FAIL][115] ([i915#2842]) -> [PASS][116] +1 similar issue
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb6/igt@gem_exec_fair@basic-pace@bcs0.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb6/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-kbl:          [FAIL][117] ([i915#2842]) -> [PASS][118] +1 similar issue
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@kms_big_fb@linear-32bpp-rotate-180:
    - shard-glk:          [DMESG-WARN][119] ([i915#118]) -> [PASS][120] +1 similar issue
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk1/igt@kms_big_fb@linear-32bpp-rotate-180.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk9/igt@kms_big_fb@linear-32bpp-rotate-180.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-iclb:         [FAIL][121] ([i915#2346]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][123] ([i915#79]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [DMESG-WARN][125] ([i915#180]) -> [PASS][126] +4 similar issues
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
    - shard-kbl:          [INCOMPLETE][127] ([i915#636]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-kbl:          [DMESG-WARN][129] ([i915#180]) -> [PASS][130] +3 similar issues
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile:
    - shard-iclb:         [SKIP][131] ([i915#3701]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-tglb:         [SKIP][133] ([i915#433]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-tglb8/igt@kms_hdmi_inject@inject-audio.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-tglb6/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][135] ([fdo#109441]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-glk:          [FAIL][137] ([i915#31]) -> [PASS][138]
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-glk9/igt@kms_setmode@basic.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-glk4/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][139] ([i915#180] / [i915#295]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10984/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/shard-kbl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-kbl:          [INCOMPLETE][141] ([i915#2828] / [i915#794]) -> [PASS][142]
   [141]: https://intel-gfx-

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6484/index.html

[-- Attachment #2: Type: text/html, Size: 33774 bytes --]

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

Old commit message:

"""
This a known failure when running 
igt@gem_exec_balancer@bonded-(dual|pair|sync)
tests with GuC submission.The hang is expected with GuC submission since the
test was written to expect execlist scheduling hence added skip if Guc
submission enabled.
"""

New commit message:

On 09/12/2021 08:20, Mastan Katragadda wrote:
> This test makes assumptions about the backend scheduling algorithm that
> a real world UMD would never assume. This test is not testing a UMD-KMD
> contract, rather a specific backend.It is an invalid test case thus we
> are skipping.
> 
> Changes Since v1:
>               -Updated commit message

Well that hasn't been really improved at all an is still totally opaque. 
No mention whether it is all or some subtests, no mention of what 
assumptions, what exact usage of the ABI is discouraged, not much more 
than pure rewording.

No desire to split into passing and non passing tests and only skip 
latter group?

Or to add a twist, what about making the specific subtests which hang 
with GuC, expect to hang and therefore pass?

That would a) document the failing corner case of the ABI and more 
importantly b) keep exercising the i915 code paths which sit between the 
uAPI and the GuC firmware?

If that is not acceptable, and I do acknowledge to the cost to CI time, 
then architects should ack and in my mind the ack should mean one of the 
two things. Either:

  1) We know there is coverage for the same i915 code paths elsewhere in 
IGT. Or:

  2) We are willingly dropping coverage for these i915 code paths on GuC 
platforms with the risk that the code might unknowingly bit rot and 
cause more serious security issues down the line.

Regards,

Tvrtko

> 
> Cc: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
> ---
>   tests/i915/gem_exec_balancer.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
> index cc07a5a9..d58734ab 100644
> --- a/tests/i915/gem_exec_balancer.c
> +++ b/tests/i915/gem_exec_balancer.c
> @@ -3320,6 +3320,7 @@ igt_main
>   
>   	igt_subtest_group {
>   		igt_fixture {
> +			igt_require(!gem_using_guc_submission(i915));
>   			intel_allocator_multiprocess_start();
>   		}
>   
> 

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

I see this has been merged despite my complaint that the commit message 
is not transparent enough and without public arch level acks.

On 10/12/2021 10:02, Tvrtko Ursulin wrote:
> 
> Old commit message:
> 
> """
> This a known failure when running 
> igt@gem_exec_balancer@bonded-(dual|pair|sync)
> tests with GuC submission.The hang is expected with GuC submission since 
> the
> test was written to expect execlist scheduling hence added skip if Guc
> submission enabled.
> """
> 
> New commit message:
> 
> On 09/12/2021 08:20, Mastan Katragadda wrote:
>> This test makes assumptions about the backend scheduling algorithm that
>> a real world UMD would never assume. This test is not testing a UMD-KMD
>> contract, rather a specific backend.It is an invalid test case thus we
>> are skipping.
>>
>> Changes Since v1:
>>               -Updated commit message
> 
> Well that hasn't been really improved at all an is still totally opaque. 
> No mention whether it is all or some subtests, no mention of what 
> assumptions, what exact usage of the ABI is discouraged, not much more 
> than pure rewording.
> 
> No desire to split into passing and non passing tests and only skip 
> latter group?
> 
> Or to add a twist, what about making the specific subtests which hang 
> with GuC, expect to hang and therefore pass?
> 
> That would a) document the failing corner case of the ABI and more 
> importantly b) keep exercising the i915 code paths which sit between the 
> uAPI and the GuC firmware?
> 
> If that is not acceptable, and I do acknowledge to the cost to CI time, 
> then architects should ack and in my mind the ack should mean one of the 
> two things. Either:
> 
>   1) We know there is coverage for the same i915 code paths elsewhere in 
> IGT. Or:
> 
>   2) We are willingly dropping coverage for these i915 code paths on GuC 
> platforms with the risk that the code might unknowingly bit rot and 
> cause more serious security issues down the line.

And no acks to the effect of either 1) or 2) were given. So git history 
will not show what is this allegedly backend specific behavior, neither 
it will clarify which parts of the uapi are stopped being tested in GuC 
mode.

Regards,

Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[John Harrison]

On 12/22/2021 01:30, Tvrtko Ursulin wrote:
> I see this has been merged despite my complaint that the commit 
> message is not transparent enough and without public arch level acks.
I would ack a revert if you want to post it...

>
> On 10/12/2021 10:02, Tvrtko Ursulin wrote:
>>
>> Old commit message:
>>
>> """
>> This a known failure when running 
>> igt@gem_exec_balancer@bonded-(dual|pair|sync)
>> tests with GuC submission.The hang is expected with GuC submission 
>> since the
>> test was written to expect execlist scheduling hence added skip if Guc
>> submission enabled.
>> """
>>
>> New commit message:
>>
>> On 09/12/2021 08:20, Mastan Katragadda wrote:
>>> This test makes assumptions about the backend scheduling algorithm that
>>> a real world UMD would never assume. This test is not testing a UMD-KMD
>>> contract, rather a specific backend.It is an invalid test case thus we
>>> are skipping.
>>>
>>> Changes Since v1:
>>>               -Updated commit message
>>
>> Well that hasn't been really improved at all an is still totally 
>> opaque. No mention whether it is all or some subtests, no mention of 
>> what assumptions, what exact usage of the ABI is discouraged, not 
>> much more than pure rewording.
>>
>> No desire to split into passing and non passing tests and only skip 
>> latter group?
It's not clear from the patch itself, but looking at the code this 
change appears to only affect a specific set of subtests. Those being 
'sliced' and 'bonded-(pair|dual|sync)'. It's not actually disabling the 
entire gem_exec_balancer suite. That is really not clear from the 
subject or commit description, though. And I totally agree that it 
should be documenting a) what the test is doing and b) why that 
behaviour is both backend specific and unreasonable for a UMD.

My understanding is that gem_exec_balancer had already been updated to 
support the new parallel extension as well as the old bonding extension. 
So any subtest with 'parallel' as the prefix is supposed to work with 
GuC submission. Having said that, there are odd other subtests that are 
not obviously related to either bonded nor parallel submission (such as 
persistence, noheartbeat, nohangcheck) which I recall do rely on 
execlist backend implementations and therefore have issues when using 
GuC submission.

I totally agree that we should not be blanket disabling an entire test 
suite or even sub-group with such a generic stated reason. The bonded 
tests (and parallel tests) are meant to check for the presence of the 
appropriate API and skip if not available. They should not be skipping 
based on arbitrary assumptions about the platform.


>>
>> Or to add a twist, what about making the specific subtests which hang 
>> with GuC, expect to hang and therefore pass?
Seems unnecessarily complicated. Why require that something is broken? 
If a test is specific to a backend implementation then the behaviour is 
undefined on any other implementation. It may hang, it may pass, it may 
be random each time you run it. If a test is not relevant to a given 
platform, I would say that it should just be skipped.

>> That would a) document the failing corner case of the ABI and more 
>> importantly b) keep exercising the i915 code paths which sit between 
>> the uAPI and the GuC firmware?
You can't exercise code paths which don't exist. Bonding is 
fundamentally an i915 only implementation. Persistence is partially 
implemented inside the execlist backend. So you can't get to the low 
level code of either when GuC submission is enabled no matter what 
hideousness you put in the test.

>>
>> If that is not acceptable, and I do acknowledge to the cost to CI 
>> time, then architects should ack and in my mind the ack should mean 
>> one of the two things. Either:
>>
>>   1) We know there is coverage for the same i915 code paths elsewhere 
>> in IGT. Or:
That exists when running on older platforms that support the feature 
being tested.

>>
>>   2) We are willingly dropping coverage for these i915 code paths on 
>> GuC platforms with the risk that the code might unknowingly bit rot 
>> and cause more serious security issues down the line.
But we don't care if the code rots for platforms it does not support 
because it doesn't support them.

>
> And no acks to the effect of either 1) or 2) were given. So git 
> history will not show what is this allegedly backend specific 
> behavior, neither it will clarify which parts of the uapi are stopped 
> being tested in GuC mode.
I agree entirely with this. And would go further to say that the test 
code itself should be documenting what it is doing, what it is trying to 
test and why it things that is not applicable to a given platform if it 
is going to skip that platform.

John.


>
> Regards,
>
> Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 22/12/2021 21:02, John Harrison wrote:
> On 12/22/2021 01:30, Tvrtko Ursulin wrote:
>> I see this has been merged despite my complaint that the commit 
>> message is not transparent enough and without public arch level acks.
> I would ack a revert if you want to post it...

Revert and re-submit with a better/more complete explanation would be my 
preferred choice yes.

>> On 10/12/2021 10:02, Tvrtko Ursulin wrote:
>>>
>>> Old commit message:
>>>
>>> """
>>> This a known failure when running 
>>> igt@gem_exec_balancer@bonded-(dual|pair|sync)
>>> tests with GuC submission.The hang is expected with GuC submission 
>>> since the
>>> test was written to expect execlist scheduling hence added skip if Guc
>>> submission enabled.
>>> """
>>>
>>> New commit message:
>>>
>>> On 09/12/2021 08:20, Mastan Katragadda wrote:
>>>> This test makes assumptions about the backend scheduling algorithm that
>>>> a real world UMD would never assume. This test is not testing a UMD-KMD
>>>> contract, rather a specific backend.It is an invalid test case thus we
>>>> are skipping.
>>>>
>>>> Changes Since v1:
>>>>               -Updated commit message
>>>
>>> Well that hasn't been really improved at all an is still totally 
>>> opaque. No mention whether it is all or some subtests, no mention of 
>>> what assumptions, what exact usage of the ABI is discouraged, not 
>>> much more than pure rewording.
>>>
>>> No desire to split into passing and non passing tests and only skip 
>>> latter group?
> It's not clear from the patch itself, but looking at the code this 
> change appears to only affect a specific set of subtests. Those being 
> 'sliced' and 'bonded-(pair|dual|sync)'. It's not actually disabling the 
> entire gem_exec_balancer suite. That is really not clear from the 
> subject or commit description, though. And I totally agree that it 
> should be documenting a) what the test is doing and b) why that 
> behaviour is both backend specific and unreasonable for a UMD.
> 
> My understanding is that gem_exec_balancer had already been updated to 
> support the new parallel extension as well as the old bonding extension. 
> So any subtest with 'parallel' as the prefix is supposed to work with 
> GuC submission. Having said that, there are odd other subtests that are 
> not obviously related to either bonded nor parallel submission (such as 
> persistence, noheartbeat, nohangcheck) which I recall do rely on 
> execlist backend implementations and therefore have issues when using 
> GuC submission.
> 
> I totally agree that we should not be blanket disabling an entire test 
> suite or even sub-group with such a generic stated reason. The bonded 
> tests (and parallel tests) are meant to check for the presence of the 
> appropriate API and skip if not available. They should not be skipping 
> based on arbitrary assumptions about the platform.
> 
> 
>>>
>>> Or to add a twist, what about making the specific subtests which hang 
>>> with GuC, expect to hang and therefore pass?
> Seems unnecessarily complicated. Why require that something is broken? 
> If a test is specific to a backend implementation then the behaviour is 
> undefined on any other implementation. It may hang, it may pass, it may 
> be random each time you run it. If a test is not relevant to a given 
> platform, I would say that it should just be skipped.
> 
>>> That would a) document the failing corner case of the ABI and more 
>>> importantly b) keep exercising the i915 code paths which sit between 
>>> the uAPI and the GuC firmware?
> You can't exercise code paths which don't exist. Bonding is 
> fundamentally an i915 only implementation. Persistence is partially 
> implemented inside the execlist backend. So you can't get to the low 
> level code of either when GuC submission is enabled no matter what 
> hideousness you put in the test.

Sticking to bonding-* subtests..

Catch here is that even though subtests in question have bonding in 
their names they are not using the bonding extension!

They are simply using the submit fence with plain virtual engines. And I 
am told submit fence cannot be disabled on the uAPI level (even on GuC 
submission platforms).

So my concern is for code coverage of using the two in combination. I 
don't think it's good just to not have any (coverage), even if the 
statement is the two /shouldn't/ be used together. If uapi _can_ be used 
together we have to see what happens in the driver if it is. In order to 
avoid nasty surprises if there was some unused code that bit rotted in a 
dangerous way.

That was the first thing I asked to ack in clear explicit words.

Second part what the commit message should say is which of the actual 
disabled subtests fail with GuC. Matt was saying about unpreemptable 
spinners, but not all subtests use those. So perhaps splitting into a 
group which passes and which is a problem for GuC would work and keep 
the coverage.

>>> If that is not acceptable, and I do acknowledge to the cost to CI 
>>> time, then architects should ack and in my mind the ack should mean 
>>> one of the two things. Either:
>>>
>>>   1) We know there is coverage for the same i915 code paths elsewhere 
>>> in IGT. Or:
> That exists when running on older platforms that support the feature 
> being tested.
> 
>>>
>>>   2) We are willingly dropping coverage for these i915 code paths on 
>>> GuC platforms with the risk that the code might unknowingly bit rot 
>>> and cause more serious security issues down the line.
> But we don't care if the code rots for platforms it does not support 
> because it doesn't support them.

Hopefully I managed to explain this in the previous paragraph. If we 
would be able to say ENODEV that would be ideal, but we are not, so 
"doesn't support" in this case is more like "please don't use this". I 
think we need to know what happens if someone does use it.

>>
>> And no acks to the effect of either 1) or 2) were given. So git 
>> history will not show what is this allegedly backend specific 
>> behavior, neither it will clarify which parts of the uapi are stopped 
>> being tested in GuC mode.
> I agree entirely with this. And would go further to say that the test 
> code itself should be documenting what it is doing, what it is trying to 
> test and why it things that is not applicable to a given platform if it 
> is going to skip that platform.

Oh yes, understanding a lot of our tests is such a time sink.

Regards,

Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Surendrakumar Upadhyay, TejaskumarX]

> -----Original Message-----
> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Sent: 23 December 2021 16:38
> To: Harrison, John C <john.c.harrison@intel.com>; Katragadda, MastanX
> <mastanx.katragadda@intel.com>; igt-dev@lists.freedesktop.org;
> Surendrakumar Upadhyay, TejaskumarX
> <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Cc: Bloomfield, Jon <jon.bloomfield@intel.com>; Daniel Vetter
> <daniel@ffwll.ch>
> Subject: Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc
> Submission
> 
> 
> On 22/12/2021 21:02, John Harrison wrote:
> > On 12/22/2021 01:30, Tvrtko Ursulin wrote:
> >> I see this has been merged despite my complaint that the commit
> >> message is not transparent enough and without public arch level acks.
> > I would ack a revert if you want to post it...
> 
> Revert and re-submit with a better/more complete explanation would be my
> preferred choice yes.

+ Matthew

Ok Mastan please revert the change and post again with complete explanation.

Thanks,
Tejas
> 
> >> On 10/12/2021 10:02, Tvrtko Ursulin wrote:
> >>>
> >>> Old commit message:
> >>>
> >>> """
> >>> This a known failure when running
> >>> igt@gem_exec_balancer@bonded-(dual|pair|sync)
> >>> tests with GuC submission.The hang is expected with GuC submission
> >>> since the test was written to expect execlist scheduling hence added
> >>> skip if Guc submission enabled.
> >>> """
> >>>
> >>> New commit message:
> >>>
> >>> On 09/12/2021 08:20, Mastan Katragadda wrote:
> >>>> This test makes assumptions about the backend scheduling algorithm
> >>>> that a real world UMD would never assume. This test is not testing
> >>>> a UMD-KMD contract, rather a specific backend.It is an invalid test
> >>>> case thus we are skipping.
> >>>>
> >>>> Changes Since v1:
> >>>>               -Updated commit message
> >>>
> >>> Well that hasn't been really improved at all an is still totally
> >>> opaque. No mention whether it is all or some subtests, no mention of
> >>> what assumptions, what exact usage of the ABI is discouraged, not
> >>> much more than pure rewording.
> >>>
> >>> No desire to split into passing and non passing tests and only skip
> >>> latter group?
> > It's not clear from the patch itself, but looking at the code this
> > change appears to only affect a specific set of subtests. Those being
> > 'sliced' and 'bonded-(pair|dual|sync)'. It's not actually disabling
> > the entire gem_exec_balancer suite. That is really not clear from the
> > subject or commit description, though. And I totally agree that it
> > should be documenting a) what the test is doing and b) why that
> > behaviour is both backend specific and unreasonable for a UMD.
> >
> > My understanding is that gem_exec_balancer had already been updated to
> > support the new parallel extension as well as the old bonding extension.
> > So any subtest with 'parallel' as the prefix is supposed to work with
> > GuC submission. Having said that, there are odd other subtests that
> > are not obviously related to either bonded nor parallel submission
> > (such as persistence, noheartbeat, nohangcheck) which I recall do rely
> > on execlist backend implementations and therefore have issues when
> > using GuC submission.
> >
> > I totally agree that we should not be blanket disabling an entire test
> > suite or even sub-group with such a generic stated reason. The bonded
> > tests (and parallel tests) are meant to check for the presence of the
> > appropriate API and skip if not available. They should not be skipping
> > based on arbitrary assumptions about the platform.
> >
> >
> >>>
> >>> Or to add a twist, what about making the specific subtests which
> >>> hang with GuC, expect to hang and therefore pass?
> > Seems unnecessarily complicated. Why require that something is broken?
> > If a test is specific to a backend implementation then the behaviour
> > is undefined on any other implementation. It may hang, it may pass, it
> > may be random each time you run it. If a test is not relevant to a
> > given platform, I would say that it should just be skipped.
> >
> >>> That would a) document the failing corner case of the ABI and more
> >>> importantly b) keep exercising the i915 code paths which sit between
> >>> the uAPI and the GuC firmware?
> > You can't exercise code paths which don't exist. Bonding is
> > fundamentally an i915 only implementation. Persistence is partially
> > implemented inside the execlist backend. So you can't get to the low
> > level code of either when GuC submission is enabled no matter what
> > hideousness you put in the test.
> 
> Sticking to bonding-* subtests..
> 
> Catch here is that even though subtests in question have bonding in their
> names they are not using the bonding extension!
> 
> They are simply using the submit fence with plain virtual engines. And I am
> told submit fence cannot be disabled on the uAPI level (even on GuC
> submission platforms).
> 
> So my concern is for code coverage of using the two in combination. I don't
> think it's good just to not have any (coverage), even if the statement is the
> two /shouldn't/ be used together. If uapi _can_ be used together we have to
> see what happens in the driver if it is. In order to avoid nasty surprises if
> there was some unused code that bit rotted in a dangerous way.
> 
> That was the first thing I asked to ack in clear explicit words.
> 
> Second part what the commit message should say is which of the actual
> disabled subtests fail with GuC. Matt was saying about unpreemptable
> spinners, but not all subtests use those. So perhaps splitting into a group
> which passes and which is a problem for GuC would work and keep the
> coverage.
> 
> >>> If that is not acceptable, and I do acknowledge to the cost to CI
> >>> time, then architects should ack and in my mind the ack should mean
> >>> one of the two things. Either:
> >>>
> >>>   1) We know there is coverage for the same i915 code paths
> >>> elsewhere in IGT. Or:
> > That exists when running on older platforms that support the feature
> > being tested.
> >
> >>>
> >>>   2) We are willingly dropping coverage for these i915 code paths on
> >>> GuC platforms with the risk that the code might unknowingly bit rot
> >>> and cause more serious security issues down the line.
> > But we don't care if the code rots for platforms it does not support
> > because it doesn't support them.
> 
> Hopefully I managed to explain this in the previous paragraph. If we would
> be able to say ENODEV that would be ideal, but we are not, so "doesn't
> support" in this case is more like "please don't use this". I think we need to
> know what happens if someone does use it.
> 
> >>
> >> And no acks to the effect of either 1) or 2) were given. So git
> >> history will not show what is this allegedly backend specific
> >> behavior, neither it will clarify which parts of the uapi are stopped
> >> being tested in GuC mode.
> > I agree entirely with this. And would go further to say that the test
> > code itself should be documenting what it is doing, what it is trying to
> > test and why it things that is not applicable to a given platform if it
> > is going to skip that platform.
> 
> Oh yes, understanding a lot of our tests is such a time sink.
> 
> Regards,
> 
> Tvrtko

[igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Mastan Katragadda]

This a known failure when running igt@gem_exec_balancer@bonded-(dual|pair|sync)
tests with GuC submission.The hang is expected with GuC submission since the
test was written to expect execlist scheduling hence added skip if Guc
submission enabled.

Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
---
 tests/i915/gem_exec_balancer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index cc07a5a9..d58734ab 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -3320,6 +3320,7 @@ igt_main
 
 	igt_subtest_group {
 		igt_fixture {
+			igt_require(!gem_using_guc_submission(i915));
 			intel_allocator_multiprocess_start();
 		}
 
-- 
2.25.1

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 26/11/2021 01:57, Mastan Katragadda wrote:
> This a known failure when running igt@gem_exec_balancer@bonded-(dual|pair|sync)
> tests with GuC submission.The hang is expected with GuC submission since the
> test was written to expect execlist scheduling hence added skip if Guc
> submission enabled.

Looking at the test I don't see anything backend specific. Can you 
provide an explanation of how and why it hangs?

Regards,

Tvrtko

> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
> ---
>   tests/i915/gem_exec_balancer.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
> index cc07a5a9..d58734ab 100644
> --- a/tests/i915/gem_exec_balancer.c
> +++ b/tests/i915/gem_exec_balancer.c
> @@ -3320,6 +3320,7 @@ igt_main
>   
>   	igt_subtest_group {
>   		igt_fixture {
> +			igt_require(!gem_using_guc_submission(i915));
>   			intel_allocator_multiprocess_start();
>   		}
>   
> 

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Katragadda, MastanX]

Hi   Tvrtko Ursulin,
             Based on following backend information added skip on guc enabled platforms.    

basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.

Test is expected to fail with GuC submission, skip it in CI.

Regards,
Mastan

-----Original Message-----
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> 
Sent: 29 November 2021 16:01
To: Katragadda, MastanX <mastanx.katragadda@intel.com>; igt-dev@lists.freedesktop.org; Surendrakumar Upadhyay, TejaskumarX <tejaskumarx.surendrakumar.upadhyay@intel.com>
Subject: Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission


On 26/11/2021 01:57, Mastan Katragadda wrote:
> This a known failure when running 
> igt@gem_exec_balancer@bonded-(dual|pair|sync)
> tests with GuC submission.The hang is expected with GuC submission 
> since the test was written to expect execlist scheduling hence added 
> skip if Guc submission enabled.

Looking at the test I don't see anything backend specific. Can you provide an explanation of how and why it hangs?

Regards,

Tvrtko

> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
> ---
>   tests/i915/gem_exec_balancer.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/tests/i915/gem_exec_balancer.c 
> b/tests/i915/gem_exec_balancer.c index cc07a5a9..d58734ab 100644
> --- a/tests/i915/gem_exec_balancer.c
> +++ b/tests/i915/gem_exec_balancer.c
> @@ -3320,6 +3320,7 @@ igt_main
>   
>   	igt_subtest_group {
>   		igt_fixture {
> +			igt_require(!gem_using_guc_submission(i915));
>   			intel_allocator_multiprocess_start();
>   		}
>   
> 

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 29/11/2021 10:58, Katragadda, MastanX wrote:
> Hi   Tvrtko Ursulin,
>               Based on following backend information added skip on guc enabled platforms.
> 
> basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
> 
> Test is expected to fail with GuC submission, skip it in CI.

Does "blocks the rest of the queue" mean unrelated contexts submitted 
against the same engine class?

If so then it would be a DoS vector and the "user _should_ always" would 
not be sufficient.

Or if the blockage is localised to a single context then it might be 
fine (but unfortunate) if on top we chose to disallow submission to 
non-virtual indices in the engine map (in case of GuC)? If the firmware 
bug is not getting fixed that is. I may be on the wrong track here since 
I am not 100% certain I figured out why it exactly gets stuck.

Because, looking at the bonded-pair to start with, if the test is 
emitting a pair of request on the same context, spinner first, then a 
another one with a semaphore dependency I am not sure why it hangs. When 
the spinner switches out after time slice expires the second request 
should run, cancel the spinner and exit. At which point they are both 
complete.

Regards,

Tvrtko

> Regards,
> Mastan
> 
> -----Original Message-----
> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Sent: 29 November 2021 16:01
> To: Katragadda, MastanX <mastanx.katragadda@intel.com>; igt-dev@lists.freedesktop.org; Surendrakumar Upadhyay, TejaskumarX <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Subject: Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission
> 
> 
> On 26/11/2021 01:57, Mastan Katragadda wrote:
>> This a known failure when running
>> igt@gem_exec_balancer@bonded-(dual|pair|sync)
>> tests with GuC submission.The hang is expected with GuC submission
>> since the test was written to expect execlist scheduling hence added
>> skip if Guc submission enabled.
> 
> Looking at the test I don't see anything backend specific. Can you provide an explanation of how and why it hangs?
> 
> Regards,
> 
> Tvrtko
> 
>> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
>> ---
>>    tests/i915/gem_exec_balancer.c | 1 +
>>    1 file changed, 1 insertion(+)
>>
>> diff --git a/tests/i915/gem_exec_balancer.c
>> b/tests/i915/gem_exec_balancer.c index cc07a5a9..d58734ab 100644
>> --- a/tests/i915/gem_exec_balancer.c
>> +++ b/tests/i915/gem_exec_balancer.c
>> @@ -3320,6 +3320,7 @@ igt_main
>>    
>>    	igt_subtest_group {
>>    		igt_fixture {
>> +			igt_require(!gem_using_guc_submission(i915));
>>    			intel_allocator_multiprocess_start();
>>    		}
>>    
>>

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Matthew Brost]

On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
> 
> On 29/11/2021 10:58, Katragadda, MastanX wrote:
> > Hi   Tvrtko Ursulin,
> >               Based on following backend information added skip on guc enabled platforms.
> > 
> > basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
> > 
> > Test is expected to fail with GuC submission, skip it in CI.
> 
> Does "blocks the rest of the queue" mean unrelated contexts submitted
> against the same engine class?
> 

Yes.

> If so then it would be a DoS vector and the "user _should_ always" would not
> be sufficient.
>

This is a DoS vector but there are about a million others and this no
worse than most. 

> Or if the blockage is localised to a single context then it might be fine
> (but unfortunate) if on top we chose to disallow submission to non-virtual
> indices in the engine map (in case of GuC)? If the firmware bug is not

We discussed this we basically land on if the UMDs want to do something
stupid, let them as with all the other DoS in the i915. We likely can't
disable non-virtual submission as some UMDs want to explictly place some
contexts on certain engines (compute). In that case the UMD has to be
smart enough to not submit contexts in a way to expose this scheduling
quirk.

> getting fixed that is. I may be on the wrong track here since I am not 100%

Just because the GuC scheduling doesn't work like execlists doesn't mean
that it is bug. Checking for the HoQ only is done for a good reason -
performance a uC can do everything and anything like execlists as it is
single low power CPU controling the scheduling of an entire GT. We can't
protect against everything a user can do that is stupid.

FWIW we do have an open task assigned to the GuC team to allow a KMD
configurable search depth when the queue can't be scheduled. No idea
when this is going to get implemented.

> certain I figured out why it exactly gets stuck.
> 
> Because, looking at the bonded-pair to start with, if the test is emitting a
> pair of request on the same context, spinner first, then a another one with
> a semaphore dependency I am not sure why it hangs. When the spinner switches
> out after time slice expires the second request should run, cancel the
> spinner and exit. At which point they are both complete.
>

I think only the MT version of bonded-pair hangs but it has been a while
since I looked at this.

IMO this fix is 100% correct as this is a known, tracked issue. It was
agreed upon (arch, i915, GuC team) that we just skip these tests with
GuC submission.

Matt

> Regards,
> 
> Tvrtko
> 
> > Regards,
> > Mastan
> > 
> > -----Original Message-----
> > From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > Sent: 29 November 2021 16:01
> > To: Katragadda, MastanX <mastanx.katragadda@intel.com>; igt-dev@lists.freedesktop.org; Surendrakumar Upadhyay, TejaskumarX <tejaskumarx.surendrakumar.upadhyay@intel.com>
> > Subject: Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission
> > 
> > 
> > On 26/11/2021 01:57, Mastan Katragadda wrote:
> > > This a known failure when running
> > > igt@gem_exec_balancer@bonded-(dual|pair|sync)
> > > tests with GuC submission.The hang is expected with GuC submission
> > > since the test was written to expect execlist scheduling hence added
> > > skip if Guc submission enabled.
> > 
> > Looking at the test I don't see anything backend specific. Can you provide an explanation of how and why it hangs?
> > 
> > Regards,
> > 
> > Tvrtko
> > 
> > > Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com>
> > > ---
> > >    tests/i915/gem_exec_balancer.c | 1 +
> > >    1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/tests/i915/gem_exec_balancer.c
> > > b/tests/i915/gem_exec_balancer.c index cc07a5a9..d58734ab 100644
> > > --- a/tests/i915/gem_exec_balancer.c
> > > +++ b/tests/i915/gem_exec_balancer.c
> > > @@ -3320,6 +3320,7 @@ igt_main
> > >    	igt_subtest_group {
> > >    		igt_fixture {
> > > +			igt_require(!gem_using_guc_submission(i915));
> > >    			intel_allocator_multiprocess_start();
> > >    		}
> > > 

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 30/11/2021 16:48, Matthew Brost wrote:
> On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
>>
>> On 29/11/2021 10:58, Katragadda, MastanX wrote:
>>> Hi   Tvrtko Ursulin,
>>>                Based on following backend information added skip on guc enabled platforms.
>>>
>>> basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
>>>
>>> Test is expected to fail with GuC submission, skip it in CI.
>>
>> Does "blocks the rest of the queue" mean unrelated contexts submitted
>> against the same engine class?
>>
> 
> Yes.
> 
>> If so then it would be a DoS vector and the "user _should_ always" would not
>> be sufficient.
>>
> 
> This is a DoS vector but there are about a million others and this no
> worse than most.

Adding new ones should not be taken lightly.

>> Or if the blockage is localised to a single context then it might be fine
>> (but unfortunate) if on top we chose to disallow submission to non-virtual
>> indices in the engine map (in case of GuC)? If the firmware bug is not
> 
> We discussed this we basically land on if the UMDs want to do something
> stupid, let them as with all the other DoS in the i915. We likely can't
> disable non-virtual submission as some UMDs want to explictly place some
> contexts on certain engines (compute). In that case the UMD has to be
> smart enough to not submit contexts in a way to expose this scheduling
> quirk.

"Quirk"... :) Why it happens though? Is the firmware scheduling with GEM 
context granularity, and not intel_context, and that is the disconnect?

>> getting fixed that is. I may be on the wrong track here since I am not 100%
> 
> Just because the GuC scheduling doesn't work like execlists doesn't mean
> that it is bug. Checking for the HoQ only is done for a good reason -
> performance a uC can do everything and anything like execlists as it is
> single low power CPU controling the scheduling of an entire GT. We can't
> protect against everything a user can do that is stupid.
> 
> FWIW we do have an open task assigned to the GuC team to allow a KMD
> configurable search depth when the queue can't be scheduled. No idea
> when this is going to get implemented.

This maybe too specific. Question rather could be why is something not 
runnable put at the head of the queue by the firmware. Sounds like a 
plain bug to me.

>> certain I figured out why it exactly gets stuck.
>>
>> Because, looking at the bonded-pair to start with, if the test is emitting a
>> pair of request on the same context, spinner first, then a another one with
>> a semaphore dependency I am not sure why it hangs. When the spinner switches
>> out after time slice expires the second request should run, cancel the
>> spinner and exit. At which point they are both complete.
>>
> 
> I think only the MT version of bonded-pair hangs but it has been a while
> since I looked at this.
> 
> IMO this fix is 100% correct as this is a known, tracked issue. It was
> agreed upon (arch, i915, GuC team) that we just skip these tests with
> GuC submission.

I915 team is here on upstream as well.

Record those acks publicly would be my ask. Unless some security by 
obscurity is happening here? Until then from me it is a soft nack to 
keep disabling tests which show genuine weaknesses in GuC mode. Soft 
until we get a public record of exactly what is broken and in what 
circumstances, acked by architects publicly as you say they acked it 
somewhere. Commit message devoid of detail is not good enough.

Regards,

Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Radoslaw Szwichtenberg]

On 01/12/2021 10:46, Tvrtko Ursulin wrote:
> 
> On 30/11/2021 16:48, Matthew Brost wrote:
>>
>> IMO this fix is 100% correct as this is a known, tracked issue. It was
>> agreed upon (arch, i915, GuC team) that we just skip these tests with
>> GuC submission.
This does not look like a fix to me - you just disable test to hide the 
result. If this issue is recorded with a bug, is tracked - why cant we 
just let this test fail till we get this issue fixed?
> 
> I915 team is here on upstream as well.
> 
> Record those acks publicly would be my ask. Unless some security by 
> obscurity is happening here? Until then from me it is a soft nack to 
> keep disabling tests which show genuine weaknesses in GuC mode. Soft 
> until we get a public record of exactly what is broken and in what 
> circumstances, acked by architects publicly as you say they acked it 
> somewhere. Commit message devoid of detail is not good enough.
This should be most probably documented in the bug, right? Here we 
should just keep the test as is till the issue is fixed. I don't see how 
docummenting an issue would enable us to just disable the test.

Radek

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Daniel Vetter]

On Wed, Dec 1, 2021 at 12:37 PM Radoslaw Szwichtenberg
<radoslaw.szwichtenberg@intel.com> wrote:
> On 01/12/2021 10:46, Tvrtko Ursulin wrote:
> > On 30/11/2021 16:48, Matthew Brost wrote:
> >>
> >> IMO this fix is 100% correct as this is a known, tracked issue. It was
> >> agreed upon (arch, i915, GuC team) that we just skip these tests with
> >> GuC submission.
> This does not look like a fix to me - you just disable test to hide the
> result. If this issue is recorded with a bug, is tracked - why cant we
> just let this test fail till we get this issue fixed?

This is correct in general, but sadly not for gem igts and selftests.
The state of our validation suite is screwed up enough that
unfortunately the safe starting point for failing tests is that the
test is simply wrong, or too much just validating implementation
details of the current platform/driver, while not actually validating
stuff that should be tested for.

> > I915 team is here on upstream as well.
> >
> > Record those acks publicly would be my ask. Unless some security by
> > obscurity is happening here? Until then from me it is a soft nack to
> > keep disabling tests which show genuine weaknesses in GuC mode. Soft
> > until we get a public record of exactly what is broken and in what
> > circumstances, acked by architects publicly as you say they acked it
> > somewhere. Commit message devoid of detail is not good enough.
> This should be most probably documented in the bug, right? Here we
> should just keep the test as is till the issue is fixed. I don't see how
> docummenting an issue would enable us to just disable the test.

Sadly the situation is bad enough that I'm tempted to just drop a few
thousand Acked-by: me tags in this thread for any case where a
questionable testcase gets in the way. Unless someone can proof that
it's a POR architectural requirement we're validating here.

I do agree though that really we should just delete such tests
outright, not hide the mess on each platform individually.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 01/12/2021 11:46, Daniel Vetter wrote:
> On Wed, Dec 1, 2021 at 12:37 PM Radoslaw Szwichtenberg
> <radoslaw.szwichtenberg@intel.com> wrote:
>> On 01/12/2021 10:46, Tvrtko Ursulin wrote:
>>> On 30/11/2021 16:48, Matthew Brost wrote:
>>>>
>>>> IMO this fix is 100% correct as this is a known, tracked issue. It was
>>>> agreed upon (arch, i915, GuC team) that we just skip these tests with
>>>> GuC submission.
>> This does not look like a fix to me - you just disable test to hide the
>> result. If this issue is recorded with a bug, is tracked - why cant we
>> just let this test fail till we get this issue fixed?
> 
> This is correct in general, but sadly not for gem igts and selftests.
> The state of our validation suite is screwed up enough that
> unfortunately the safe starting point for failing tests is that the
> test is simply wrong, or too much just validating implementation
> details of the current platform/driver, while not actually validating
> stuff that should be tested for.
> 
>>> I915 team is here on upstream as well.
>>>
>>> Record those acks publicly would be my ask. Unless some security by
>>> obscurity is happening here? Until then from me it is a soft nack to
>>> keep disabling tests which show genuine weaknesses in GuC mode. Soft
>>> until we get a public record of exactly what is broken and in what
>>> circumstances, acked by architects publicly as you say they acked it
>>> somewhere. Commit message devoid of detail is not good enough.
>> This should be most probably documented in the bug, right? Here we
>> should just keep the test as is till the issue is fixed. I don't see how
>> docummenting an issue would enable us to just disable the test.
> 
> Sadly the situation is bad enough that I'm tempted to just drop a few
> thousand Acked-by: me tags in this thread for any case where a
> questionable testcase gets in the way. Unless someone can proof that
> it's a POR architectural requirement we're validating here.
> 
> I do agree though that really we should just delete such tests
> outright, not hide the mess on each platform individually.

One ack is enough, thousands shouldn't be needed. :) But, since the test 
by accident showed how GuC firmware can get apparently completely 
blocked and confused by innocent userspace operations, please apply that 
ack against something with a proper commit message.

Statements such as "it's just one more DoS", "agreed by the i915 team" 
(where?) and commit message devoid of detail are not at the standard you 
yourself are otherwise advocating.

And on the technical level I really would like to know why and how GuC 
ends up with a non-runnable item stuck at the top of it's scheduling 
queue. AKA being able to understand the issue fully.

Regards,

Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Matthew Brost]

On Wed, Dec 01, 2021 at 12:46:06PM +0100, Daniel Vetter wrote:
> On Wed, Dec 1, 2021 at 12:37 PM Radoslaw Szwichtenberg
> <radoslaw.szwichtenberg@intel.com> wrote:
> > On 01/12/2021 10:46, Tvrtko Ursulin wrote:
> > > On 30/11/2021 16:48, Matthew Brost wrote:
> > >>
> > >> IMO this fix is 100% correct as this is a known, tracked issue. It was
> > >> agreed upon (arch, i915, GuC team) that we just skip these tests with
> > >> GuC submission.
> > This does not look like a fix to me - you just disable test to hide the
> > result. If this issue is recorded with a bug, is tracked - why cant we
> > just let this test fail till we get this issue fixed?
> 
> This is correct in general, but sadly not for gem igts and selftests.
> The state of our validation suite is screwed up enough that
> unfortunately the safe starting point for failing tests is that the
> test is simply wrong, or too much just validating implementation
> details of the current platform/driver, while not actually validating
> stuff that should be tested for.
> 

That is exactly what this test is doing - IMO it is validating details
of backend scheduler not ABI nor a POR arch requirement. 

> > > I915 team is here on upstream as well.
> > >
> > > Record those acks publicly would be my ask. Unless some security by
> > > obscurity is happening here? Until then from me it is a soft nack to
> > > keep disabling tests which show genuine weaknesses in GuC mode. Soft
> > > until we get a public record of exactly what is broken and in what
> > > circumstances, acked by architects publicly as you say they acked it
> > > somewhere. Commit message devoid of detail is not good enough.
> > This should be most probably documented in the bug, right? Here we
> > should just keep the test as is till the issue is fixed. I don't see how
> > docummenting an issue would enable us to just disable the test.
> 
> Sadly the situation is bad enough that I'm tempted to just drop a few
> thousand Acked-by: me tags in this thread for any case where a
> questionable testcase gets in the way. Unless someone can proof that
> it's a POR architectural requirement we're validating here.
>

Agree our selftests / IGTs are a complete mess with many questionable
test cases. You wouldn't believe the amount of time / effort we waste
looking into these.

> I do agree though that really we should just delete such tests
> outright, not hide the mess on each platform individually.

Agree likely should do an audit of our tests and delete some of them.

Matt

> -Daniel
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Matthew Brost]

On Wed, Dec 01, 2021 at 09:46:02AM +0000, Tvrtko Ursulin wrote:
> 
> On 30/11/2021 16:48, Matthew Brost wrote:
> > On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
> > > 
> > > On 29/11/2021 10:58, Katragadda, MastanX wrote:
> > > > Hi   Tvrtko Ursulin,
> > > >                Based on following backend information added skip on guc enabled platforms.
> > > > 
> > > > basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
> > > > 
> > > > Test is expected to fail with GuC submission, skip it in CI.
> > > 
> > > Does "blocks the rest of the queue" mean unrelated contexts submitted
> > > against the same engine class?
> > > 
> > 
> > Yes.
> > 
> > > If so then it would be a DoS vector and the "user _should_ always" would not
> > > be sufficient.
> > > 
> > 
> > This is a DoS vector but there are about a million others and this no
> > worse than most.
> 
> Adding new ones should not be taken lightly.
> 
> > > Or if the blockage is localised to a single context then it might be fine
> > > (but unfortunate) if on top we chose to disallow submission to non-virtual
> > > indices in the engine map (in case of GuC)? If the firmware bug is not
> > 
> > We discussed this we basically land on if the UMDs want to do something
> > stupid, let them as with all the other DoS in the i915. We likely can't
> > disable non-virtual submission as some UMDs want to explictly place some
> > contexts on certain engines (compute). In that case the UMD has to be
> > smart enough to not submit contexts in a way to expose this scheduling
> > quirk.
> 
> "Quirk"... :) Why it happens though? Is the firmware scheduling with GEM
> context granularity, and not intel_context, and that is the disconnect?
> 

The firmware has no idea of GEM contexts or requests only contexts (a LRC).

The scheduling queue is per class, if the HoQ can't be scheduled it
blocks scheduling for that queue until the HoQ can be scheduled. If the
user is using VEs then the HoQ can't block unless all engines within the
class are full. This all goes back to making VEs optional to the user,
once we did that we have exposed ourselves to dump users.

Again this not a bug in the GuC firmware, this is by design and was SoB
by multiple architects. The i915 team doesn't control the GuC firmware
arch BTW. We can ask for changes, but at the end of the day we can't
force any changes without SoB from multiple architects, on multiple
teams.

The current proposal is add a per class KMD controlled policy which
controls the search depth of the queue to find a context which can be
scheduled (e.g. search so many entires past of the HoQ). It is likely to
get implemented.

> > > getting fixed that is. I may be on the wrong track here since I am not 100%
> > 
> > Just because the GuC scheduling doesn't work like execlists doesn't mean
> > that it is bug. Checking for the HoQ only is done for a good reason -
> > performance a uC can do everything and anything like execlists as it is
> > single low power CPU controling the scheduling of an entire GT. We can't
> > protect against everything a user can do that is stupid.
> > 
> > FWIW we do have an open task assigned to the GuC team to allow a KMD
> > configurable search depth when the queue can't be scheduled. No idea
> > when this is going to get implemented.
> 
> This maybe too specific. Question rather could be why is something not
> runnable put at the head of the queue by the firmware. Sounds like a plain
> bug to me.
> 

See above. As far as I'm concerned this is not a bug.

Also see Daniel's comments, this is basically a broken test which
assumes certain scheduler behavior. It is not testing ABI or a POR
arch requirement.

> > > certain I figured out why it exactly gets stuck.
> > > 
> > > Because, looking at the bonded-pair to start with, if the test is emitting a
> > > pair of request on the same context, spinner first, then a another one with
> > > a semaphore dependency I am not sure why it hangs. When the spinner switches
> > > out after time slice expires the second request should run, cancel the
> > > spinner and exit. At which point they are both complete.
> > > 
> > 
> > I think only the MT version of bonded-pair hangs but it has been a while
> > since I looked at this.
> > 
> > IMO this fix is 100% correct as this is a known, tracked issue. It was
> > agreed upon (arch, i915, GuC team) that we just skip these tests with
> > GuC submission.
> 
> I915 team is here on upstream as well.
> 
> Record those acks publicly would be my ask. Unless some security by
> obscurity is happening here? Until then from me it is a soft nack to keep
> disabling tests which show genuine weaknesses in GuC mode. Soft until we get
> a public record of exactly what is broken and in what circumstances, acked
> by architects publicly as you say they acked it somewhere. Commit message
> devoid of detail is not good enough.

I'm fine with not fixing this but you'd have to ask the CI if they can
live with this. If they can't (it crashes CI runs) then we have to skip
this within the test.

Matt

> 
> Regards,
> 
> Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Petri Latvala]

On Wed, Dec 01, 2021 at 03:42:34PM -0800, Matthew Brost wrote:
> On Wed, Dec 01, 2021 at 09:46:02AM +0000, Tvrtko Ursulin wrote:
> > 
> > On 30/11/2021 16:48, Matthew Brost wrote:
> > > On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
> > > > 
> > > > On 29/11/2021 10:58, Katragadda, MastanX wrote:
> > > > > Hi   Tvrtko Ursulin,
> > > > >                Based on following backend information added skip on guc enabled platforms.
> > > > > 
> > > > > basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
> > > > > 
> > > > > Test is expected to fail with GuC submission, skip it in CI.
> > > > 
> > > > Does "blocks the rest of the queue" mean unrelated contexts submitted
> > > > against the same engine class?
> > > > 
> > > 
> > > Yes.
> > > 
> > > > If so then it would be a DoS vector and the "user _should_ always" would not
> > > > be sufficient.
> > > > 
> > > 
> > > This is a DoS vector but there are about a million others and this no
> > > worse than most.
> > 
> > Adding new ones should not be taken lightly.
> > 
> > > > Or if the blockage is localised to a single context then it might be fine
> > > > (but unfortunate) if on top we chose to disallow submission to non-virtual
> > > > indices in the engine map (in case of GuC)? If the firmware bug is not
> > > 
> > > We discussed this we basically land on if the UMDs want to do something
> > > stupid, let them as with all the other DoS in the i915. We likely can't
> > > disable non-virtual submission as some UMDs want to explictly place some
> > > contexts on certain engines (compute). In that case the UMD has to be
> > > smart enough to not submit contexts in a way to expose this scheduling
> > > quirk.
> > 
> > "Quirk"... :) Why it happens though? Is the firmware scheduling with GEM
> > context granularity, and not intel_context, and that is the disconnect?
> > 
> 
> The firmware has no idea of GEM contexts or requests only contexts (a LRC).
> 
> The scheduling queue is per class, if the HoQ can't be scheduled it
> blocks scheduling for that queue until the HoQ can be scheduled. If the
> user is using VEs then the HoQ can't block unless all engines within the
> class are full. This all goes back to making VEs optional to the user,
> once we did that we have exposed ourselves to dump users.
> 
> Again this not a bug in the GuC firmware, this is by design and was SoB
> by multiple architects. The i915 team doesn't control the GuC firmware
> arch BTW. We can ask for changes, but at the end of the day we can't
> force any changes without SoB from multiple architects, on multiple
> teams.
> 
> The current proposal is add a per class KMD controlled policy which
> controls the search depth of the queue to find a context which can be
> scheduled (e.g. search so many entires past of the HoQ). It is likely to
> get implemented.
> 
> > > > getting fixed that is. I may be on the wrong track here since I am not 100%
> > > 
> > > Just because the GuC scheduling doesn't work like execlists doesn't mean
> > > that it is bug. Checking for the HoQ only is done for a good reason -
> > > performance a uC can do everything and anything like execlists as it is
> > > single low power CPU controling the scheduling of an entire GT. We can't
> > > protect against everything a user can do that is stupid.
> > > 
> > > FWIW we do have an open task assigned to the GuC team to allow a KMD
> > > configurable search depth when the queue can't be scheduled. No idea
> > > when this is going to get implemented.
> > 
> > This maybe too specific. Question rather could be why is something not
> > runnable put at the head of the queue by the firmware. Sounds like a plain
> > bug to me.
> > 
> 
> See above. As far as I'm concerned this is not a bug.
> 
> Also see Daniel's comments, this is basically a broken test which
> assumes certain scheduler behavior. It is not testing ABI or a POR
> arch requirement.
> 
> > > > certain I figured out why it exactly gets stuck.
> > > > 
> > > > Because, looking at the bonded-pair to start with, if the test is emitting a
> > > > pair of request on the same context, spinner first, then a another one with
> > > > a semaphore dependency I am not sure why it hangs. When the spinner switches
> > > > out after time slice expires the second request should run, cancel the
> > > > spinner and exit. At which point they are both complete.
> > > > 
> > > 
> > > I think only the MT version of bonded-pair hangs but it has been a while
> > > since I looked at this.
> > > 
> > > IMO this fix is 100% correct as this is a known, tracked issue. It was
> > > agreed upon (arch, i915, GuC team) that we just skip these tests with
> > > GuC submission.
> > 
> > I915 team is here on upstream as well.
> > 
> > Record those acks publicly would be my ask. Unless some security by
> > obscurity is happening here? Until then from me it is a soft nack to keep
> > disabling tests which show genuine weaknesses in GuC mode. Soft until we get
> > a public record of exactly what is broken and in what circumstances, acked
> > by architects publicly as you say they acked it somewhere. Commit message
> > devoid of detail is not good enough.
> 
> I'm fine with not fixing this but you'd have to ask the CI if they can
> live with this. If they can't (it crashes CI runs) then we have to skip
> this within the test.

It's https://gitlab.freedesktop.org/drm/intel/-/issues/4362 right?

That's a fairly well-behaving failure that gets recovered fine for the
next test. CI is fine with having the failure as is.


-- 
Petri Latvala

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Tvrtko Ursulin]

On 01/12/2021 23:42, Matthew Brost wrote:
> On Wed, Dec 01, 2021 at 09:46:02AM +0000, Tvrtko Ursulin wrote:
>>
>> On 30/11/2021 16:48, Matthew Brost wrote:
>>> On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
>>>>
>>>> On 29/11/2021 10:58, Katragadda, MastanX wrote:
>>>>> Hi   Tvrtko Ursulin,
>>>>>                 Based on following backend information added skip on guc enabled platforms.
>>>>>
>>>>> basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
>>>>>
>>>>> Test is expected to fail with GuC submission, skip it in CI.
>>>>
>>>> Does "blocks the rest of the queue" mean unrelated contexts submitted
>>>> against the same engine class?
>>>>
>>>
>>> Yes.
>>>
>>>> If so then it would be a DoS vector and the "user _should_ always" would not
>>>> be sufficient.
>>>>
>>>
>>> This is a DoS vector but there are about a million others and this no
>>> worse than most.
>>
>> Adding new ones should not be taken lightly.
>>
>>>> Or if the blockage is localised to a single context then it might be fine
>>>> (but unfortunate) if on top we chose to disallow submission to non-virtual
>>>> indices in the engine map (in case of GuC)? If the firmware bug is not
>>>
>>> We discussed this we basically land on if the UMDs want to do something
>>> stupid, let them as with all the other DoS in the i915. We likely can't
>>> disable non-virtual submission as some UMDs want to explictly place some
>>> contexts on certain engines (compute). In that case the UMD has to be
>>> smart enough to not submit contexts in a way to expose this scheduling
>>> quirk.
>>
>> "Quirk"... :) Why it happens though? Is the firmware scheduling with GEM
>> context granularity, and not intel_context, and that is the disconnect?
>>
> 
> The firmware has no idea of GEM contexts or requests only contexts (a LRC).
> 
> The scheduling queue is per class, if the HoQ can't be scheduled it
> blocks scheduling for that queue until the HoQ can be scheduled. If the
> user is using VEs then the HoQ can't block unless all engines within the
> class are full. This all goes back to making VEs optional to the user,
> once we did that we have exposed ourselves to dump users.
> 
> Again this not a bug in the GuC firmware, this is by design and was SoB
> by multiple architects. The i915 team doesn't control the GuC firmware
> arch BTW. We can ask for changes, but at the end of the day we can't
> force any changes without SoB from multiple architects, on multiple
> teams.
> 
> The current proposal is add a per class KMD controlled policy which
> controls the search depth of the queue to find a context which can be
> scheduled (e.g. search so many entires past of the HoQ). It is likely to
> get implemented.

That's all fine and dandy as an explanation for someone who knows how 
GuC firmware works but is not what I am asking for.

Please write a commit message for this removal which explains which 
currently possible submission scenarios cannot be handled by GuC.

You can then expand into why, and GuC FW implementation details if you 
want, but is not the primary ask.

Start with the particular example of the bonded-pair subtest. As far as 
I can see it emits two requests on two contexts. First spins until 
second does a SDW. Second has a semaphore wait on first making SDW. So 
execution flow should end up like this:

  ctxA rq1 sdw1
  ctxA rq1 spin
<timeslice switches it out>
  ctxB rq1 semaphore wait - satisfied due sdw1
  ctxB rq1 sdw2
  ctxB rq1 completed
<completed - context switch>
  ctxA rq1 completed due sdw2

Please either explain that I didn't get what the test is doing, or if I 
have, how GuC manages to not cope with it. Like what does GuC sees as 
"head of the queue" in this case and why it is not schedulable.

When the root cause is explained what is needed is to come up with all 
possible entry points into this failure mode.

>>>> getting fixed that is. I may be on the wrong track here since I am not 100%
>>>
>>> Just because the GuC scheduling doesn't work like execlists doesn't mean
>>> that it is bug. Checking for the HoQ only is done for a good reason -
>>> performance a uC can do everything and anything like execlists as it is
>>> single low power CPU controling the scheduling of an entire GT. We can't
>>> protect against everything a user can do that is stupid.
>>>
>>> FWIW we do have an open task assigned to the GuC team to allow a KMD
>>> configurable search depth when the queue can't be scheduled. No idea
>>> when this is going to get implemented.
>>
>> This maybe too specific. Question rather could be why is something not
>> runnable put at the head of the queue by the firmware. Sounds like a plain
>> bug to me.
>>
> 
> See above. As far as I'm concerned this is not a bug.
> 
> Also see Daniel's comments, this is basically a broken test which
> assumes certain scheduler behavior. It is not testing ABI or a POR
> arch requirement.
> 
>>>> certain I figured out why it exactly gets stuck.
>>>>
>>>> Because, looking at the bonded-pair to start with, if the test is emitting a
>>>> pair of request on the same context, spinner first, then a another one with
>>>> a semaphore dependency I am not sure why it hangs. When the spinner switches
>>>> out after time slice expires the second request should run, cancel the
>>>> spinner and exit. At which point they are both complete.
>>>>
>>>
>>> I think only the MT version of bonded-pair hangs but it has been a while
>>> since I looked at this.
>>>
>>> IMO this fix is 100% correct as this is a known, tracked issue. It was
>>> agreed upon (arch, i915, GuC team) that we just skip these tests with
>>> GuC submission.
>>
>> I915 team is here on upstream as well.
>>
>> Record those acks publicly would be my ask. Unless some security by
>> obscurity is happening here? Until then from me it is a soft nack to keep
>> disabling tests which show genuine weaknesses in GuC mode. Soft until we get
>> a public record of exactly what is broken and in what circumstances, acked
>> by architects publicly as you say they acked it somewhere. Commit message
>> devoid of detail is not good enough.
> 
> I'm fine with not fixing this but you'd have to ask the CI if they can
> live with this. If they can't (it crashes CI runs) then we have to skip
> this within the test.

That's not what I said. I said we need a proper commit message to go 
with adding skips (or removals) so it is recorded what has been swept 
under the carpet. Only then acks make sense. Acks against a commit 
message which says nothing mean nothing in terms of accountability and 
process.

Regards,

Tvrtko

Re: [igt-dev] [i-g-t] tests/i915/exec_balancer: Added Skip Guc Submission

[Matthew Brost]

On Wed, Dec 01, 2021 at 03:42:34PM -0800, Matthew Brost wrote:
> On Wed, Dec 01, 2021 at 09:46:02AM +0000, Tvrtko Ursulin wrote:
> > 
> > On 30/11/2021 16:48, Matthew Brost wrote:
> > > On Mon, Nov 29, 2021 at 11:15:22AM +0000, Tvrtko Ursulin wrote:
> > > > 
> > > > On 29/11/2021 10:58, Katragadda, MastanX wrote:
> > > > > Hi   Tvrtko Ursulin,
> > > > >                Based on following backend information added skip on guc enabled platforms.
> > > > > 
> > > > > basically there is a quirk in GuC scheduling where if a context reaches the head of the queue and can't be scheduled it blocks the rest of the queue. A queue is an engine class. So in this case if the user submits to VCS0, VCS0, then VCS1 and the first submission to VCS0 is spinner the VCS1 submission is blocked. This more or less is exactly what this test is doing, thus it hangs. We have a request with the GuC firmware team to be able to tweak this head of queue blocking behaviour but don't expect to land anytime soon. Also in the real world this isn't an issue as the user should always be using VEs which should never block the head of the queue unless all the engines within the class are busy.
> > > > > 
> > > > > Test is expected to fail with GuC submission, skip it in CI.
> > > > 
> > > > Does "blocks the rest of the queue" mean unrelated contexts submitted
> > > > against the same engine class?
> > > > 
> > > 
> > > Yes.
> > > 
> > > > If so then it would be a DoS vector and the "user _should_ always" would not
> > > > be sufficient.
> > > > 
> > > 
> > > This is a DoS vector but there are about a million others and this no
> > > worse than most.
> > 
> > Adding new ones should not be taken lightly.

I have used the wrong terminology here / didn't mean we shouldn't take
DoS seriously. What I really meant to say there are million ways a
malicious user can temporarily deny other users service (e.g. just
create 1000s of contexts with hang batches to all engines), in both
cases we have protections to eventually detect a bad user (hangcheck)
and ban it unblocking other users. IMO a user using physical engines
when it shouldn't and user intentionally hogging engines with hanging
batches are basically the same thing - bad user software. This is
non-issue for well behavied UMDs, there is not a hard DoS vector exposed
here, nor is there a new temporary DoS vector exposed that didn't
already exist.

Matt

> > 
> > > > Or if the blockage is localised to a single context then it might be fine
> > > > (but unfortunate) if on top we chose to disallow submission to non-virtual
> > > > indices in the engine map (in case of GuC)? If the firmware bug is not
> > > 
> > > We discussed this we basically land on if the UMDs want to do something
> > > stupid, let them as with all the other DoS in the i915. We likely can't
> > > disable non-virtual submission as some UMDs want to explictly place some
> > > contexts on certain engines (compute). In that case the UMD has to be
> > > smart enough to not submit contexts in a way to expose this scheduling
> > > quirk.
> > 
> > "Quirk"... :) Why it happens though? Is the firmware scheduling with GEM
> > context granularity, and not intel_context, and that is the disconnect?
> > 
> 
> The firmware has no idea of GEM contexts or requests only contexts (a LRC).
> 
> The scheduling queue is per class, if the HoQ can't be scheduled it
> blocks scheduling for that queue until the HoQ can be scheduled. If the
> user is using VEs then the HoQ can't block unless all engines within the
> class are full. This all goes back to making VEs optional to the user,
> once we did that we have exposed ourselves to dump users.
> 
> Again this not a bug in the GuC firmware, this is by design and was SoB
> by multiple architects. The i915 team doesn't control the GuC firmware
> arch BTW. We can ask for changes, but at the end of the day we can't
> force any changes without SoB from multiple architects, on multiple
> teams.
> 
> The current proposal is add a per class KMD controlled policy which
> controls the search depth of the queue to find a context which can be
> scheduled (e.g. search so many entires past of the HoQ). It is likely to
> get implemented.
> 
> > > > getting fixed that is. I may be on the wrong track here since I am not 100%
> > > 
> > > Just because the GuC scheduling doesn't work like execlists doesn't mean
> > > that it is bug. Checking for the HoQ only is done for a good reason -
> > > performance a uC can do everything and anything like execlists as it is
> > > single low power CPU controling the scheduling of an entire GT. We can't
> > > protect against everything a user can do that is stupid.
> > > 
> > > FWIW we do have an open task assigned to the GuC team to allow a KMD
> > > configurable search depth when the queue can't be scheduled. No idea
> > > when this is going to get implemented.
> > 
> > This maybe too specific. Question rather could be why is something not
> > runnable put at the head of the queue by the firmware. Sounds like a plain
> > bug to me.
> > 
> 
> See above. As far as I'm concerned this is not a bug.
> 
> Also see Daniel's comments, this is basically a broken test which
> assumes certain scheduler behavior. It is not testing ABI or a POR
> arch requirement.
> 
> > > > certain I figured out why it exactly gets stuck.
> > > > 
> > > > Because, looking at the bonded-pair to start with, if the test is emitting a
> > > > pair of request on the same context, spinner first, then a another one with
> > > > a semaphore dependency I am not sure why it hangs. When the spinner switches
> > > > out after time slice expires the second request should run, cancel the
> > > > spinner and exit. At which point they are both complete.
> > > > 
> > > 
> > > I think only the MT version of bonded-pair hangs but it has been a while
> > > since I looked at this.
> > > 
> > > IMO this fix is 100% correct as this is a known, tracked issue. It was
> > > agreed upon (arch, i915, GuC team) that we just skip these tests with
> > > GuC submission.
> > 
> > I915 team is here on upstream as well.
> > 
> > Record those acks publicly would be my ask. Unless some security by
> > obscurity is happening here? Until then from me it is a soft nack to keep
> > disabling tests which show genuine weaknesses in GuC mode. Soft until we get
> > a public record of exactly what is broken and in what circumstances, acked
> > by architects publicly as you say they acked it somewhere. Commit message
> > devoid of detail is not good enough.
> 
> I'm fine with not fixing this but you'd have to ask the CI if they can
> live with this. If they can't (it crashes CI runs) then we have to skip
> this within the test.
> 
> Matt
> 
> > 
> > Regards,
> > 
> > Tvrtko