* [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
@ 2021-12-03 14:56 ravitejax.goud.talla
2021-12-03 15:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4) Patchwork
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: ravitejax.goud.talla @ 2021-12-03 14:56 UTC (permalink / raw)
To: intel-gfx, tejaskumarx.surendrakumar.upadhyay, hariom.pandey
Cc: ravitejax.goud.talla
From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Bspec page says "Reset: BUS", Accordingly moving w/a's:
Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
Which will resolve guc enabling error
v2:
- Previous patch rev2 was created by email client which caused the
Build failure, This v2 is to resolve the previous broken series
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index c3211325c2d3..3113266c286e 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
GAMT_CHKN_BIT_REG,
GAMT_CHKN_DISABLE_L3_COH_PIPE);
+ /* Wa_1407352427:icl,ehl */
+ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
+ PSDUNIT_CLKGATE_DIS);
+
+ /* Wa_1406680159:icl,ehl */
+ wa_write_or(wal,
+ SUBSLICE_UNIT_LEVEL_CLKGATE,
+ GWUNIT_CLKGATE_DIS);
+
/* Wa_1607087056:icl,ehl,jsl */
if (IS_ICELAKE(i915) ||
IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
@@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
- /* Wa_1407352427:icl,ehl */
- wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
- PSDUNIT_CLKGATE_DIS);
-
- /* Wa_1406680159:icl,ehl */
- wa_write_or(wal,
- SUBSLICE_UNIT_LEVEL_CLKGATE,
- GWUNIT_CLKGATE_DIS);
-
/*
* Wa_1408767742:icl[a2..forever],ehl[all]
* Wa_1605460711:icl[a0..c0]
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4)
2021-12-03 14:56 [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() ravitejax.goud.talla
@ 2021-12-03 15:44 ` Patchwork
2021-12-03 22:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-09 17:21 ` [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() Lucas De Marchi
2 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-12-03 15:44 UTC (permalink / raw)
To: ravitejax.goud.talla; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6945 bytes --]
== Series Details ==
Series: drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4)
URL : https://patchwork.freedesktop.org/series/97208/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10961 -> Patchwork_21747
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/index.html
Participating hosts (42 -> 34)
------------------------------
Additional (1): fi-icl-u2
Missing (9): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus bat-jsl-2 bat-jsl-1
Known issues
------------
Here are the changes found in Patchwork_21747 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-rkl-guc: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-rkl-guc/igt@amdgpu/amd_basic@cs-gfx.html
* igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-bsw-nick/igt@amdgpu/amd_basic@semaphore.html
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@amdgpu/amd_cs_nop@fork-gfx0.html
* igt@gem_huc_copy@huc-copy:
- fi-icl-u2: NOTRUN -> [SKIP][4] ([i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][6] ([fdo#111827]) +8 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: NOTRUN -> [SKIP][7] ([fdo#109278]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][8] ([fdo#109285])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [PASS][9] -> [DMESG-WARN][10] ([i915#295]) +12 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([i915#3301])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-icl-u2/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_engines:
- fi-rkl-guc: [INCOMPLETE][12] ([i915#4432]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-nick: [DMESG-FAIL][14] ([i915#2927] / [i915#3428]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][16] ([i915#4269]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@kms_psr@primary_page_flip:
- fi-skl-6600u: [INCOMPLETE][18] ([i915#198] / [i915#4547]) -> [FAIL][19] ([i915#4547])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
* igt@runner@aborted:
- fi-skl-6600u: [FAIL][20] ([i915#2722] / [i915#3363] / [i915#4312]) -> [FAIL][21] ([i915#3363] / [i915#4312])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/fi-skl-6600u/igt@runner@aborted.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/fi-skl-6600u/igt@runner@aborted.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4432]: https://gitlab.freedesktop.org/drm/intel/issues/4432
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
Build changes
-------------
* Linux: CI_DRM_10961 -> Patchwork_21747
CI-20190529: 20190529
CI_DRM_10961: e7bbdc541b4748718cd6ce8b839f3db335f3a0fc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6299: 0933b7ccdb2bb054b6a8154171e35315d84299b7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21747: e0466373118faa8fc29b4b359732688ed3505281 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e0466373118f drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/index.html
[-- Attachment #2: Type: text/html, Size: 8185 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4)
2021-12-03 14:56 [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() ravitejax.goud.talla
2021-12-03 15:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4) Patchwork
@ 2021-12-03 22:32 ` Patchwork
2021-12-09 17:21 ` [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() Lucas De Marchi
2 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-12-03 22:32 UTC (permalink / raw)
To: ravitejax.goud.talla; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30285 bytes --]
== Series Details ==
Series: drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4)
URL : https://patchwork.freedesktop.org/series/97208/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10961_full -> Patchwork_21747_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_21747_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-apl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [FAIL][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) ([i915#4386]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl3/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl6/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl6/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl6/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl7/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl7/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl8/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl8/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl8/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl1/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl1/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl1/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl1/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl2/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl2/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl2/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl2/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl3/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl3/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl3/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl8/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl8/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl8/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl8/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl1/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl1/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl1/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl2/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl2/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl2/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl4/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl4/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl4/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/boot.html
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@psr2:
- shard-iclb: [PASS][51] -> [SKIP][52] ([i915#658])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-iclb2/igt@feature_discovery@psr2.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb5/igt@feature_discovery@psr2.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][53] -> [TIMEOUT][54] ([i915#3063] / [i915#3648])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-tglb1/igt@gem_eio@unwedge-stress.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][55] -> [FAIL][56] ([i915#2842])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-iclb: [PASS][57] -> [FAIL][58] ([i915#2842])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-iclb8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_params@secure-non-master:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#112283])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb5/igt@gem_exec_params@secure-non-master.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][60] -> [SKIP][61] ([i915#2190])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-tglb2/igt@gem_huc_copy@huc-copy.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb6/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random:
- shard-kbl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#4613]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl3/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@random-engines:
- shard-apl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#4613])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/igt@gem_lmem_swapping@random-engines.html
* igt@gem_userptr_blits@input-checking:
- shard-iclb: NOTRUN -> [DMESG-WARN][64] ([i915#3002])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb6/igt@gem_userptr_blits@input-checking.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][65] -> [DMESG-WARN][66] ([i915#1436] / [i915#716])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl6/igt@gen9_exec_parse@allowed-single.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl10/igt@gen9_exec_parse@allowed-single.html
* igt@i915_suspend@forcewake:
- shard-apl: NOTRUN -> [DMESG-WARN][67] ([i915#180])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/igt@i915_suspend@forcewake.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][68] -> [DMESG-WARN][69] ([i915#180]) +5 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl7/igt@i915_suspend@sysfs-reader.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl2/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271]) +80 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [PASS][71] -> [DMESG-WARN][72] ([i915#118])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk3/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#3777]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][74] ([i915#3743])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#3886])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk9/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][76] ([i915#3689]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb1/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#3886]) +5 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#3886]) +3 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#3886]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@vga-edid-read:
- shard-apl: NOTRUN -> [SKIP][80] ([fdo#109271] / [fdo#111827]) +4 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl3/igt@kms_chamelium@vga-edid-read.html
* igt@kms_color_chamelium@pipe-a-ctm-0-5:
- shard-iclb: NOTRUN -> [SKIP][81] ([fdo#109284] / [fdo#111827])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb6/igt@kms_color_chamelium@pipe-a-ctm-0-5.html
* igt@kms_color_chamelium@pipe-a-ctm-limited-range:
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [fdo#111827]) +3 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk9/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-kbl: NOTRUN -> [SKIP][83] ([fdo#109271] / [fdo#111827]) +9 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl3/igt@kms_color_chamelium@pipe-b-ctm-0-5.html
* igt@kms_color_chamelium@pipe-b-gamma:
- shard-tglb: NOTRUN -> [SKIP][84] ([fdo#109284] / [fdo#111827]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb5/igt@kms_color_chamelium@pipe-b-gamma.html
* igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
- shard-skl: NOTRUN -> [SKIP][85] ([fdo#109271] / [fdo#111827]) +2 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
* igt@kms_content_protection@atomic-dpms:
- shard-kbl: NOTRUN -> [TIMEOUT][86] ([i915#1319])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl4/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-tglb: NOTRUN -> [SKIP][87] ([i915#3116])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb5/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@srm:
- shard-apl: NOTRUN -> [TIMEOUT][88] ([i915#1319])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@pipe-b-cursor-32x10-sliding:
- shard-iclb: NOTRUN -> [SKIP][89] ([fdo#109278])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-32x10-sliding.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-random:
- shard-glk: NOTRUN -> [SKIP][90] ([fdo#109271]) +32 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk9/igt@kms_cursor_crc@pipe-d-cursor-256x256-random.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-skl: [PASS][91] -> [FAIL][92] ([i915#2346])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][93] -> [FAIL][94] ([i915#79])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1:
- shard-skl: [PASS][95] -> [FAIL][96] ([i915#2122])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: NOTRUN -> [DMESG-WARN][97] ([i915#180]) +4 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-tglb: NOTRUN -> [SKIP][98] ([fdo#111825]) +4 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-skl: NOTRUN -> [SKIP][99] ([fdo#109271]) +45 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt:
- shard-kbl: NOTRUN -> [SKIP][100] ([fdo#109271]) +114 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl3/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][101] -> [FAIL][102] ([i915#1188])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-kbl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#533])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl3/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][104] -> [DMESG-WARN][105] ([i915#180]) +1 similar issue
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-apl: NOTRUN -> [FAIL][106] ([fdo#108145] / [i915#265])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-kbl: NOTRUN -> [FAIL][107] ([fdo#108145] / [i915#265]) +2 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][108] ([i915#265])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
- shard-skl: NOTRUN -> [FAIL][109] ([i915#265])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
- shard-tglb: NOTRUN -> [SKIP][110] ([i915#2920]) +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-skl: NOTRUN -> [SKIP][111] ([fdo#109271] / [i915#658])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-glk: NOTRUN -> [SKIP][112] ([fdo#109271] / [i915#658])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk9/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-kbl: NOTRUN -> [SKIP][113] ([fdo#109271] / [i915#658]) +4 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [PASS][114] -> [SKIP][115] ([fdo#109441]) +1 similar issue
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb1/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][116] -> [FAIL][117] ([i915#31])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl1/igt@kms_setmode@basic.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl1/igt@kms_setmode@basic.html
- shard-glk: [PASS][118] -> [FAIL][119] ([i915#31])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk4/igt@kms_setmode@basic.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk8/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-skl: NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#533])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@nouveau_crc@pipe-c-source-rg:
- shard-iclb: NOTRUN -> [SKIP][121] ([i915#2530])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb6/igt@nouveau_crc@pipe-c-source-rg.html
* igt@perf@polling-parameterized:
- shard-apl: [PASS][122] -> [FAIL][123] ([i915#1542])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl4/igt@perf@polling-parameterized.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl8/igt@perf@polling-parameterized.html
* igt@perf_pmu@rc6-suspend:
- shard-skl: [PASS][124] -> [INCOMPLETE][125] ([i915#198])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl9/igt@perf_pmu@rc6-suspend.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl9/igt@perf_pmu@rc6-suspend.html
* igt@prime_vgem@basic-userptr:
- shard-tglb: NOTRUN -> [SKIP][126] ([i915#3301])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb5/igt@prime_vgem@basic-userptr.html
* igt@sysfs_clients@busy:
- shard-apl: NOTRUN -> [SKIP][127] ([fdo#109271] / [i915#2994])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl6/igt@sysfs_clients@busy.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [FAIL][128] ([i915#2846]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-kbl3/igt@gem_exec_fair@basic-deadline.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
- shard-glk: [FAIL][130] ([i915#2846]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk2/igt@gem_exec_fair@basic-deadline.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk3/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][132] ([i915#2842]) -> [PASS][133] +1 similar issue
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [FAIL][134] ([i915#2842]) -> [PASS][135]
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-apl6/igt@gem_exec_fair@basic-none@vcs0.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-apl4/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: [FAIL][136] ([i915#2842]) -> [PASS][137]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-tglb3/igt@gem_exec_fair@basic-pace@bcs0.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb2/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- {shard-rkl}: [FAIL][138] ([i915#2842]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [DMESG-WARN][140] ([i915#180]) -> [PASS][141] +2 similar issues
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][142] ([i915#1436] / [i915#716]) -> [PASS][143]
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk3/igt@gen9_exec_parse@allowed-all.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk9/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@gem-pread:
- {shard-rkl}: [SKIP][144] ([fdo#109308]) -> [PASS][145] +1 similar issue
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@i915_pm_rpm@gem-pread.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@i915_pm_rpm@gem-pread.html
* igt@kms_async_flips@async-flip-with-page-flip-events:
- {shard-rkl}: [SKIP][146] ([i915#1845]) -> [PASS][147] +14 similar issues
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-glk: [DMESG-WARN][148] ([i915#118]) -> [PASS][149]
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-glk9/igt@kms_big_fb@linear-32bpp-rotate-0.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-glk5/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_color@pipe-b-degamma:
- {shard-rkl}: [SKIP][150] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][151]
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_color@pipe-b-degamma.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_color@pipe-b-degamma.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen:
- {shard-rkl}: [SKIP][152] ([fdo#112022] / [i915#4070]) -> [PASS][153] +3 similar issues
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-64x21-random:
- {shard-rkl}: ([SKIP][154], [SKIP][155]) ([fdo#112022] / [i915#4070]) -> [PASS][156]
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_cursor_crc@pipe-b-cursor-64x21-random.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-4/igt@kms_cursor_crc@pipe-b-cursor-64x21-random.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-64x21-random.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][157] ([i915#2346] / [i915#533]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- {shard-rkl}: [SKIP][159] ([fdo#111825] / [i915#4070]) -> [PASS][160] +1 similar issue
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
- shard-skl: [FAIL][161] ([i915#2346]) -> [PASS][162]
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
- {shard-rkl}: [SKIP][163] ([fdo#111314]) -> [PASS][164] +2 similar issues
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-rkl-1/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1:
- shard-skl: [FAIL][165] ([i915#2122]) -> [PASS][166] +1 similar issue
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-skl3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-skl3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-tglb: [FAIL][167] ([i915#2122]) -> [PASS][168]
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10961/shard-tglb2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/shard-tglb6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- {shard-rkl}: [SKIP][169] ([i915#1849]) -
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21747/index.html
[-- Attachment #2: Type: text/html, Size: 33453 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-03 14:56 [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() ravitejax.goud.talla
2021-12-03 15:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4) Patchwork
2021-12-03 22:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-12-09 17:21 ` Lucas De Marchi
2021-12-11 1:22 ` Matt Roper
2 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2021-12-09 17:21 UTC (permalink / raw)
To: ravitejax.goud.talla; +Cc: intel-gfx, hariom.pandey
On Fri, Dec 03, 2021 at 08:26:03PM +0530, ravitejax.goud.talla@intel.com wrote:
>From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>
>Bspec page says "Reset: BUS", Accordingly moving w/a's:
>Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
>Which will resolve guc enabling error
>
>v2:
> - Previous patch rev2 was created by email client which caused the
> Build failure, This v2 is to resolve the previous broken series
>
>Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
>Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
It seems like this patch is needed to be able to load GuC in ICL:
https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
And that is failing on Linus' master branch as of
2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I found these commits:
1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
commit adding the WA
2) 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
moving the WA to rcs_engine_wa_init()
However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
bug report GuC loading was working on 5.13. So I suspect the move
to GuC 62.0.0 made the checks more strict, or there is another patch
that paired with that one makes load fail to load.
Anyway, it seems that commit is the one to fix and we probably need to
bring both moves to stable (5.15.y and 5.10.y ?), besides propagating
it to drm-intel-fixes so it applies to 5.16
Cc'ing some more people.
Lucas De Marchi
>---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>index c3211325c2d3..3113266c286e 100644
>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>@@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> GAMT_CHKN_BIT_REG,
> GAMT_CHKN_DISABLE_L3_COH_PIPE);
>
>+ /* Wa_1407352427:icl,ehl */
>+ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
>+ PSDUNIT_CLKGATE_DIS);
>+
>+ /* Wa_1406680159:icl,ehl */
>+ wa_write_or(wal,
>+ SUBSLICE_UNIT_LEVEL_CLKGATE,
>+ GWUNIT_CLKGATE_DIS);
>+
> /* Wa_1607087056:icl,ehl,jsl */
> if (IS_ICELAKE(i915) ||
> IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
>@@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
> VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
>
>- /* Wa_1407352427:icl,ehl */
>- wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
>- PSDUNIT_CLKGATE_DIS);
>-
>- /* Wa_1406680159:icl,ehl */
>- wa_write_or(wal,
>- SUBSLICE_UNIT_LEVEL_CLKGATE,
>- GWUNIT_CLKGATE_DIS);
>-
> /*
> * Wa_1408767742:icl[a2..forever],ehl[all]
> * Wa_1605460711:icl[a0..c0]
>--
>2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-09 17:21 ` [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() Lucas De Marchi
@ 2021-12-11 1:22 ` Matt Roper
2021-12-11 1:41 ` John Harrison
2021-12-11 5:28 ` Lucas De Marchi
0 siblings, 2 replies; 9+ messages in thread
From: Matt Roper @ 2021-12-11 1:22 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: ravitejax.goud.talla, intel-gfx, hariom.pandey
On Thu, Dec 09, 2021 at 09:21:39AM -0800, Lucas De Marchi wrote:
> On Fri, Dec 03, 2021 at 08:26:03PM +0530, ravitejax.goud.talla@intel.com wrote:
> > From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
> >
> > Bspec page says "Reset: BUS", Accordingly moving w/a's:
> > Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
> > Which will resolve guc enabling error
> >
> > v2:
> > - Previous patch rev2 was created by email client which caused the
> > Build failure, This v2 is to resolve the previous broken series
> >
> > Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> > Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>
> It seems like this patch is needed to be able to load GuC in ICL:
> https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
>
> And that is failing on Linus' master branch as of
> 2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
> and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I found these commits:
>
> 1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
> commit adding the WA
> 2) 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
> moving the WA to rcs_engine_wa_init()
>
> However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
> bug report GuC loading was working on 5.13. So I suspect the move
> to GuC 62.0.0 made the checks more strict, or there is another patch
This is correct. Having "GT workarounds" on the engine list by accident
used to be harmless (because i915 [with execlist submission] and the guc
[with guc submission]) would simply re-apply the register setting more
often than it really needed to. However the more recent GuC versions
have become more picky about the set of registers they're willing to
save/restore for workarounds and will fail to load if they see a
register on the save/restore list that isn't something they think is
appropriate for an engine reset.
GuC submission isn't officially supported on ICL; you can force it via
module parameter, which taints the kernel and takes you through untested
codepaths, so you do so at your own risk. Given that, I don't think
there's any real need to worry about getting this backported to specific
stable kernels; having the workaround in the wrong place doesn't
actually harm anything on the official and default non-GuC mode.
Matt
> that paired with that one makes load fail to load.
>
> Anyway, it seems that commit is the one to fix and we probably need to
> bring both moves to stable (5.15.y and 5.10.y ?), besides propagating
> it to drm-intel-fixes so it applies to 5.16
>
> Cc'ing some more people.
>
>
> Lucas De Marchi
>
>
>
>
> > ---
> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++---------
> > 1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > index c3211325c2d3..3113266c286e 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > @@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> > GAMT_CHKN_BIT_REG,
> > GAMT_CHKN_DISABLE_L3_COH_PIPE);
> >
> > + /* Wa_1407352427:icl,ehl */
> > + wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> > + PSDUNIT_CLKGATE_DIS);
> > +
> > + /* Wa_1406680159:icl,ehl */
> > + wa_write_or(wal,
> > + SUBSLICE_UNIT_LEVEL_CLKGATE,
> > + GWUNIT_CLKGATE_DIS);
> > +
> > /* Wa_1607087056:icl,ehl,jsl */
> > if (IS_ICELAKE(i915) ||
> > IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
> > @@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> > wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
> > VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
> >
> > - /* Wa_1407352427:icl,ehl */
> > - wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
> > - PSDUNIT_CLKGATE_DIS);
> > -
> > - /* Wa_1406680159:icl,ehl */
> > - wa_write_or(wal,
> > - SUBSLICE_UNIT_LEVEL_CLKGATE,
> > - GWUNIT_CLKGATE_DIS);
> > -
> > /*
> > * Wa_1408767742:icl[a2..forever],ehl[all]
> > * Wa_1605460711:icl[a0..c0]
> > --
> > 2.34.1
> >
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-11 1:22 ` Matt Roper
@ 2021-12-11 1:41 ` John Harrison
2021-12-11 5:30 ` Lucas De Marchi
2021-12-11 5:28 ` Lucas De Marchi
1 sibling, 1 reply; 9+ messages in thread
From: John Harrison @ 2021-12-11 1:41 UTC (permalink / raw)
To: Matt Roper, Lucas De Marchi
Cc: ravitejax.goud.talla, hariom.pandey, intel-gfx
On 12/10/2021 17:22, Matt Roper wrote:
> On Thu, Dec 09, 2021 at 09:21:39AM -0800, Lucas De Marchi wrote:
>> On Fri, Dec 03, 2021 at 08:26:03PM +0530, ravitejax.goud.talla@intel.com wrote:
>>> From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>>
>>> Bspec page says "Reset: BUS", Accordingly moving w/a's:
>>> Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
>>> Which will resolve guc enabling error
>>>
>>> v2:
>>> - Previous patch rev2 was created by email client which caused the
>>> Build failure, This v2 is to resolve the previous broken series
>>>
>>> Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
>>> Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>> It seems like this patch is needed to be able to load GuC in ICL:
>> https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
>>
>> And that is failing on Linus' master branch as of
>> 2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
>> and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I found these commits:
>>
>> 1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
>> commit adding the WA
>> 2) 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
>> moving the WA to rcs_engine_wa_init()
>>
>> However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
>> bug report GuC loading was working on 5.13. So I suspect the move
>> to GuC 62.0.0 made the checks more strict, or there is another patch
> This is correct. Having "GT workarounds" on the engine list by accident
> used to be harmless (because i915 [with execlist submission] and the guc
> [with guc submission]) would simply re-apply the register setting more
> often than it really needed to. However the more recent GuC versions
> have become more picky about the set of registers they're willing to
Actually, I think the GuC was always picky but we haven't supported GuC
submission upstream for quite some time. There was very old support
(never enabled by default) in the VLV timescale. And at that time, we
were not using GuC scheduling anyway, so no save/restore list. I think
by ICL it had already been removed as broken. All you could do was load
the GuC in order to load the HuC. It is only recently with the ADL-P/DG1
support that GuC submission has been re-implemented and the save/restore
list added in.
> save/restore for workarounds and will fail to load if they see a
> register on the save/restore list that isn't something they think is
> appropriate for an engine reset.
>
> GuC submission isn't officially supported on ICL; you can force it via
> module parameter, which taints the kernel and takes you through untested
> codepaths, so you do so at your own risk. Given that, I don't think
> there's any real need to worry about getting this backported to specific
> stable kernels; having the workaround in the wrong place doesn't
> actually harm anything on the official and default non-GuC mode.
As above, even with GuC enabled, I still don't think it is a problem for
any kernel using a GuC version earlier than 62.0.0.
John.
>
>
> Matt
>
>> that paired with that one makes load fail to load.
>>
>> Anyway, it seems that commit is the one to fix and we probably need to
>> bring both moves to stable (5.15.y and 5.10.y ?), besides propagating
>> it to drm-intel-fixes so it applies to 5.16
>>
>> Cc'ing some more people.
>>
>>
>> Lucas De Marchi
>>
>>
>>
>>
>>> ---
>>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++---------
>>> 1 file changed, 9 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> index c3211325c2d3..3113266c286e 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>>> @@ -1224,6 +1224,15 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
>>> GAMT_CHKN_BIT_REG,
>>> GAMT_CHKN_DISABLE_L3_COH_PIPE);
>>>
>>> + /* Wa_1407352427:icl,ehl */
>>> + wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
>>> + PSDUNIT_CLKGATE_DIS);
>>> +
>>> + /* Wa_1406680159:icl,ehl */
>>> + wa_write_or(wal,
>>> + SUBSLICE_UNIT_LEVEL_CLKGATE,
>>> + GWUNIT_CLKGATE_DIS);
>>> +
>>> /* Wa_1607087056:icl,ehl,jsl */
>>> if (IS_ICELAKE(i915) ||
>>> IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0))
>>> @@ -2269,15 +2278,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>>> wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
>>> VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
>>>
>>> - /* Wa_1407352427:icl,ehl */
>>> - wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
>>> - PSDUNIT_CLKGATE_DIS);
>>> -
>>> - /* Wa_1406680159:icl,ehl */
>>> - wa_write_or(wal,
>>> - SUBSLICE_UNIT_LEVEL_CLKGATE,
>>> - GWUNIT_CLKGATE_DIS);
>>> -
>>> /*
>>> * Wa_1408767742:icl[a2..forever],ehl[all]
>>> * Wa_1605460711:icl[a0..c0]
>>> --
>>> 2.34.1
>>>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-11 1:22 ` Matt Roper
2021-12-11 1:41 ` John Harrison
@ 2021-12-11 5:28 ` Lucas De Marchi
1 sibling, 0 replies; 9+ messages in thread
From: Lucas De Marchi @ 2021-12-11 5:28 UTC (permalink / raw)
To: Matt Roper; +Cc: ravitejax.goud.talla, hariom.pandey, intel-gfx
On Fri, Dec 10, 2021 at 05:22:54PM -0800, Matt Roper wrote:
>On Thu, Dec 09, 2021 at 09:21:39AM -0800, Lucas De Marchi wrote:
>> On Fri, Dec 03, 2021 at 08:26:03PM +0530, ravitejax.goud.talla@intel.com wrote:
>> > From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>> >
>> > Bspec page says "Reset: BUS", Accordingly moving w/a's:
>> > Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
>> > Which will resolve guc enabling error
>> >
>> > v2:
>> > - Previous patch rev2 was created by email client which caused the
>> > Build failure, This v2 is to resolve the previous broken series
>> >
>> > Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
>> > Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>
>> It seems like this patch is needed to be able to load GuC in ICL:
>> https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
>>
>> And that is failing on Linus' master branch as of
>> 2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
>> and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I found these commits:
>>
>> 1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
>> commit adding the WA
>> 2) 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
>> moving the WA to rcs_engine_wa_init()
>>
>> However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
>> bug report GuC loading was working on 5.13. So I suspect the move
>> to GuC 62.0.0 made the checks more strict, or there is another patch
>
>This is correct. Having "GT workarounds" on the engine list by accident
>used to be harmless (because i915 [with execlist submission] and the guc
>[with guc submission]) would simply re-apply the register setting more
>often than it really needed to. However the more recent GuC versions
>have become more picky about the set of registers they're willing to
>save/restore for workarounds and will fail to load if they see a
>register on the save/restore list that isn't something they think is
>appropriate for an engine reset.
>
>GuC submission isn't officially supported on ICL; you can force it via
>module parameter, which taints the kernel and takes you through untested
>codepaths, so you do so at your own risk. Given that, I don't think
>there's any real need to worry about getting this backported to specific
>stable kernels; having the workaround in the wrong place doesn't
>actually harm anything on the official and default non-GuC mode.
the discussion on gitlab sidetracked talking about GuC submission. This
is _not_ about GuC submission though: it's enable_guc=2 so it's simply
being used to load HuC.
Given it's a trivial move of the WA to the _right_ place that allows
people to continue using HuC as they were, I strongly disagree with
that statement. Yes, people use the module parameters at their own risk,
but we do fix it when it makes sense. If it was a pretty complex patch
we could decide to the other side of not porting it, but it's not the
case here.
Lucas De Marchi
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-11 1:41 ` John Harrison
@ 2021-12-11 5:30 ` Lucas De Marchi
2021-12-11 7:03 ` John Harrison
0 siblings, 1 reply; 9+ messages in thread
From: Lucas De Marchi @ 2021-12-11 5:30 UTC (permalink / raw)
To: John Harrison; +Cc: ravitejax.goud.talla, hariom.pandey, intel-gfx
On Fri, Dec 10, 2021 at 05:41:46PM -0800, John Harrison wrote:
>On 12/10/2021 17:22, Matt Roper wrote:
>>On Thu, Dec 09, 2021 at 09:21:39AM -0800, Lucas De Marchi wrote:
>>>On Fri, Dec 03, 2021 at 08:26:03PM +0530, ravitejax.goud.talla@intel.com wrote:
>>>>From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>>>
>>>>Bspec page says "Reset: BUS", Accordingly moving w/a's:
>>>>Wa_1407352427,Wa_1406680159 to proper function icl_gt_workarounds_init()
>>>>Which will resolve guc enabling error
>>>>
>>>>v2:
>>>> - Previous patch rev2 was created by email client which caused the
>>>> Build failure, This v2 is to resolve the previous broken series
>>>>
>>>>Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
>>>>Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>>It seems like this patch is needed to be able to load GuC in ICL:
>>>https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
>>>
>>>And that is failing on Linus' master branch as of
>>>2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
>>>and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I found these commits:
>>>
>>> 1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
>>> commit adding the WA
>>> 2) 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
>>> moving the WA to rcs_engine_wa_init()
>>>
>>>However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
>>>bug report GuC loading was working on 5.13. So I suspect the move
>>>to GuC 62.0.0 made the checks more strict, or there is another patch
>>This is correct. Having "GT workarounds" on the engine list by accident
>>used to be harmless (because i915 [with execlist submission] and the guc
>>[with guc submission]) would simply re-apply the register setting more
>>often than it really needed to. However the more recent GuC versions
>>have become more picky about the set of registers they're willing to
>Actually, I think the GuC was always picky but we haven't supported
>GuC submission upstream for quite some time. There was very old
>support (never enabled by default) in the VLV timescale. And at that
>time, we were not using GuC scheduling anyway, so no save/restore
>list. I think by ICL it had already been removed as broken. All you
>could do was load the GuC in order to load the HuC. It is only
>recently with the ADL-P/DG1 support that GuC submission has been
>re-implemented and the save/restore list added in.
as I said in my other reply to Matt, it's not GuC sumbmission that got
broken though: it's enable_guc=2.
>
>
>>save/restore for workarounds and will fail to load if they see a
>>register on the save/restore list that isn't something they think is
>>appropriate for an engine reset.
>>
>>GuC submission isn't officially supported on ICL; you can force it via
>>module parameter, which taints the kernel and takes you through untested
>>codepaths, so you do so at your own risk. Given that, I don't think
>>there's any real need to worry about getting this backported to specific
>>stable kernels; having the workaround in the wrong place doesn't
>>actually harm anything on the official and default non-GuC mode.
>As above, even with GuC enabled, I still don't think it is a problem
>for any kernel using a GuC version earlier than 62.0.0.
so that rules out 5.10 and the only stable we need this on is 5.15 which
is pretty easy and applies cleanly.
Lucas De Marchi
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init()
2021-12-11 5:30 ` Lucas De Marchi
@ 2021-12-11 7:03 ` John Harrison
0 siblings, 0 replies; 9+ messages in thread
From: John Harrison @ 2021-12-11 7:03 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: ravitejax.goud.talla, hariom.pandey, intel-gfx
On 12/10/2021 21:30, Lucas De Marchi wrote:
> On Fri, Dec 10, 2021 at 05:41:46PM -0800, John Harrison wrote:
>> On 12/10/2021 17:22, Matt Roper wrote:
>>> On Thu, Dec 09, 2021 at 09:21:39AM -0800, Lucas De Marchi wrote:
>>>> On Fri, Dec 03, 2021 at 08:26:03PM +0530,
>>>> ravitejax.goud.talla@intel.com wrote:
>>>>> From: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>>>>
>>>>> Bspec page says "Reset: BUS", Accordingly moving w/a's:
>>>>> Wa_1407352427,Wa_1406680159 to proper function
>>>>> icl_gt_workarounds_init()
>>>>> Which will resolve guc enabling error
>>>>>
>>>>> v2:
>>>>> - Previous patch rev2 was created by email client which caused the
>>>>> Build failure, This v2 is to resolve the previous broken series
>>>>>
>>>>> Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
>>>>> Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
>>>> It seems like this patch is needed to be able to load GuC in ICL:
>>>> https://gitlab.freedesktop.org/drm/intel/-/issues/4067#note_1184951
>>>>
>>>> And that is failing on Linus' master branch as of
>>>> 2a987e65025e ("Merge tag 'perf-tools-fixes-for-v5.16-2021-12-07' of
>>>> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux")
>>>> and (at least) 5.15.*. Looking at the appropriate "Fixes" tag I
>>>> found these commits:
>>>>
>>>> 1) 1cd21a7c5679 ("drm/i915: Add Wa_1407352427:icl,ehl") - original
>>>> commit adding the WA
>>>> 2) 3551ff928744 ("drm/i915/gen11: Moving WAs to
>>>> rcs_engine_wa_init()")
>>>> moving the WA to rcs_engine_wa_init()
>>>>
>>>> However (2) is on v5.7-rc1 and (1) is on v5.6-rc1 and according to the
>>>> bug report GuC loading was working on 5.13. So I suspect the move
>>>> to GuC 62.0.0 made the checks more strict, or there is another patch
>>> This is correct. Having "GT workarounds" on the engine list by
>>> accident
>>> used to be harmless (because i915 [with execlist submission] and the
>>> guc
>>> [with guc submission]) would simply re-apply the register setting more
>>> often than it really needed to. However the more recent GuC versions
>>> have become more picky about the set of registers they're willing to
>> Actually, I think the GuC was always picky but we haven't supported
>> GuC submission upstream for quite some time. There was very old
>> support (never enabled by default) in the VLV timescale. And at that
>> time, we were not using GuC scheduling anyway, so no save/restore
>> list. I think by ICL it had already been removed as broken. All you
>> could do was load the GuC in order to load the HuC. It is only
>> recently with the ADL-P/DG1 support that GuC submission has been
>> re-implemented and the save/restore list added in.
>
> as I said in my other reply to Matt, it's not GuC sumbmission that got
> broken though: it's enable_guc=2.
My point is that it wasn't broken until we added the GuC submission
support. Doesn't matter whether submission is enabled or not. Until it
was implemented, there was no save/restore list. After it was
implemented, the list was created even for enable_guc=2 as it is part of
initialising the GuC.
John.
>
>>
>>
>>> save/restore for workarounds and will fail to load if they see a
>>> register on the save/restore list that isn't something they think is
>>> appropriate for an engine reset.
>>>
>>> GuC submission isn't officially supported on ICL; you can force it via
>>> module parameter, which taints the kernel and takes you through
>>> untested
>>> codepaths, so you do so at your own risk. Given that, I don't think
>>> there's any real need to worry about getting this backported to
>>> specific
>>> stable kernels; having the workaround in the wrong place doesn't
>>> actually harm anything on the official and default non-GuC mode.
>> As above, even with GuC enabled, I still don't think it is a problem
>> for any kernel using a GuC version earlier than 62.0.0.
>
> so that rules out 5.10 and the only stable we need this on is 5.15 which
> is pretty easy and applies cleanly.
>
> Lucas De Marchi
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-12-11 7:03 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-03 14:56 [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() ravitejax.goud.talla
2021-12-03 15:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() (rev4) Patchwork
2021-12-03 22:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-12-09 17:21 ` [Intel-gfx] [v2] drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() Lucas De Marchi
2021-12-11 1:22 ` Matt Roper
2021-12-11 1:41 ` John Harrison
2021-12-11 5:30 ` Lucas De Marchi
2021-12-11 7:03 ` John Harrison
2021-12-11 5:28 ` Lucas De Marchi
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