* [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema
@ 2021-12-17 16:56 Thierry Reding
2021-12-17 16:56 ` [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: " Thierry Reding
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Thierry Reding @ 2021-12-17 16:56 UTC (permalink / raw)
To: Wolfram Sang, Rob Herring
Cc: Peter Rosin, Andrew Jeffery, Brendan Higgins,
Benjamin Herrenschmidt, Joel Stanley, linux-i2c, devicetree,
linux-tegra
From: Thierry Reding <treding@nvidia.com>
Convert the Tegra I2C controller bindings from plain text to json-schema
format.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- include i2c-controller.yaml and use unevaluatedProperties: false
.../bindings/i2c/nvidia,tegra20-i2c.txt | 87 --------
.../bindings/i2c/nvidia,tegra20-i2c.yaml | 192 ++++++++++++++++++
2 files changed, 192 insertions(+), 87 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
deleted file mode 100644
index 3f2f990c2e62..000000000000
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ /dev/null
@@ -1,87 +0,0 @@
-NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
-
-Required properties:
-- compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
- "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
- For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
- "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
- tegra124, tegra132, or tegra210.
- Details of compatible are as follows:
- nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
- controller. This only support master mode of I2C communication. Register
- interface/offset and interrupts handling are different than generic I2C
- controller. Driver of DVC I2C controller is only compatible with
- "nvidia,tegra20-i2c-dvc".
- nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
- master and slave mode of I2C communication. The i2c-tegra driver only
- support master mode of I2C communication. Driver of I2C controller is
- only compatible with "nvidia,tegra20-i2c".
- nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is
- very much similar to Tegra20 I2C controller with additional feature:
- Continue Transfer Support. This feature helps to implement M_NO_START
- as per I2C core API transfer flags. Driver of I2C controller is
- compatible with "nvidia,tegra30-i2c" to enable the continue transfer
- support. This is also compatible with "nvidia,tegra20-i2c" without
- continue transfer support.
- nvidia,tegra114-i2c: Tegra114 has 5 generic I2C controller. This controller is
- very much similar to Tegra30 I2C controller with some hardware
- modification:
- - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and
- fast-clk. Tegra114 has only one clock source called as div-clk and
- hence clock mechanism is changed in I2C controller.
- - Tegra30/Tegra20 I2C controller has enabled per packet transfer by
- default and there is no way to disable it. Tegra114 has this
- interrupt disable by default and SW need to enable explicitly.
- Due to above changes, Tegra114 I2C driver makes incompatible with
- previous hardware driver. Hence, tegra114 I2C controller is compatible
- with "nvidia,tegra114-i2c".
- nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus
- and is part of VE power domain and typically used for camera use-cases.
- This VI I2C controller is mostly compatible with the programming model
- of the regular I2C controllers with a few exceptions. The I2C registers
- start at an offset of 0xc00 (instead of 0), registers are 16 bytes
- apart (rather than 4) and the controller does not support slave mode.
-- reg: Should contain I2C controller registers physical address and length.
-- interrupts: Should contain I2C controller interrupts.
-- address-cells: Address cells for I2C device address.
-- size-cells: Size of the I2C device address.
-- clocks: Must contain an entry for each entry in clock-names.
- See ../clocks/clock-bindings.txt for details.
-- clock-names: Must include the following entries:
- Tegra20/Tegra30:
- - div-clk
- - fast-clk
- Tegra114:
- - div-clk
- Tegra210:
- - div-clk
- - slow (only for nvidia,tegra210-i2c-vi compatible node)
-- resets: Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names: Must include the following entries:
- - i2c
-- power-domains: Only for nvidia,tegra210-i2c-vi compatible node and must
- include venc powergate node as vi i2c is part of VE power domain.
- tegra210-i2c-vi:
- - pd_venc
-- dmas: Must contain an entry for each entry in clock-names.
- See ../dma/dma.txt for details.
-- dma-names: Must include the following entries:
- - rx
- - tx
-
-Example:
-
- i2c@7000c000 {
- compatible = "nvidia,tegra20-i2c";
- reg = <0x7000c000 0x100>;
- interrupts = <0 38 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 12>, <&tegra_car 124>;
- clock-names = "div-clk", "fast-clk";
- resets = <&tegra_car 12>;
- reset-names = "i2c";
- dmas = <&apbdma 16>, <&apbdma 16>;
- dma-names = "rx", "tx";
- };
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
new file mode 100644
index 000000000000..424a4fc218b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
@@ -0,0 +1,192 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+ - Jon Hunter <jonathanh@nvidia.com>
+
+title: NVIDIA Tegra I2C controller driver
+
+properties:
+ compatible:
+ oneOf:
+ - description: Tegra20 has 4 generic I2C controller. This can support
+ master and slave mode of I2C communication. The i2c-tegra driver
+ only support master mode of I2C communication. Driver of I2C
+ controller is only compatible with "nvidia,tegra20-i2c".
+ const: nvidia,tegra20-i2c
+ - description: Tegra20 has specific I2C controller called as DVC I2C
+ controller. This only support master mode of I2C communication.
+ Register interface/offset and interrupts handling are different than
+ generic I2C controller. Driver of DVC I2C controller is only
+ compatible with "nvidia,tegra20-i2c-dvc".
+ const: nvidia,tegra20-i2c-dvc
+ - description: |
+ Tegra30 has 5 generic I2C controller. This controller is very much
+ similar to Tegra20 I2C controller with additional feature: Continue
+ Transfer Support. This feature helps to implement M_NO_START as per
+ I2C core API transfer flags. Driver of I2C controller is compatible
+ with "nvidia,tegra30-i2c" to enable the continue transfer support.
+ This is also compatible with "nvidia,tegra20-i2c" without continue
+ transfer support.
+ items:
+ - const: nvidia,tegra30-i2c
+ - const: nvidia,tegra20-i2c
+ - description: |
+ Tegra114 has 5 generic I2C controllers. This controller is very much
+ similar to Tegra30 I2C controller with some hardware modification:
+ - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk
+ and fast-clk. Tegra114 has only one clock source called as
+ div-clk and hence clock mechanism is changed in I2C controller.
+ - Tegra30/Tegra20 I2C controller has enabled per packet transfer
+ by default and there is no way to disable it. Tegra114 has this
+ interrupt disable by default and SW need to enable explicitly.
+ Due to above changes, Tegra114 I2C driver makes incompatible with
+ previous hardware driver. Hence, Tegra114 I2C controller is
+ compatible with "nvidia,tegra114-i2c".
+ const: nvidia,tegra114-i2c
+ - description: |
+ Tegra124 has 6 generic I2C controllers. These controllers are very
+ similar to those found on Tegra114 but also contain several hardware
+ improvements and new registers.
+ const: nvidia,tegra124-i2c
+ - description: |
+ Tegra210 has 6 generic I2C controllers. These controllers are very
+ similar to those found on Tegra124.
+ items:
+ - const: nvidia,tegra210-i2c
+ - const: nvidia,tegra124-i2c
+ - description: |
+ Tegra210 has one I2C controller that is on host1x bus and is part of
+ the VE power domain and typically used for camera use-cases. This VI
+ I2C controller is mostly compatible with the programming model of
+ the regular I2C controllers with a few exceptions. The I2C registers
+ start at an offset of 0xc00 (instead of 0), registers are 16 bytes
+ apart (rather than 4) and the controller does not support slave
+ mode.
+ const: nvidia,tegra210-i2c-vi
+ - description: |
+ Tegra186 has 9 generic I2C controllers, two of which are in the AON
+ (always-on) partition of the SoC. All of these controllers are very
+ similar to those found on Tegra210.
+ const: nvidia,tegra186-i2c
+ - description: |
+ Tegra194 has 8 generic I2C controllers, two of which are in the AON
+ (always-on) partition of the SoC. All of these controllers are very
+ similar to those found on Tegra186. However, these controllers have
+ support for 64 KiB transactions whereas earlier chips supported no
+ more than 4 KiB per transactions.
+ const: nvidia,tegra194-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+
+ resets:
+ items:
+ - description: module reset
+
+ reset-names:
+ items:
+ - const: i2c
+
+ dmas:
+ items:
+ - description: DMA channel for the reception FIFO
+ - description: DMA channel for the transmission FIFO
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra20-i2c
+ - nvidia,tegra30-i2c
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: div-clk
+ - const: fast-clk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: nvidia,tegra114-i2c
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: div-clk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: nvidia,tegra210-i2c
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: div-clk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: nvidia,tegra210-i2c-vi
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: div-clk
+ - const: slow
+ power-domains:
+ items:
+ - description: phandle to the VENC power domain
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ i2c@7000c000 {
+ compatible = "nvidia,tegra20-i2c";
+ reg = <0x7000c000 0x100>;
+ interrupts = <0 38 0x04>;
+ clocks = <&tegra_car 12>, <&tegra_car 124>;
+ clock-names = "div-clk", "fast-clk";
+ resets = <&tegra_car 12>;
+ reset-names = "i2c";
+ dmas = <&apbdma 16>, <&apbdma 16>;
+ dma-names = "rx", "tx";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: Convert to json-schema
2021-12-17 16:56 [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema Thierry Reding
@ 2021-12-17 16:56 ` Thierry Reding
2021-12-17 22:30 ` Rob Herring
2021-12-17 16:56 ` [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties Thierry Reding
` (2 subsequent siblings)
3 siblings, 1 reply; 8+ messages in thread
From: Thierry Reding @ 2021-12-17 16:56 UTC (permalink / raw)
To: Wolfram Sang, Rob Herring
Cc: Peter Rosin, Andrew Jeffery, Brendan Higgins,
Benjamin Herrenschmidt, Joel Stanley, linux-i2c, devicetree,
linux-tegra
From: Thierry Reding <treding@nvidia.com>
Convert the pinctrl-based I2C mux bindings from the free-form text
format to json-schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../bindings/i2c/i2c-mux-pinctrl.txt | 93 ----------------
.../bindings/i2c/i2c-mux-pinctrl.yaml | 103 ++++++++++++++++++
2 files changed, 103 insertions(+), 93 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt
deleted file mode 100644
index 997a287ed3f6..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt
+++ /dev/null
@@ -1,93 +0,0 @@
-Pinctrl-based I2C Bus Mux
-
-This binding describes an I2C bus multiplexer that uses pin multiplexing to
-route the I2C signals, and represents the pin multiplexing configuration
-using the pinctrl device tree bindings.
-
- +-----+ +-----+
- | dev | | dev |
- +------------------------+ +-----+ +-----+
- | SoC | | |
- | /----|------+--------+
- | +---+ +------+ | child bus A, on first set of pins
- | |I2C|---|Pinmux| |
- | +---+ +------+ | child bus B, on second set of pins
- | \----|------+--------+--------+
- | | | | |
- +------------------------+ +-----+ +-----+ +-----+
- | dev | | dev | | dev |
- +-----+ +-----+ +-----+
-
-Required properties:
-- compatible: i2c-mux-pinctrl
-- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
- port is connected to.
-
-Also required are:
-
-* Standard pinctrl properties that specify the pin mux state for each child
- bus. See ../pinctrl/pinctrl-bindings.txt.
-
-* Standard I2C mux properties. See i2c-mux.yaml in this directory.
-
-* I2C child bus nodes. See i2c-mux.yaml in this directory.
-
-For each named state defined in the pinctrl-names property, an I2C child bus
-will be created. I2C child bus numbers are assigned based on the index into
-the pinctrl-names property.
-
-The only exception is that no bus will be created for a state named "idle". If
-such a state is defined, it must be the last entry in pinctrl-names. For
-example:
-
- pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1
- pinctrl-names = "ddc", "idle", "pta" -> Invalid ("idle" not last)
- pinctrl-names = "idle", "ddc", "pta" -> Invalid ("idle" not last)
-
-Whenever an access is made to a device on a child bus, the relevant pinctrl
-state will be programmed into hardware.
-
-If an idle state is defined, whenever an access is not being made to a device
-on a child bus, the idle pinctrl state will be programmed into hardware.
-
-If an idle state is not defined, the most recently used pinctrl state will be
-left programmed into hardware whenever no access is being made of a device on
-a child bus.
-
-Example:
-
- i2cmux {
- compatible = "i2c-mux-pinctrl";
- #address-cells = <1>;
- #size-cells = <0>;
-
- i2c-parent = <&i2c1>;
-
- pinctrl-names = "ddc", "pta", "idle";
- pinctrl-0 = <&state_i2cmux_ddc>;
- pinctrl-1 = <&state_i2cmux_pta>;
- pinctrl-2 = <&state_i2cmux_idle>;
-
- i2c@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- eeprom {
- compatible = "eeprom";
- reg = <0x50>;
- };
- };
-
- i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- eeprom {
- compatible = "eeprom";
- reg = <0x50>;
- };
- };
- };
-
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml
new file mode 100644
index 000000000000..2e3d555eb96c
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Pinctrl-based I2C Bus Mux
+
+maintainers:
+ - Wolfram Sang <wsa@kernel.org>
+
+description: |
+ This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
+ signals, and represents the pin multiplexing configuration using the pinctrl device tree
+ bindings.
+
+ +-----+ +-----+
+ | dev | | dev |
+ +------------------------+ +-----+ +-----+
+ | SoC | | |
+ | /----|------+--------+
+ | +---+ +------+ | child bus A, on first set of pins
+ | |I2C|---|Pinmux| |
+ | +---+ +------+ | child bus B, on second set of pins
+ | \----|------+--------+--------+
+ | | | | |
+ +------------------------+ +-----+ +-----+ +-----+
+ | dev | | dev | | dev |
+ +-----+ +-----+ +-----+
+
+ For each named state defined in the pinctrl-names property, an I2C child bus will be created.
+ I2C child bus numbers are assigned based on the index into the pinctrl-names property.
+
+ The only exception is that no bus will be created for a state named "idle". If such a state is
+ defined, it must be the last entry in pinctrl-names. For example:
+
+ pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1
+ pinctrl-names = "ddc", "idle", "pta" -> Invalid ("idle" not last)
+ pinctrl-names = "idle", "ddc", "pta" -> Invalid ("idle" not last)
+
+ Whenever an access is made to a device on a child bus, the relevant pinctrl state will be
+ programmed into hardware.
+
+ If an idle state is defined, whenever an access is not being made to a device on a child bus,
+ the idle pinctrl state will be programmed into hardware.
+
+ If an idle state is not defined, the most recently used pinctrl state will be left programmed
+ into hardware whenever no access is being made of a device on a child bus.
+
+properties:
+ compatible:
+ const: i2c-mux-pinctrl
+
+ i2c-parent:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle of the I2C bus that this multiplexer's master-side port is connected
+ to.
+
+allOf:
+ - $ref: i2c-mux.yaml
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - i2c-parent
+
+examples:
+ - |
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&i2c1>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ };
+ };
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ };
+ };
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties
2021-12-17 16:56 [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema Thierry Reding
2021-12-17 16:56 ` [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: " Thierry Reding
@ 2021-12-17 16:56 ` Thierry Reding
2021-12-17 22:35 ` Rob Herring
2021-12-17 16:56 ` [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema Thierry Reding
2021-12-17 22:29 ` [PATCH v2 1/4] dt-bindings: i2c: tegra: " Rob Herring
3 siblings, 1 reply; 8+ messages in thread
From: Thierry Reding @ 2021-12-17 16:56 UTC (permalink / raw)
To: Wolfram Sang, Rob Herring
Cc: Peter Rosin, Andrew Jeffery, Brendan Higgins,
Benjamin Herrenschmidt, Joel Stanley, linux-i2c, devicetree,
linux-tegra
From: Thierry Reding <treding@nvidia.com>
Document the interrupt-controller and #interrupt-cells properties that
are used by some instances of the aspeed-i2c device tree nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
index f597f73ccd87..2a74551c72c0 100644
--- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
@@ -28,6 +28,12 @@ properties:
interrupts:
maxItems: 1
+ interrupt-controller:
+ description: marks this device as being an interrupt provider
+
+ "#interrupt-cells":
+ const: 1
+
clocks:
maxItems: 1
description:
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema
2021-12-17 16:56 [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema Thierry Reding
2021-12-17 16:56 ` [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: " Thierry Reding
2021-12-17 16:56 ` [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties Thierry Reding
@ 2021-12-17 16:56 ` Thierry Reding
2021-12-17 22:36 ` Rob Herring
2021-12-17 22:29 ` [PATCH v2 1/4] dt-bindings: i2c: tegra: " Rob Herring
3 siblings, 1 reply; 8+ messages in thread
From: Thierry Reding @ 2021-12-17 16:56 UTC (permalink / raw)
To: Wolfram Sang, Rob Herring
Cc: Peter Rosin, Andrew Jeffery, Brendan Higgins,
Benjamin Herrenschmidt, Joel Stanley, linux-i2c, devicetree,
linux-tegra
From: Thierry Reding <treding@nvidia.com>
Convert the GPIO-based I2C mux bindings from the free-form text format
to json-schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../devicetree/bindings/i2c/i2c-mux-gpio.txt | 80 --------------
.../devicetree/bindings/i2c/i2c-mux-gpio.yaml | 103 ++++++++++++++++++
2 files changed, 103 insertions(+), 80 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt
deleted file mode 100644
index d4cf10582a26..000000000000
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt
+++ /dev/null
@@ -1,80 +0,0 @@
-GPIO-based I2C Bus Mux
-
-This binding describes an I2C bus multiplexer that uses GPIOs to
-route the I2C signals.
-
- +-----+ +-----+
- | dev | | dev |
- +------------+ +-----+ +-----+
- | SoC | | |
- | | /--------+--------+
- | +------+ | +------+ child bus A, on GPIO value set to 0
- | | I2C |-|--| Mux |
- | +------+ | +--+---+ child bus B, on GPIO value set to 1
- | | | \----------+--------+--------+
- | +------+ | | | | |
- | | GPIO |-|-----+ +-----+ +-----+ +-----+
- | +------+ | | dev | | dev | | dev |
- +------------+ +-----+ +-----+ +-----+
-
-Required properties:
-- compatible: i2c-mux-gpio
-- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
- port is connected to.
-- mux-gpios: list of gpios used to control the muxer
-* Standard I2C mux properties. See i2c-mux.yaml in this directory.
-* I2C child bus nodes. See i2c-mux.yaml in this directory.
-
-Optional properties:
-- idle-state: value to set the muxer to when idle. When no value is
- given, it defaults to the last value used.
-
-For each i2c child node, an I2C child bus will be created. They will
-be numbered based on their order in the device tree.
-
-Whenever an access is made to a device on a child bus, the value set
-in the relevant node's reg property will be output using the list of
-GPIOs, the first in the list holding the least-significant value.
-
-If an idle state is defined, using the idle-state (optional) property,
-whenever an access is not being made to a device on a child bus, the
-GPIOs will be set according to the idle value.
-
-If an idle state is not defined, the most recently used value will be
-left programmed into hardware whenever no access is being made to a
-device on a child bus.
-
-Example:
- i2cmux {
- compatible = "i2c-mux-gpio";
- #address-cells = <1>;
- #size-cells = <0>;
- mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
- i2c-parent = <&i2c1>;
-
- i2c@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ssd1307: oled@3c {
- compatible = "solomon,ssd1307fb-i2c";
- reg = <0x3c>;
- pwms = <&pwm 4 3000>;
- reset-gpios = <&gpio2 7 1>;
- };
- };
-
- i2c@3 {
- reg = <3>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pca9555: pca9555@20 {
- compatible = "nxp,pca9555";
- gpio-controller;
- #gpio-cells = <2>;
- reg = <0x20>;
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml
new file mode 100644
index 000000000000..6934a445e226
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/i2c-mux-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GPIO-based I2C Bus Mux
+
+maintainers:
+ - Wolfram Sang <wsa@kernel.org>
+
+description: |
+ This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.
+
+ +-----+ +-----+
+ | dev | | dev |
+ +------------+ +-----+ +-----+
+ | SoC | | |
+ | | /--------+--------+
+ | +------+ | +------+ child bus A, on GPIO value set to 0
+ | | I2C |-|--| Mux |
+ | +------+ | +--+---+ child bus B, on GPIO value set to 1
+ | | | \----------+--------+--------+
+ | +------+ | | | | |
+ | | GPIO |-|-----+ +-----+ +-----+ +-----+
+ | +------+ | | dev | | dev | | dev |
+ +------------+ +-----+ +-----+ +-----+
+
+ For each I2C child node, an I2C child bus will be created. They will be numbered based on their
+ order in the device tree.
+
+ Whenever an access is made to a device on a child bus, the value set in the relevant node's reg
+ property will be output using the list of GPIOs, the first in the list holding the least-
+ significant value.
+
+ If an idle state is defined, using the idle-state (optional) property, whenever an access is not
+ being made to a device on a child bus, the GPIOs will be set according to the idle value.
+
+ If an idle state is not defined, the most recently used value will be left programmed into
+ hardware whenever no access is being made to a device on a child bus.
+
+properties:
+ compatible:
+ const: i2c-mux-gpio
+
+ i2c-parent:
+ description: phandle of the I2C bus that this multiplexer's master-side port is connected to
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+
+ mux-gpios:
+ description: list of GPIOs used to control the muxer
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+
+ idle-state:
+ description: Value to set the muxer to when idle. When no value is given, it defaults to the
+ last value used.
+ $ref: "/schemas/types.yaml#/definitions/uint32"
+
+allOf:
+ - $ref: i2c-mux.yaml
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - i2c-parent
+ - mux-gpios
+
+examples:
+ - |
+ i2cmux {
+ compatible = "i2c-mux-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
+ i2c-parent = <&i2c1>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ssd1307: oled@3c {
+ compatible = "solomon,ssd1307fb-i2c";
+ reg = <0x3c>;
+ pwms = <&pwm 4 3000>;
+ reset-gpios = <&gpio2 7 1>;
+ };
+ };
+
+ i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pca9555: pca9555@20 {
+ compatible = "nxp,pca9555";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x20>;
+ };
+ };
+ };
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema
2021-12-17 16:56 [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema Thierry Reding
` (2 preceding siblings ...)
2021-12-17 16:56 ` [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema Thierry Reding
@ 2021-12-17 22:29 ` Rob Herring
3 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-12-17 22:29 UTC (permalink / raw)
To: Thierry Reding
Cc: Peter Rosin, Brendan Higgins, Benjamin Herrenschmidt,
linux-tegra, devicetree, linux-i2c, Andrew Jeffery, Wolfram Sang,
Joel Stanley, Rob Herring
On Fri, 17 Dec 2021 17:56:55 +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Convert the Tegra I2C controller bindings from plain text to json-schema
> format.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v2:
> - include i2c-controller.yaml and use unevaluatedProperties: false
>
> .../bindings/i2c/nvidia,tegra20-i2c.txt | 87 --------
> .../bindings/i2c/nvidia,tegra20-i2c.yaml | 192 ++++++++++++++++++
> 2 files changed, 192 insertions(+), 87 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
> create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
>
Applied, thanks!
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: Convert to json-schema
2021-12-17 16:56 ` [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: " Thierry Reding
@ 2021-12-17 22:30 ` Rob Herring
0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-12-17 22:30 UTC (permalink / raw)
To: Thierry Reding
Cc: Joel Stanley, Wolfram Sang, Rob Herring, Peter Rosin,
Brendan Higgins, Andrew Jeffery, devicetree,
Benjamin Herrenschmidt, linux-tegra, linux-i2c
On Fri, 17 Dec 2021 17:56:56 +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Convert the pinctrl-based I2C mux bindings from the free-form text
> format to json-schema.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../bindings/i2c/i2c-mux-pinctrl.txt | 93 ----------------
> .../bindings/i2c/i2c-mux-pinctrl.yaml | 103 ++++++++++++++++++
> 2 files changed, 103 insertions(+), 93 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml
>
Applied, thanks!
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties
2021-12-17 16:56 ` [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties Thierry Reding
@ 2021-12-17 22:35 ` Rob Herring
0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-12-17 22:35 UTC (permalink / raw)
To: Thierry Reding
Cc: Wolfram Sang, Peter Rosin, Andrew Jeffery, Brendan Higgins,
Benjamin Herrenschmidt, Joel Stanley, linux-i2c, devicetree,
linux-tegra
On Fri, Dec 17, 2021 at 05:56:57PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Document the interrupt-controller and #interrupt-cells properties that
> are used by some instances of the aspeed-i2c device tree nodes.
I though you agreed with my patch removing "#interrupt-cells"? I thought
the interrupt part was split to another node "aspeed,ast2500-i2c-ic".
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> index f597f73ccd87..2a74551c72c0 100644
> --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml
> @@ -28,6 +28,12 @@ properties:
> interrupts:
> maxItems: 1
>
> + interrupt-controller:
> + description: marks this device as being an interrupt provider
> +
> + "#interrupt-cells":
> + const: 1
> +
> clocks:
> maxItems: 1
> description:
> --
> 2.34.1
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema
2021-12-17 16:56 ` [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema Thierry Reding
@ 2021-12-17 22:36 ` Rob Herring
0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2021-12-17 22:36 UTC (permalink / raw)
To: Thierry Reding
Cc: Peter Rosin, devicetree, Andrew Jeffery, Joel Stanley,
Wolfram Sang, Rob Herring, Benjamin Herrenschmidt, linux-tegra,
linux-i2c, Brendan Higgins
On Fri, 17 Dec 2021 17:56:58 +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Convert the GPIO-based I2C mux bindings from the free-form text format
> to json-schema.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../devicetree/bindings/i2c/i2c-mux-gpio.txt | 80 --------------
> .../devicetree/bindings/i2c/i2c-mux-gpio.yaml | 103 ++++++++++++++++++
> 2 files changed, 103 insertions(+), 80 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml
>
Applied, thanks!
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-12-17 22:36 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-17 16:56 [PATCH v2 1/4] dt-bindings: i2c: tegra: Convert to json-schema Thierry Reding
2021-12-17 16:56 ` [PATCH 2/4] dt-bindings: i2c: i2c-mux-pinctrl: " Thierry Reding
2021-12-17 22:30 ` Rob Herring
2021-12-17 16:56 ` [PATCH 3/4] dt-bindings: i2c: aspeed: Document interrupt controller properties Thierry Reding
2021-12-17 22:35 ` Rob Herring
2021-12-17 16:56 ` [PATCH 4/4] dt-bindings: i2c: i2c-mux-gpio: Convert to json-schema Thierry Reding
2021-12-17 22:36 ` Rob Herring
2021-12-17 22:29 ` [PATCH v2 1/4] dt-bindings: i2c: tegra: " Rob Herring
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.