* [PATCH 1/5] hw/scsi/megasas: Use uint32_t for reply queue head/tail values
2021-12-18 15:10 [PATCH 0/5] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 4) Philippe Mathieu-Daudé
@ 2021-12-18 15:10 ` Philippe Mathieu-Daudé
2021-12-21 23:13 ` Richard Henderson
2021-12-18 15:10 ` [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument Philippe Mathieu-Daudé
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-12-18 15:10 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Philippe Mathieu-Daudé,
Alexander Bulekov, Gerd Hoffmann, Paolo Bonzini, Sven Schnelle
While the reply queue values fit in 16-bit, they are accessed
as 32-bit:
661: s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
662: s->reply_queue_head %= MEGASAS_MAX_FRAMES;
663: s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
664: s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
Having:
41:#define MEGASAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */
In order to update the ld/st*_pci_dma() API to pass the address
of the value to access, it is simpler to have the head/tail declared
as 32-bit values. Replace the uint16_t by uint32_t, wasting 4 bytes in
the MegasasState structure.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/scsi/megasas.c | 4 ++--
hw/scsi/trace-events | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 066f30e3f22..cf8adf39ca1 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -109,8 +109,8 @@ struct MegasasState {
uint64_t reply_queue_pa;
void *reply_queue;
uint16_t reply_queue_len;
- uint16_t reply_queue_head;
- uint16_t reply_queue_tail;
+ uint32_t reply_queue_head;
+ uint32_t reply_queue_tail;
uint64_t consumer_pa;
uint64_t producer_pa;
diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events
index 92d5b40f892..ae8551f2797 100644
--- a/hw/scsi/trace-events
+++ b/hw/scsi/trace-events
@@ -42,18 +42,18 @@ mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_
# megasas.c
megasas_init_firmware(uint64_t pa) "pa 0x%" PRIx64 " "
-megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx64 " tail 0x%" PRIx64 " flags 0x%x"
+megasas_init_queue(uint64_t queue_pa, int queue_len, uint32_t head, uint32_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx32 " tail 0x%" PRIx32 " flags 0x%x"
megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
megasas_initq_mapped(uint64_t pa) "queue already mapped at 0x%" PRIx64
megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
megasas_qf_mapped(unsigned int index) "skip mapped frame 0x%x"
megasas_qf_new(unsigned int index, uint64_t frame) "frame 0x%x addr 0x%" PRIx64
megasas_qf_busy(unsigned long pa) "all frames busy for frame 0x%lx"
-megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame 0x%x count %d context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d"
-megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head 0x%x tail 0x%x busy %d"
+megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uint32_t head, uint32_t tail, unsigned int busy) "frame 0x%x count %d context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
+megasas_qf_update(uint32_t head, uint32_t tail, unsigned int busy) "head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
megasas_qf_complete_noirq(uint64_t context) "context 0x%" PRIx64 " "
-megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context 0x%" PRIx64 " head 0x%x tail 0x%x busy %d"
+megasas_qf_complete(uint64_t context, uint32_t head, uint32_t tail, int busy) "context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u"
megasas_frame_busy(uint64_t addr) "frame 0x%" PRIx64 " busy"
megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd 0x%x"
megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
--
2.33.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/5] hw/scsi/megasas: Use uint32_t for reply queue head/tail values
2021-12-18 15:10 ` [PATCH 1/5] hw/scsi/megasas: Use uint32_t for reply queue head/tail values Philippe Mathieu-Daudé
@ 2021-12-21 23:13 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-12-21 23:13 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Alexander Bulekov, Gerd Hoffmann,
Paolo Bonzini, Sven Schnelle
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
> While the reply queue values fit in 16-bit, they are accessed
> as 32-bit:
>
> 661: s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
> 662: s->reply_queue_head %= MEGASAS_MAX_FRAMES;
> 663: s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
> 664: s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
>
> Having:
>
> 41:#define MEGASAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */
>
> In order to update the ld/st*_pci_dma() API to pass the address
> of the value to access, it is simpler to have the head/tail declared
> as 32-bit values. Replace the uint16_t by uint32_t, wasting 4 bytes in
> the MegasasState structure.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@redhat.com>
> ---
> hw/scsi/megasas.c | 4 ++--
> hw/scsi/trace-events | 8 ++++----
> 2 files changed, 6 insertions(+), 6 deletions(-)
Acked-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument
2021-12-18 15:10 [PATCH 0/5] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 4) Philippe Mathieu-Daudé
2021-12-18 15:10 ` [PATCH 1/5] hw/scsi/megasas: Use uint32_t for reply queue head/tail values Philippe Mathieu-Daudé
@ 2021-12-18 15:10 ` Philippe Mathieu-Daudé
2021-12-21 23:14 ` Richard Henderson
2021-12-18 15:10 ` [PATCH 3/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
` (2 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-12-18 15:10 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Philippe Mathieu-Daudé,
Alexander Bulekov, Gerd Hoffmann, Paolo Bonzini, Sven Schnelle
Let devices specify transaction attributes when calling st*_pci_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 11 ++++++-----
hw/audio/intel-hda.c | 10 ++++++----
hw/net/eepro100.c | 29 ++++++++++++++++++-----------
hw/net/tulip.c | 18 ++++++++++--------
hw/scsi/megasas.c | 15 ++++++++++-----
hw/scsi/vmw_pvscsi.c | 3 ++-
6 files changed, 52 insertions(+), 34 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8c5f2ed5054..9f51ef2c3c2 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -859,11 +859,12 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
MEMTXATTRS_UNSPECIFIED); \
return val; \
} \
- static inline void st##_s##_pci_dma(PCIDevice *dev, \
- dma_addr_t addr, uint##_bits##_t val) \
- { \
- st##_s##_dma(pci_get_address_space(dev), addr, val, \
- MEMTXATTRS_UNSPECIFIED); \
+ static inline void st##_s##_pci_dma(PCIDevice *dev, \
+ dma_addr_t addr, \
+ uint##_bits##_t val, \
+ MemTxAttrs attrs) \
+ { \
+ st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \
}
PCI_DMA_DEFINE_LDST(ub, b, 8);
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index fb3d34a4a0c..3309ae0ea18 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -345,6 +345,7 @@ static void intel_hda_corb_run(IntelHDAState *d)
static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t response)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
HDACodecBus *bus = HDA_BUS(dev->qdev.parent_bus);
IntelHDAState *d = container_of(bus, IntelHDAState, codecs);
hwaddr addr;
@@ -367,8 +368,8 @@ static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t res
ex = (solicited ? 0 : (1 << 4)) | dev->cad;
wp = (d->rirb_wp + 1) & 0xff;
addr = intel_hda_addr(d->rirb_lbase, d->rirb_ubase);
- stl_le_pci_dma(&d->pci, addr + 8*wp, response);
- stl_le_pci_dma(&d->pci, addr + 8*wp + 4, ex);
+ stl_le_pci_dma(&d->pci, addr + 8 * wp, response, attrs);
+ stl_le_pci_dma(&d->pci, addr + 8 * wp + 4, ex, attrs);
d->rirb_wp = wp;
dprint(d, 2, "%s: [wp 0x%x] response 0x%x, extra 0x%x\n",
@@ -394,6 +395,7 @@ static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t res
static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
uint8_t *buf, uint32_t len)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
HDACodecBus *bus = HDA_BUS(dev->qdev.parent_bus);
IntelHDAState *d = container_of(bus, IntelHDAState, codecs);
hwaddr addr;
@@ -428,7 +430,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
st->be, st->bp, st->bpl[st->be].len, copy);
pci_dma_rw(&d->pci, st->bpl[st->be].addr + st->bp, buf, copy, !output,
- MEMTXATTRS_UNSPECIFIED);
+ attrs);
st->lpib += copy;
st->bp += copy;
buf += copy;
@@ -451,7 +453,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
if (d->dp_lbase & 0x01) {
s = st - d->st;
addr = intel_hda_addr(d->dp_lbase & ~0x01, d->dp_ubase);
- stl_le_pci_dma(&d->pci, addr + 8*s, st->lpib);
+ stl_le_pci_dma(&d->pci, addr + 8 * s, st->lpib, attrs);
}
dprint(d, 3, "dma: --\n");
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index 16e95ef9cc9..83c4431b1ad 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -700,6 +700,8 @@ static void set_ru_state(EEPRO100State * s, ru_state_t state)
static void dump_statistics(EEPRO100State * s)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
+
/* Dump statistical data. Most data is never changed by the emulation
* and always 0, so we first just copy the whole block and then those
* values which really matter.
@@ -707,16 +709,18 @@ static void dump_statistics(EEPRO100State * s)
*/
pci_dma_write(&s->dev, s->statsaddr, &s->statistics, s->stats_size);
stl_le_pci_dma(&s->dev, s->statsaddr + 0,
- s->statistics.tx_good_frames);
+ s->statistics.tx_good_frames, attrs);
stl_le_pci_dma(&s->dev, s->statsaddr + 36,
- s->statistics.rx_good_frames);
+ s->statistics.rx_good_frames, attrs);
stl_le_pci_dma(&s->dev, s->statsaddr + 48,
- s->statistics.rx_resource_errors);
+ s->statistics.rx_resource_errors, attrs);
stl_le_pci_dma(&s->dev, s->statsaddr + 60,
- s->statistics.rx_short_frame_errors);
+ s->statistics.rx_short_frame_errors, attrs);
#if 0
- stw_le_pci_dma(&s->dev, s->statsaddr + 76, s->statistics.xmt_tco_frames);
- stw_le_pci_dma(&s->dev, s->statsaddr + 78, s->statistics.rcv_tco_frames);
+ stw_le_pci_dma(&s->dev, s->statsaddr + 76,
+ s->statistics.xmt_tco_frames, attrs);
+ stw_le_pci_dma(&s->dev, s->statsaddr + 78,
+ s->statistics.rcv_tco_frames, attrs);
missing("CU dump statistical counters");
#endif
}
@@ -833,6 +837,7 @@ static void set_multicast_list(EEPRO100State *s)
static void action_command(EEPRO100State *s)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
/* The loop below won't stop if it gets special handcrafted data.
Therefore we limit the number of iterations. */
unsigned max_loop_count = 16;
@@ -911,7 +916,7 @@ static void action_command(EEPRO100State *s)
}
/* Write new status. */
stw_le_pci_dma(&s->dev, s->cb_address,
- s->tx.status | ok_status | STATUS_C);
+ s->tx.status | ok_status | STATUS_C, attrs);
if (bit_i) {
/* CU completed action. */
eepro100_cx_interrupt(s);
@@ -937,6 +942,7 @@ static void action_command(EEPRO100State *s)
static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
cu_state_t cu_state;
switch (val) {
case CU_NOP:
@@ -986,7 +992,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
/* Dump statistical counters. */
TRACE(OTHER, logout("val=0x%02x (dump stats)\n", val));
dump_statistics(s);
- stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005);
+ stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005, attrs);
break;
case CU_CMD_BASE:
/* Load CU base. */
@@ -997,7 +1003,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
/* Dump and reset statistical counters. */
TRACE(OTHER, logout("val=0x%02x (dump stats and reset)\n", val));
dump_statistics(s);
- stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007);
+ stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007, attrs);
memset(&s->statistics, 0, sizeof(s->statistics));
break;
case CU_SRESUME:
@@ -1612,6 +1618,7 @@ static ssize_t nic_receive(NetClientState *nc, const uint8_t * buf, size_t size)
* - Magic packets should set bit 30 in power management driver register.
* - Interesting packets should set bit 29 in power management driver register.
*/
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
EEPRO100State *s = qemu_get_nic_opaque(nc);
uint16_t rfd_status = 0xa000;
#if defined(CONFIG_PAD_RECEIVED_FRAMES)
@@ -1726,9 +1733,9 @@ static ssize_t nic_receive(NetClientState *nc, const uint8_t * buf, size_t size)
TRACE(OTHER, logout("command 0x%04x, link 0x%08x, addr 0x%08x, size %u\n",
rfd_command, rx.link, rx.rx_buf_addr, rfd_size));
stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset +
- offsetof(eepro100_rx_t, status), rfd_status);
+ offsetof(eepro100_rx_t, status), rfd_status, attrs);
stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset +
- offsetof(eepro100_rx_t, count), size);
+ offsetof(eepro100_rx_t, count), size, attrs);
/* Early receive interrupt not supported. */
#if 0
eepro100_er_interrupt(s);
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index ca69f7ea5e1..1f2c79dd58b 100644
--- a/hw/net/tulip.c
+++ b/hw/net/tulip.c
@@ -86,16 +86,18 @@ static void tulip_desc_read(TULIPState *s, hwaddr p,
static void tulip_desc_write(TULIPState *s, hwaddr p,
struct tulip_descriptor *desc)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
+
if (s->csr[0] & CSR0_DBO) {
- stl_be_pci_dma(&s->dev, p, desc->status);
- stl_be_pci_dma(&s->dev, p + 4, desc->control);
- stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1);
- stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2);
+ stl_be_pci_dma(&s->dev, p, desc->status, attrs);
+ stl_be_pci_dma(&s->dev, p + 4, desc->control, attrs);
+ stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs);
+ stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs);
} else {
- stl_le_pci_dma(&s->dev, p, desc->status);
- stl_le_pci_dma(&s->dev, p + 4, desc->control);
- stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1);
- stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2);
+ stl_le_pci_dma(&s->dev, p, desc->status, attrs);
+ stl_le_pci_dma(&s->dev, p + 4, desc->control, attrs);
+ stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs);
+ stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs);
}
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index cf8adf39ca1..bcf8de9aa19 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -168,14 +168,16 @@ static void megasas_frame_set_cmd_status(MegasasState *s,
unsigned long frame, uint8_t v)
{
PCIDevice *pci = &s->parent_obj;
- stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status), v);
+ stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status),
+ v, MEMTXATTRS_UNSPECIFIED);
}
static void megasas_frame_set_scsi_status(MegasasState *s,
unsigned long frame, uint8_t v)
{
PCIDevice *pci = &s->parent_obj;
- stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status), v);
+ stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status),
+ v, MEMTXATTRS_UNSPECIFIED);
}
static inline const char *mfi_frame_desc(unsigned int cmd)
@@ -530,6 +532,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
static void megasas_complete_frame(MegasasState *s, uint64_t context)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
PCIDevice *pci_dev = PCI_DEVICE(s);
int tail, queue_offset;
@@ -543,10 +546,12 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
*/
if (megasas_use_queue64(s)) {
queue_offset = s->reply_queue_head * sizeof(uint64_t);
- stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
+ stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
+ context, attrs);
} else {
queue_offset = s->reply_queue_head * sizeof(uint32_t);
- stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
+ stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
+ context, attrs);
}
s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
trace_megasas_qf_complete(context, s->reply_queue_head,
@@ -560,7 +565,7 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
s->busy);
- stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head);
+ stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head, attrs);
/* Notify HBA */
if (msix_enabled(pci_dev)) {
trace_megasas_msix_raise(0);
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index cd76bd67ab7..59c3e8ba048 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -55,7 +55,8 @@
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field)))
#define RS_SET_FIELD(m, field, val) \
(stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
- (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val))
+ (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val, \
+ MEMTXATTRS_UNSPECIFIED))
struct PVSCSIClass {
PCIDeviceClass parent_class;
--
2.33.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument
2021-12-18 15:10 ` [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument Philippe Mathieu-Daudé
@ 2021-12-21 23:14 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-12-21 23:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Alexander Bulekov, Gerd Hoffmann,
Paolo Bonzini, Sven Schnelle
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling st*_pci_dma().
>
> Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 11 ++++++-----
> hw/audio/intel-hda.c | 10 ++++++----
> hw/net/eepro100.c | 29 ++++++++++++++++++-----------
> hw/net/tulip.c | 18 ++++++++++--------
> hw/scsi/megasas.c | 15 ++++++++++-----
> hw/scsi/vmw_pvscsi.c | 3 ++-
> 6 files changed, 52 insertions(+), 34 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/5] dma: Let ld*_pci_dma() take MemTxAttrs argument
2021-12-18 15:10 [PATCH 0/5] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 4) Philippe Mathieu-Daudé
2021-12-18 15:10 ` [PATCH 1/5] hw/scsi/megasas: Use uint32_t for reply queue head/tail values Philippe Mathieu-Daudé
2021-12-18 15:10 ` [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument Philippe Mathieu-Daudé
@ 2021-12-18 15:10 ` Philippe Mathieu-Daudé
2021-12-21 23:15 ` Richard Henderson
2021-12-18 15:10 ` [PATCH 4/5] dma: Let st*_pci_dma() propagate MemTxResult Philippe Mathieu-Daudé
2021-12-18 15:10 ` [PATCH 5/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-12-18 15:10 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Philippe Mathieu-Daudé,
Alexander Bulekov, Gerd Hoffmann, Paolo Bonzini, Sven Schnelle
Let devices specify transaction attributes when calling ld*_pci_dma().
Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 6 +++---
hw/audio/intel-hda.c | 2 +-
hw/net/eepro100.c | 19 +++++++++++++------
hw/net/tulip.c | 18 ++++++++++--------
hw/scsi/megasas.c | 16 ++++++++++------
hw/scsi/mptsas.c | 10 ++++++----
hw/scsi/vmw_pvscsi.c | 3 ++-
hw/usb/hcd-xhci.c | 1 +
8 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 9f51ef2c3c2..7a46c1fa226 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -852,11 +852,11 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
#define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \
static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \
- dma_addr_t addr) \
+ dma_addr_t addr, \
+ MemTxAttrs attrs) \
{ \
uint##_bits##_t val; \
- ld##_l##_dma(pci_get_address_space(dev), addr, &val, \
- MEMTXATTRS_UNSPECIFIED); \
+ ld##_l##_dma(pci_get_address_space(dev), addr, &val, attrs); \
return val; \
} \
static inline void st##_s##_pci_dma(PCIDevice *dev, \
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index 3309ae0ea18..e34b7ab0e92 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -335,7 +335,7 @@ static void intel_hda_corb_run(IntelHDAState *d)
rp = (d->corb_rp + 1) & 0xff;
addr = intel_hda_addr(d->corb_lbase, d->corb_ubase);
- verb = ldl_le_pci_dma(&d->pci, addr + 4*rp);
+ verb = ldl_le_pci_dma(&d->pci, addr + 4 * rp, MEMTXATTRS_UNSPECIFIED);
d->corb_rp = rp;
dprint(d, 2, "%s: [rp 0x%x] verb 0x%08x\n", __func__, rp, verb);
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index 83c4431b1ad..eb82e9cb118 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -737,6 +737,7 @@ static void read_cb(EEPRO100State *s)
static void tx_command(EEPRO100State *s)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
uint32_t tbd_array = s->tx.tbd_array_addr;
uint16_t tcb_bytes = s->tx.tcb_bytes & 0x3fff;
/* Sends larger than MAX_ETH_FRAME_SIZE are allowed, up to 2600 bytes. */
@@ -772,11 +773,14 @@ static void tx_command(EEPRO100State *s)
/* Extended Flexible TCB. */
for (; tbd_count < 2; tbd_count++) {
uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev,
- tbd_address);
+ tbd_address,
+ attrs);
uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev,
- tbd_address + 4);
+ tbd_address + 4,
+ attrs);
uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev,
- tbd_address + 6);
+ tbd_address + 6,
+ attrs);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (extended flexible mode): buffer address 0x%08x, size 0x%04x\n",
@@ -792,9 +796,12 @@ static void tx_command(EEPRO100State *s)
}
tbd_address = tbd_array;
for (; tbd_count < s->tx.tbd_count; tbd_count++) {
- uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev, tbd_address);
- uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev, tbd_address + 4);
- uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev, tbd_address + 6);
+ uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev, tbd_address,
+ attrs);
+ uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev, tbd_address + 4,
+ attrs);
+ uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev, tbd_address + 6,
+ attrs);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (flexible mode): buffer address 0x%08x, size 0x%04x\n",
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index 1f2c79dd58b..c76e4868f73 100644
--- a/hw/net/tulip.c
+++ b/hw/net/tulip.c
@@ -70,16 +70,18 @@ static const VMStateDescription vmstate_pci_tulip = {
static void tulip_desc_read(TULIPState *s, hwaddr p,
struct tulip_descriptor *desc)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
+
if (s->csr[0] & CSR0_DBO) {
- desc->status = ldl_be_pci_dma(&s->dev, p);
- desc->control = ldl_be_pci_dma(&s->dev, p + 4);
- desc->buf_addr1 = ldl_be_pci_dma(&s->dev, p + 8);
- desc->buf_addr2 = ldl_be_pci_dma(&s->dev, p + 12);
+ desc->status = ldl_be_pci_dma(&s->dev, p, attrs);
+ desc->control = ldl_be_pci_dma(&s->dev, p + 4, attrs);
+ desc->buf_addr1 = ldl_be_pci_dma(&s->dev, p + 8, attrs);
+ desc->buf_addr2 = ldl_be_pci_dma(&s->dev, p + 12, attrs);
} else {
- desc->status = ldl_le_pci_dma(&s->dev, p);
- desc->control = ldl_le_pci_dma(&s->dev, p + 4);
- desc->buf_addr1 = ldl_le_pci_dma(&s->dev, p + 8);
- desc->buf_addr2 = ldl_le_pci_dma(&s->dev, p + 12);
+ desc->status = ldl_le_pci_dma(&s->dev, p, attrs);
+ desc->control = ldl_le_pci_dma(&s->dev, p + 4, attrs);
+ desc->buf_addr1 = ldl_le_pci_dma(&s->dev, p + 8, attrs);
+ desc->buf_addr2 = ldl_le_pci_dma(&s->dev, p + 12, attrs);
}
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index bcf8de9aa19..d6b452f07ce 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -202,7 +202,9 @@ static uint64_t megasas_frame_get_context(MegasasState *s,
unsigned long frame)
{
PCIDevice *pci = &s->parent_obj;
- return ldq_le_pci_dma(pci, frame + offsetof(struct mfi_frame_header, context));
+ return ldq_le_pci_dma(pci,
+ frame + offsetof(struct mfi_frame_header, context),
+ MEMTXATTRS_UNSPECIFIED);
}
static bool megasas_frame_is_ieee_sgl(MegasasCmd *cmd)
@@ -522,7 +524,8 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
s->busy++;
if (s->consumer_pa) {
- s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa,
+ MEMTXATTRS_UNSPECIFIED);
}
trace_megasas_qf_enqueue(cmd->index, cmd->count, cmd->context,
s->reply_queue_head, s->reply_queue_tail, s->busy);
@@ -553,14 +556,14 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
context, attrs);
}
- s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
trace_megasas_qf_complete(context, s->reply_queue_head,
s->reply_queue_tail, s->busy);
}
if (megasas_intr_enabled(s)) {
/* Update reply queue pointer */
- s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
tail = s->reply_queue_head;
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
@@ -625,6 +628,7 @@ static void megasas_abort_command(MegasasCmd *cmd)
static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
PCIDevice *pcid = PCI_DEVICE(s);
uint32_t pa_hi, pa_lo;
hwaddr iq_pa, initq_size = sizeof(struct mfi_init_qinfo);
@@ -663,9 +667,9 @@ static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
pa_lo = le32_to_cpu(initq->pi_addr_lo);
pa_hi = le32_to_cpu(initq->pi_addr_hi);
s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo;
- s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa);
+ s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa, attrs);
s->reply_queue_head %= MEGASAS_MAX_FRAMES;
- s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa);
+ s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa, attrs);
s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
flags = le32_to_cpu(initq->flags);
if (flags & MFI_QUEUE_FLAG_CONTEXT64) {
diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
index f6c77655443..ac9f4dfcd2a 100644
--- a/hw/scsi/mptsas.c
+++ b/hw/scsi/mptsas.c
@@ -172,14 +172,15 @@ static const int mpi_request_sizes[] = {
static dma_addr_t mptsas_ld_sg_base(MPTSASState *s, uint32_t flags_and_length,
dma_addr_t *sgaddr)
{
+ const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
PCIDevice *pci = (PCIDevice *) s;
dma_addr_t addr;
if (flags_and_length & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
- addr = ldq_le_pci_dma(pci, *sgaddr + 4);
+ addr = ldq_le_pci_dma(pci, *sgaddr + 4, attrs);
*sgaddr += 12;
} else {
- addr = ldl_le_pci_dma(pci, *sgaddr + 4);
+ addr = ldl_le_pci_dma(pci, *sgaddr + 4, attrs);
*sgaddr += 8;
}
return addr;
@@ -203,7 +204,7 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
dma_addr_t addr, len;
uint32_t flags_and_length;
- flags_and_length = ldl_le_pci_dma(pci, sgaddr);
+ flags_and_length = ldl_le_pci_dma(pci, sgaddr, MEMTXATTRS_UNSPECIFIED);
len = flags_and_length & MPI_SGE_LENGTH_MASK;
if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
!= MPI_SGE_FLAGS_SIMPLE_ELEMENT ||
@@ -234,7 +235,8 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
break;
}
- flags_and_length = ldl_le_pci_dma(pci, next_chain_addr);
+ flags_and_length = ldl_le_pci_dma(pci, next_chain_addr,
+ MEMTXATTRS_UNSPECIFIED);
if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
!= MPI_SGE_FLAGS_CHAIN_ELEMENT) {
return MPI_IOCSTATUS_INVALID_SGL;
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index 59c3e8ba048..33e16f91116 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -52,7 +52,8 @@
#define RS_GET_FIELD(m, field) \
(ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
- (m)->rs_pa + offsetof(struct PVSCSIRingsState, field)))
+ (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), \
+ MEMTXATTRS_UNSPECIFIED))
#define RS_SET_FIELD(m, field, val) \
(stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val, \
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index da5a4072107..14bdb896768 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -3440,6 +3440,7 @@ static int usb_xhci_post_load(void *opaque, int version_id)
}
ldq_le_dma(xhci->as, dcbaap + 8 * slotid, &addr, MEMTXATTRS_UNSPECIFIED);
slot->ctx = xhci_mask64(addr);
+
xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx));
slot->uport = xhci_lookup_uport(xhci, slot_ctx);
if (!slot->uport) {
--
2.33.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 3/5] dma: Let ld*_pci_dma() take MemTxAttrs argument
2021-12-18 15:10 ` [PATCH 3/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
@ 2021-12-21 23:15 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-12-21 23:15 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Alexander Bulekov, Gerd Hoffmann,
Paolo Bonzini, Sven Schnelle
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
> Let devices specify transaction attributes when calling ld*_pci_dma().
>
> Keep the default MEMTXATTRS_UNSPECIFIED in the few callers.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 6 +++---
> hw/audio/intel-hda.c | 2 +-
> hw/net/eepro100.c | 19 +++++++++++++------
> hw/net/tulip.c | 18 ++++++++++--------
> hw/scsi/megasas.c | 16 ++++++++++------
> hw/scsi/mptsas.c | 10 ++++++----
> hw/scsi/vmw_pvscsi.c | 3 ++-
> hw/usb/hcd-xhci.c | 1 +
> 8 files changed, 46 insertions(+), 29 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 4/5] dma: Let st*_pci_dma() propagate MemTxResult
2021-12-18 15:10 [PATCH 0/5] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 4) Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-12-18 15:10 ` [PATCH 3/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
@ 2021-12-18 15:10 ` Philippe Mathieu-Daudé
2021-12-21 23:16 ` Richard Henderson
2021-12-18 15:10 ` [PATCH 5/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-12-18 15:10 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Philippe Mathieu-Daudé,
Alexander Bulekov, Gerd Hoffmann, Paolo Bonzini, Sven Schnelle
st*_dma() returns a MemTxResult type. Do not discard
it, return it to the caller.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 7a46c1fa226..c90cecc85c0 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -859,12 +859,12 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
ld##_l##_dma(pci_get_address_space(dev), addr, &val, attrs); \
return val; \
} \
- static inline void st##_s##_pci_dma(PCIDevice *dev, \
- dma_addr_t addr, \
- uint##_bits##_t val, \
- MemTxAttrs attrs) \
+ static inline MemTxResult st##_s##_pci_dma(PCIDevice *dev, \
+ dma_addr_t addr, \
+ uint##_bits##_t val, \
+ MemTxAttrs attrs) \
{ \
- st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \
+ return st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \
}
PCI_DMA_DEFINE_LDST(ub, b, 8);
--
2.33.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 4/5] dma: Let st*_pci_dma() propagate MemTxResult
2021-12-18 15:10 ` [PATCH 4/5] dma: Let st*_pci_dma() propagate MemTxResult Philippe Mathieu-Daudé
@ 2021-12-21 23:16 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-12-21 23:16 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Alexander Bulekov, Gerd Hoffmann,
Paolo Bonzini, Sven Schnelle
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
> st*_dma() returns a MemTxResult type. Do not discard
> it, return it to the caller.
>
> Signed-off-by: Philippe Mathieu-Daudé<philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 5/5] dma: Let ld*_pci_dma() propagate MemTxResult
2021-12-18 15:10 [PATCH 0/5] hw: Have DMA API take MemTxAttrs arg & propagate MemTxResult (part 4) Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2021-12-18 15:10 ` [PATCH 4/5] dma: Let st*_pci_dma() propagate MemTxResult Philippe Mathieu-Daudé
@ 2021-12-18 15:10 ` Philippe Mathieu-Daudé
2021-12-21 23:18 ` Richard Henderson
4 siblings, 1 reply; 11+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-12-18 15:10 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Philippe Mathieu-Daudé,
Alexander Bulekov, Gerd Hoffmann, Paolo Bonzini, Sven Schnelle
ld*_dma() returns a MemTxResult type. Do not discard
it, return it to the caller.
Update the few callers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
include/hw/pci/pci.h | 17 ++++++++---------
hw/audio/intel-hda.c | 2 +-
hw/net/eepro100.c | 25 ++++++++++---------------
hw/net/tulip.c | 16 ++++++++--------
hw/scsi/megasas.c | 21 ++++++++++++---------
hw/scsi/mptsas.c | 16 +++++++++++-----
hw/scsi/vmw_pvscsi.c | 16 ++++++++++------
7 files changed, 60 insertions(+), 53 deletions(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index c90cecc85c0..5b36334a28a 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -850,15 +850,14 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
}
-#define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \
- static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \
- dma_addr_t addr, \
- MemTxAttrs attrs) \
- { \
- uint##_bits##_t val; \
- ld##_l##_dma(pci_get_address_space(dev), addr, &val, attrs); \
- return val; \
- } \
+#define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \
+ static inline MemTxResult ld##_l##_pci_dma(PCIDevice *dev, \
+ dma_addr_t addr, \
+ uint##_bits##_t *val, \
+ MemTxAttrs attrs) \
+ { \
+ return ld##_l##_dma(pci_get_address_space(dev), addr, val, attrs); \
+ } \
static inline MemTxResult st##_s##_pci_dma(PCIDevice *dev, \
dma_addr_t addr, \
uint##_bits##_t val, \
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index e34b7ab0e92..2b55d521503 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -335,7 +335,7 @@ static void intel_hda_corb_run(IntelHDAState *d)
rp = (d->corb_rp + 1) & 0xff;
addr = intel_hda_addr(d->corb_lbase, d->corb_ubase);
- verb = ldl_le_pci_dma(&d->pci, addr + 4 * rp, MEMTXATTRS_UNSPECIFIED);
+ ldl_le_pci_dma(&d->pci, addr + 4 * rp, &verb, MEMTXATTRS_UNSPECIFIED);
d->corb_rp = rp;
dprint(d, 2, "%s: [rp 0x%x] verb 0x%08x\n", __func__, rp, verb);
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index eb82e9cb118..679f52f80f1 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -769,18 +769,16 @@ static void tx_command(EEPRO100State *s)
} else {
/* Flexible mode. */
uint8_t tbd_count = 0;
+ uint32_t tx_buffer_address;
+ uint16_t tx_buffer_size;
+ uint16_t tx_buffer_el;
+
if (s->has_extended_tcb_support && !(s->configuration[6] & BIT(4))) {
/* Extended Flexible TCB. */
for (; tbd_count < 2; tbd_count++) {
- uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev,
- tbd_address,
- attrs);
- uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev,
- tbd_address + 4,
- attrs);
- uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev,
- tbd_address + 6,
- attrs);
+ ldl_le_pci_dma(&s->dev, tbd_address, &tx_buffer_address, attrs);
+ lduw_le_pci_dma(&s->dev, tbd_address + 4, &tx_buffer_size, attrs);
+ lduw_le_pci_dma(&s->dev, tbd_address + 6, &tx_buffer_el, attrs);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (extended flexible mode): buffer address 0x%08x, size 0x%04x\n",
@@ -796,12 +794,9 @@ static void tx_command(EEPRO100State *s)
}
tbd_address = tbd_array;
for (; tbd_count < s->tx.tbd_count; tbd_count++) {
- uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev, tbd_address,
- attrs);
- uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev, tbd_address + 4,
- attrs);
- uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev, tbd_address + 6,
- attrs);
+ ldl_le_pci_dma(&s->dev, tbd_address, &tx_buffer_address, attrs);
+ lduw_le_pci_dma(&s->dev, tbd_address + 4, &tx_buffer_size, attrs);
+ lduw_le_pci_dma(&s->dev, tbd_address + 6, &tx_buffer_el, attrs);
tbd_address += 8;
TRACE(RXTX, logout
("TBD (flexible mode): buffer address 0x%08x, size 0x%04x\n",
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index c76e4868f73..d5b6cc5ee69 100644
--- a/hw/net/tulip.c
+++ b/hw/net/tulip.c
@@ -73,15 +73,15 @@ static void tulip_desc_read(TULIPState *s, hwaddr p,
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
if (s->csr[0] & CSR0_DBO) {
- desc->status = ldl_be_pci_dma(&s->dev, p, attrs);
- desc->control = ldl_be_pci_dma(&s->dev, p + 4, attrs);
- desc->buf_addr1 = ldl_be_pci_dma(&s->dev, p + 8, attrs);
- desc->buf_addr2 = ldl_be_pci_dma(&s->dev, p + 12, attrs);
+ ldl_be_pci_dma(&s->dev, p, &desc->status, attrs);
+ ldl_be_pci_dma(&s->dev, p + 4, &desc->control, attrs);
+ ldl_be_pci_dma(&s->dev, p + 8, &desc->buf_addr1, attrs);
+ ldl_be_pci_dma(&s->dev, p + 12, &desc->buf_addr2, attrs);
} else {
- desc->status = ldl_le_pci_dma(&s->dev, p, attrs);
- desc->control = ldl_le_pci_dma(&s->dev, p + 4, attrs);
- desc->buf_addr1 = ldl_le_pci_dma(&s->dev, p + 8, attrs);
- desc->buf_addr2 = ldl_le_pci_dma(&s->dev, p + 12, attrs);
+ ldl_le_pci_dma(&s->dev, p, &desc->status, attrs);
+ ldl_le_pci_dma(&s->dev, p + 4, &desc->control, attrs);
+ ldl_le_pci_dma(&s->dev, p + 8, &desc->buf_addr1, attrs);
+ ldl_le_pci_dma(&s->dev, p + 12, &desc->buf_addr2, attrs);
}
}
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index d6b452f07ce..f523d720959 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -202,9 +202,12 @@ static uint64_t megasas_frame_get_context(MegasasState *s,
unsigned long frame)
{
PCIDevice *pci = &s->parent_obj;
- return ldq_le_pci_dma(pci,
- frame + offsetof(struct mfi_frame_header, context),
- MEMTXATTRS_UNSPECIFIED);
+ uint64_t val;
+
+ ldq_le_pci_dma(pci, frame + offsetof(struct mfi_frame_header, context),
+ &val, MEMTXATTRS_UNSPECIFIED);
+
+ return val;
}
static bool megasas_frame_is_ieee_sgl(MegasasCmd *cmd)
@@ -524,8 +527,8 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
s->busy++;
if (s->consumer_pa) {
- s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa,
- MEMTXATTRS_UNSPECIFIED);
+ ldl_le_pci_dma(pcid, s->consumer_pa, &s->reply_queue_tail,
+ MEMTXATTRS_UNSPECIFIED);
}
trace_megasas_qf_enqueue(cmd->index, cmd->count, cmd->context,
s->reply_queue_head, s->reply_queue_tail, s->busy);
@@ -556,14 +559,14 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
context, attrs);
}
- s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
+ ldl_le_pci_dma(pci_dev, s->consumer_pa, &s->reply_queue_tail, attrs);
trace_megasas_qf_complete(context, s->reply_queue_head,
s->reply_queue_tail, s->busy);
}
if (megasas_intr_enabled(s)) {
/* Update reply queue pointer */
- s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
+ ldl_le_pci_dma(pci_dev, s->consumer_pa, &s->reply_queue_tail, attrs);
tail = s->reply_queue_head;
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
@@ -667,9 +670,9 @@ static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
pa_lo = le32_to_cpu(initq->pi_addr_lo);
pa_hi = le32_to_cpu(initq->pi_addr_hi);
s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo;
- s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa, attrs);
+ ldl_le_pci_dma(pcid, s->producer_pa, &s->reply_queue_head, attrs);
s->reply_queue_head %= MEGASAS_MAX_FRAMES;
- s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa, attrs);
+ ldl_le_pci_dma(pcid, s->consumer_pa, &s->reply_queue_tail, attrs);
s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
flags = le32_to_cpu(initq->flags);
if (flags & MFI_QUEUE_FLAG_CONTEXT64) {
diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
index ac9f4dfcd2a..5181b0c0b0d 100644
--- a/hw/scsi/mptsas.c
+++ b/hw/scsi/mptsas.c
@@ -177,10 +177,16 @@ static dma_addr_t mptsas_ld_sg_base(MPTSASState *s, uint32_t flags_and_length,
dma_addr_t addr;
if (flags_and_length & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
- addr = ldq_le_pci_dma(pci, *sgaddr + 4, attrs);
+ uint64_t addr64;
+
+ ldq_le_pci_dma(pci, *sgaddr + 4, &addr64, attrs);
+ addr = addr64;
*sgaddr += 12;
} else {
- addr = ldl_le_pci_dma(pci, *sgaddr + 4, attrs);
+ uint32_t addr32;
+
+ ldl_le_pci_dma(pci, *sgaddr + 4, &addr32, attrs);
+ addr = addr32;
*sgaddr += 8;
}
return addr;
@@ -204,7 +210,7 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
dma_addr_t addr, len;
uint32_t flags_and_length;
- flags_and_length = ldl_le_pci_dma(pci, sgaddr, MEMTXATTRS_UNSPECIFIED);
+ ldl_le_pci_dma(pci, sgaddr, &flags_and_length, MEMTXATTRS_UNSPECIFIED);
len = flags_and_length & MPI_SGE_LENGTH_MASK;
if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
!= MPI_SGE_FLAGS_SIMPLE_ELEMENT ||
@@ -235,8 +241,8 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
break;
}
- flags_and_length = ldl_le_pci_dma(pci, next_chain_addr,
- MEMTXATTRS_UNSPECIFIED);
+ ldl_le_pci_dma(pci, next_chain_addr, &flags_and_length,
+ MEMTXATTRS_UNSPECIFIED);
if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
!= MPI_SGE_FLAGS_CHAIN_ELEMENT) {
return MPI_IOCSTATUS_INVALID_SGL;
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index 33e16f91116..4d9969f3b16 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -50,10 +50,10 @@
#define PVSCSI_MAX_CMD_DATA_WORDS \
(sizeof(PVSCSICmdDescSetupRings)/sizeof(uint32_t))
-#define RS_GET_FIELD(m, field) \
- (ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
+#define RS_GET_FIELD(pval, m, field) \
+ ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field), \
- MEMTXATTRS_UNSPECIFIED))
+ pval, MEMTXATTRS_UNSPECIFIED)
#define RS_SET_FIELD(m, field, val) \
(stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val, \
@@ -249,10 +249,11 @@ pvscsi_ring_cleanup(PVSCSIRingInfo *mgr)
static hwaddr
pvscsi_ring_pop_req_descr(PVSCSIRingInfo *mgr)
{
- uint32_t ready_ptr = RS_GET_FIELD(mgr, reqProdIdx);
+ uint32_t ready_ptr;
uint32_t ring_size = PVSCSI_MAX_NUM_PAGES_REQ_RING
* PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
+ RS_GET_FIELD(&ready_ptr, mgr, reqProdIdx);
if (ready_ptr != mgr->consumed_ptr
&& ready_ptr - mgr->consumed_ptr < ring_size) {
uint32_t next_ready_ptr =
@@ -323,8 +324,11 @@ pvscsi_ring_flush_cmp(PVSCSIRingInfo *mgr)
static bool
pvscsi_ring_msg_has_room(PVSCSIRingInfo *mgr)
{
- uint32_t prodIdx = RS_GET_FIELD(mgr, msgProdIdx);
- uint32_t consIdx = RS_GET_FIELD(mgr, msgConsIdx);
+ uint32_t prodIdx;
+ uint32_t consIdx;
+
+ RS_GET_FIELD(&prodIdx, mgr, msgProdIdx);
+ RS_GET_FIELD(&consIdx, mgr, msgConsIdx);
return (prodIdx - consIdx) < (mgr->msg_len_mask + 1);
}
--
2.33.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 5/5] dma: Let ld*_pci_dma() propagate MemTxResult
2021-12-18 15:10 ` [PATCH 5/5] dma: Let ld*_pci_dma() " Philippe Mathieu-Daudé
@ 2021-12-21 23:18 ` Richard Henderson
0 siblings, 0 replies; 11+ messages in thread
From: Richard Henderson @ 2021-12-21 23:18 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Fam Zheng, Hannes Reinecke, Dmitry Fleytman, qemu-block,
Michael S. Tsirkin, Stefan Weil, Jason Wang, David Hildenbrand,
Li Qiang, Qiuhao Li, Peter Xu, Alexander Bulekov, Gerd Hoffmann,
Paolo Bonzini, Sven Schnelle
On 12/18/21 7:10 AM, Philippe Mathieu-Daudé wrote:
> ld*_dma() returns a MemTxResult type. Do not discard
> it, return it to the caller.
>
> Update the few callers.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> include/hw/pci/pci.h | 17 ++++++++---------
> hw/audio/intel-hda.c | 2 +-
> hw/net/eepro100.c | 25 ++++++++++---------------
> hw/net/tulip.c | 16 ++++++++--------
> hw/scsi/megasas.c | 21 ++++++++++++---------
> hw/scsi/mptsas.c | 16 +++++++++++-----
> hw/scsi/vmw_pvscsi.c | 16 ++++++++++------
> 7 files changed, 60 insertions(+), 53 deletions(-)
>
> diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
> index c90cecc85c0..5b36334a28a 100644
> --- a/include/hw/pci/pci.h
> +++ b/include/hw/pci/pci.h
> @@ -850,15 +850,14 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
> DMA_DIRECTION_FROM_DEVICE, MEMTXATTRS_UNSPECIFIED);
> }
>
> -#define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \
> - static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \
> - dma_addr_t addr, \
> - MemTxAttrs attrs) \
> - { \
> - uint##_bits##_t val; \
> - ld##_l##_dma(pci_get_address_space(dev), addr, &val, attrs); \
> - return val; \
> - } \
> +#define PCI_DMA_DEFINE_LDST(_l, _s, _bits) \
> + static inline MemTxResult ld##_l##_pci_dma(PCIDevice *dev, \
> + dma_addr_t addr, \
> + uint##_bits##_t *val, \
> + MemTxAttrs attrs) \
> + { \
> + return ld##_l##_dma(pci_get_address_space(dev), addr, val, attrs); \
> + } \
> static inline MemTxResult st##_s##_pci_dma(PCIDevice *dev, \
> dma_addr_t addr, \
> uint##_bits##_t val, \
> diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
> index e34b7ab0e92..2b55d521503 100644
> --- a/hw/audio/intel-hda.c
> +++ b/hw/audio/intel-hda.c
> @@ -335,7 +335,7 @@ static void intel_hda_corb_run(IntelHDAState *d)
>
> rp = (d->corb_rp + 1) & 0xff;
> addr = intel_hda_addr(d->corb_lbase, d->corb_ubase);
> - verb = ldl_le_pci_dma(&d->pci, addr + 4 * rp, MEMTXATTRS_UNSPECIFIED);
> + ldl_le_pci_dma(&d->pci, addr + 4 * rp, &verb, MEMTXATTRS_UNSPECIFIED);
> d->corb_rp = rp;
>
> dprint(d, 2, "%s: [rp 0x%x] verb 0x%08x\n", __func__, rp, verb);
> diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
> index eb82e9cb118..679f52f80f1 100644
> --- a/hw/net/eepro100.c
> +++ b/hw/net/eepro100.c
> @@ -769,18 +769,16 @@ static void tx_command(EEPRO100State *s)
> } else {
> /* Flexible mode. */
> uint8_t tbd_count = 0;
> + uint32_t tx_buffer_address;
> + uint16_t tx_buffer_size;
> + uint16_t tx_buffer_el;
> +
> if (s->has_extended_tcb_support && !(s->configuration[6] & BIT(4))) {
> /* Extended Flexible TCB. */
> for (; tbd_count < 2; tbd_count++) {
> - uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev,
> - tbd_address,
> - attrs);
> - uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev,
> - tbd_address + 4,
> - attrs);
> - uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev,
> - tbd_address + 6,
> - attrs);
> + ldl_le_pci_dma(&s->dev, tbd_address, &tx_buffer_address, attrs);
> + lduw_le_pci_dma(&s->dev, tbd_address + 4, &tx_buffer_size, attrs);
> + lduw_le_pci_dma(&s->dev, tbd_address + 6, &tx_buffer_el, attrs);
> tbd_address += 8;
> TRACE(RXTX, logout
> ("TBD (extended flexible mode): buffer address 0x%08x, size 0x%04x\n",
> @@ -796,12 +794,9 @@ static void tx_command(EEPRO100State *s)
> }
> tbd_address = tbd_array;
> for (; tbd_count < s->tx.tbd_count; tbd_count++) {
> - uint32_t tx_buffer_address = ldl_le_pci_dma(&s->dev, tbd_address,
> - attrs);
> - uint16_t tx_buffer_size = lduw_le_pci_dma(&s->dev, tbd_address + 4,
> - attrs);
> - uint16_t tx_buffer_el = lduw_le_pci_dma(&s->dev, tbd_address + 6,
> - attrs);
> + ldl_le_pci_dma(&s->dev, tbd_address, &tx_buffer_address, attrs);
> + lduw_le_pci_dma(&s->dev, tbd_address + 4, &tx_buffer_size, attrs);
> + lduw_le_pci_dma(&s->dev, tbd_address + 6, &tx_buffer_el, attrs);
> tbd_address += 8;
> TRACE(RXTX, logout
> ("TBD (flexible mode): buffer address 0x%08x, size 0x%04x\n",
> diff --git a/hw/net/tulip.c b/hw/net/tulip.c
> index c76e4868f73..d5b6cc5ee69 100644
> --- a/hw/net/tulip.c
> +++ b/hw/net/tulip.c
> @@ -73,15 +73,15 @@ static void tulip_desc_read(TULIPState *s, hwaddr p,
> const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
>
> if (s->csr[0] & CSR0_DBO) {
> - desc->status = ldl_be_pci_dma(&s->dev, p, attrs);
> - desc->control = ldl_be_pci_dma(&s->dev, p + 4, attrs);
> - desc->buf_addr1 = ldl_be_pci_dma(&s->dev, p + 8, attrs);
> - desc->buf_addr2 = ldl_be_pci_dma(&s->dev, p + 12, attrs);
> + ldl_be_pci_dma(&s->dev, p, &desc->status, attrs);
> + ldl_be_pci_dma(&s->dev, p + 4, &desc->control, attrs);
> + ldl_be_pci_dma(&s->dev, p + 8, &desc->buf_addr1, attrs);
> + ldl_be_pci_dma(&s->dev, p + 12, &desc->buf_addr2, attrs);
> } else {
> - desc->status = ldl_le_pci_dma(&s->dev, p, attrs);
> - desc->control = ldl_le_pci_dma(&s->dev, p + 4, attrs);
> - desc->buf_addr1 = ldl_le_pci_dma(&s->dev, p + 8, attrs);
> - desc->buf_addr2 = ldl_le_pci_dma(&s->dev, p + 12, attrs);
> + ldl_le_pci_dma(&s->dev, p, &desc->status, attrs);
> + ldl_le_pci_dma(&s->dev, p + 4, &desc->control, attrs);
> + ldl_le_pci_dma(&s->dev, p + 8, &desc->buf_addr1, attrs);
> + ldl_le_pci_dma(&s->dev, p + 12, &desc->buf_addr2, attrs);
> }
> }
>
> diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
> index d6b452f07ce..f523d720959 100644
> --- a/hw/scsi/megasas.c
> +++ b/hw/scsi/megasas.c
> @@ -202,9 +202,12 @@ static uint64_t megasas_frame_get_context(MegasasState *s,
> unsigned long frame)
> {
> PCIDevice *pci = &s->parent_obj;
> - return ldq_le_pci_dma(pci,
> - frame + offsetof(struct mfi_frame_header, context),
> - MEMTXATTRS_UNSPECIFIED);
> + uint64_t val;
> +
> + ldq_le_pci_dma(pci, frame + offsetof(struct mfi_frame_header, context),
> + &val, MEMTXATTRS_UNSPECIFIED);
> +
> + return val;
> }
>
> static bool megasas_frame_is_ieee_sgl(MegasasCmd *cmd)
> @@ -524,8 +527,8 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
> s->busy++;
>
> if (s->consumer_pa) {
> - s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa,
> - MEMTXATTRS_UNSPECIFIED);
> + ldl_le_pci_dma(pcid, s->consumer_pa, &s->reply_queue_tail,
> + MEMTXATTRS_UNSPECIFIED);
> }
> trace_megasas_qf_enqueue(cmd->index, cmd->count, cmd->context,
> s->reply_queue_head, s->reply_queue_tail, s->busy);
> @@ -556,14 +559,14 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
> stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
> context, attrs);
> }
> - s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
> + ldl_le_pci_dma(pci_dev, s->consumer_pa, &s->reply_queue_tail, attrs);
> trace_megasas_qf_complete(context, s->reply_queue_head,
> s->reply_queue_tail, s->busy);
> }
>
> if (megasas_intr_enabled(s)) {
> /* Update reply queue pointer */
> - s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa, attrs);
> + ldl_le_pci_dma(pci_dev, s->consumer_pa, &s->reply_queue_tail, attrs);
> tail = s->reply_queue_head;
> s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
> trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
> @@ -667,9 +670,9 @@ static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd)
> pa_lo = le32_to_cpu(initq->pi_addr_lo);
> pa_hi = le32_to_cpu(initq->pi_addr_hi);
> s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo;
> - s->reply_queue_head = ldl_le_pci_dma(pcid, s->producer_pa, attrs);
> + ldl_le_pci_dma(pcid, s->producer_pa, &s->reply_queue_head, attrs);
> s->reply_queue_head %= MEGASAS_MAX_FRAMES;
> - s->reply_queue_tail = ldl_le_pci_dma(pcid, s->consumer_pa, attrs);
> + ldl_le_pci_dma(pcid, s->consumer_pa, &s->reply_queue_tail, attrs);
> s->reply_queue_tail %= MEGASAS_MAX_FRAMES;
> flags = le32_to_cpu(initq->flags);
> if (flags & MFI_QUEUE_FLAG_CONTEXT64) {
> diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
> index ac9f4dfcd2a..5181b0c0b0d 100644
> --- a/hw/scsi/mptsas.c
> +++ b/hw/scsi/mptsas.c
> @@ -177,10 +177,16 @@ static dma_addr_t mptsas_ld_sg_base(MPTSASState *s, uint32_t flags_and_length,
> dma_addr_t addr;
>
> if (flags_and_length & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
> - addr = ldq_le_pci_dma(pci, *sgaddr + 4, attrs);
> + uint64_t addr64;
> +
> + ldq_le_pci_dma(pci, *sgaddr + 4, &addr64, attrs);
> + addr = addr64;
> *sgaddr += 12;
> } else {
> - addr = ldl_le_pci_dma(pci, *sgaddr + 4, attrs);
> + uint32_t addr32;
> +
> + ldl_le_pci_dma(pci, *sgaddr + 4, &addr32, attrs);
> + addr = addr32;
> *sgaddr += 8;
> }
> return addr;
> @@ -204,7 +210,7 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
> dma_addr_t addr, len;
> uint32_t flags_and_length;
>
> - flags_and_length = ldl_le_pci_dma(pci, sgaddr, MEMTXATTRS_UNSPECIFIED);
> + ldl_le_pci_dma(pci, sgaddr, &flags_and_length, MEMTXATTRS_UNSPECIFIED);
> len = flags_and_length & MPI_SGE_LENGTH_MASK;
> if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
> != MPI_SGE_FLAGS_SIMPLE_ELEMENT ||
> @@ -235,8 +241,8 @@ static int mptsas_build_sgl(MPTSASState *s, MPTSASRequest *req, hwaddr addr)
> break;
> }
>
> - flags_and_length = ldl_le_pci_dma(pci, next_chain_addr,
> - MEMTXATTRS_UNSPECIFIED);
> + ldl_le_pci_dma(pci, next_chain_addr, &flags_and_length,
> + MEMTXATTRS_UNSPECIFIED);
> if ((flags_and_length & MPI_SGE_FLAGS_ELEMENT_TYPE_MASK)
> != MPI_SGE_FLAGS_CHAIN_ELEMENT) {
> return MPI_IOCSTATUS_INVALID_SGL;
> diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
> index 33e16f91116..4d9969f3b16 100644
> --- a/hw/scsi/vmw_pvscsi.c
> +++ b/hw/scsi/vmw_pvscsi.c
> @@ -50,10 +50,10 @@
> #define PVSCSI_MAX_CMD_DATA_WORDS \
> (sizeof(PVSCSICmdDescSetupRings)/sizeof(uint32_t))
>
> -#define RS_GET_FIELD(m, field) \
> - (ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
> +#define RS_GET_FIELD(pval, m, field) \
> + ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
> (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), \
> - MEMTXATTRS_UNSPECIFIED))
> + pval, MEMTXATTRS_UNSPECIFIED)
> #define RS_SET_FIELD(m, field, val) \
> (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
> (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val, \
> @@ -249,10 +249,11 @@ pvscsi_ring_cleanup(PVSCSIRingInfo *mgr)
> static hwaddr
> pvscsi_ring_pop_req_descr(PVSCSIRingInfo *mgr)
> {
> - uint32_t ready_ptr = RS_GET_FIELD(mgr, reqProdIdx);
> + uint32_t ready_ptr;
> uint32_t ring_size = PVSCSI_MAX_NUM_PAGES_REQ_RING
> * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
>
> + RS_GET_FIELD(&ready_ptr, mgr, reqProdIdx);
> if (ready_ptr != mgr->consumed_ptr
> && ready_ptr - mgr->consumed_ptr < ring_size) {
> uint32_t next_ready_ptr =
> @@ -323,8 +324,11 @@ pvscsi_ring_flush_cmp(PVSCSIRingInfo *mgr)
> static bool
> pvscsi_ring_msg_has_room(PVSCSIRingInfo *mgr)
> {
> - uint32_t prodIdx = RS_GET_FIELD(mgr, msgProdIdx);
> - uint32_t consIdx = RS_GET_FIELD(mgr, msgConsIdx);
> + uint32_t prodIdx;
> + uint32_t consIdx;
> +
> + RS_GET_FIELD(&prodIdx, mgr, msgProdIdx);
> + RS_GET_FIELD(&consIdx, mgr, msgConsIdx);
>
> return (prodIdx - consIdx) < (mgr->msg_len_mask + 1);
> }
>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
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