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From: Pratyush Yadav <p.yadav@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>,
	Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Boris Brezillon <boris.brezillon@collabora.com>
Subject: Re: [PATCH v7 03/14] spi: spi-mem: Check the controller extra capabilities
Date: Tue, 21 Dec 2021 00:18:47 +0530	[thread overview]
Message-ID: <20211220184845.o4jg2qy5ngt3ekiy@ti.com> (raw)
In-Reply-To: <20211217161654.367782-4-miquel.raynal@bootlin.com>

On 17/12/21 05:16PM, Miquel Raynal wrote:
> Controllers can now provide a spi-mem capabilities structure. Let's make
> use of it in spi_mem_controller_default_supports_op(). As we want to
> check for DTR operations as well as normal operations in a single
> helper, let's pull the necessary checks from spi_mem_dtr_supports_op()
> for now.
> 
> However, because no controller provide these extra capabilities, this
> change has no effect so far.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  drivers/spi/spi-mem.c | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index c4da0c9b05e9..677e54221ebc 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -173,11 +173,20 @@ EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op);
>  bool spi_mem_default_supports_op(struct spi_mem *mem,
>  				 const struct spi_mem_op *op)
>  {
> -	if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
> -		return false;
> +	struct spi_controller *ctlr = mem->spi->controller;
> +	bool op_is_dtr =
> +		op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
>  
> -	if (op->cmd.nbytes != 1)
> -		return false;
> +	if (op_is_dtr) {
> +		if (!spi_mem_controller_is_capable(ctlr, dtr))
> +			return false;
> +
> +		if (op->cmd.dtr && op->cmd.nbytes != 2)
> +			return false;

As I mentioned in patch 1, you want to do this check for all phases. For 
controllers that do not support mixed DTR modes, this does not allow the 
controller to make sure those ops are rejected. So that check would have 
to then move in the controller's supports_op() before 
spi_mem_default_supports_op() is called.

> +	} else {
> +		if (op->cmd.nbytes != 1)
> +			return false;

Technically speaking there is nothing stopping a device from using 2 or 
3 or even 4 byte opcodes. But that is a different topic that we don't 
really need to look at until the need comes up.

> +	}
>  
>  	return spi_mem_check_buswidth(mem, op);
>  }
> -- 
> 2.27.0
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.

WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Mark Brown <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>,
	Julien Su <juliensu@mxic.com.tw>,
	Jaime Liao <jaimeliao@mxic.com.tw>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Boris Brezillon <boris.brezillon@collabora.com>
Subject: Re: [PATCH v7 03/14] spi: spi-mem: Check the controller extra capabilities
Date: Tue, 21 Dec 2021 00:18:47 +0530	[thread overview]
Message-ID: <20211220184845.o4jg2qy5ngt3ekiy@ti.com> (raw)
In-Reply-To: <20211217161654.367782-4-miquel.raynal@bootlin.com>

On 17/12/21 05:16PM, Miquel Raynal wrote:
> Controllers can now provide a spi-mem capabilities structure. Let's make
> use of it in spi_mem_controller_default_supports_op(). As we want to
> check for DTR operations as well as normal operations in a single
> helper, let's pull the necessary checks from spi_mem_dtr_supports_op()
> for now.
> 
> However, because no controller provide these extra capabilities, this
> change has no effect so far.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  drivers/spi/spi-mem.c | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index c4da0c9b05e9..677e54221ebc 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -173,11 +173,20 @@ EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op);
>  bool spi_mem_default_supports_op(struct spi_mem *mem,
>  				 const struct spi_mem_op *op)
>  {
> -	if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
> -		return false;
> +	struct spi_controller *ctlr = mem->spi->controller;
> +	bool op_is_dtr =
> +		op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
>  
> -	if (op->cmd.nbytes != 1)
> -		return false;
> +	if (op_is_dtr) {
> +		if (!spi_mem_controller_is_capable(ctlr, dtr))
> +			return false;
> +
> +		if (op->cmd.dtr && op->cmd.nbytes != 2)
> +			return false;

As I mentioned in patch 1, you want to do this check for all phases. For 
controllers that do not support mixed DTR modes, this does not allow the 
controller to make sure those ops are rejected. So that check would have 
to then move in the controller's supports_op() before 
spi_mem_default_supports_op() is called.

> +	} else {
> +		if (op->cmd.nbytes != 1)
> +			return false;

Technically speaking there is nothing stopping a device from using 2 or 
3 or even 4 byte opcodes. But that is a different topic that we don't 
really need to look at until the need comes up.

> +	}
>  
>  	return spi_mem_check_buswidth(mem, op);
>  }
> -- 
> 2.27.0
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2021-12-20 18:49 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-17 16:16 [PATCH v7 00/14] External ECC engines & Macronix support Miquel Raynal
2021-12-17 16:16 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 01/14] spi: spi-mem: Fix a DTR related check in spi_mem_dtr_supports_op() Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 18:39   ` Pratyush Yadav
2021-12-20 18:39     ` Pratyush Yadav
2021-12-21  9:50     ` Miquel Raynal
2021-12-21  9:50       ` Miquel Raynal
2021-12-21 10:15       ` Pratyush Yadav
2021-12-21 10:15         ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 02/14] spi: spi-mem: Introduce a capability structure Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 18:43   ` Pratyush Yadav
2021-12-20 18:43     ` Pratyush Yadav
2021-12-21  9:35     ` Miquel Raynal
2021-12-21  9:35       ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 03/14] spi: spi-mem: Check the controller extra capabilities Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 18:48   ` Pratyush Yadav [this message]
2021-12-20 18:48     ` Pratyush Yadav
2021-12-17 16:16 ` [PATCH v7 04/14] spi: cadence: Provide a capability structure Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 18:55   ` Pratyush Yadav
2021-12-20 18:55     ` Pratyush Yadav
2021-12-21 10:16     ` Miquel Raynal
2021-12-21 10:16       ` Miquel Raynal
2021-12-21 10:41       ` Pratyush Yadav
2021-12-21 10:41         ` Pratyush Yadav
2021-12-21 11:19         ` Miquel Raynal
2021-12-21 11:19           ` Miquel Raynal
2021-12-21 12:05           ` Pratyush Yadav
2021-12-21 12:05             ` Pratyush Yadav
2022-01-03  8:38             ` Boris Brezillon
2022-01-03  8:38               ` Boris Brezillon
2022-01-03  9:18               ` Miquel Raynal
2022-01-03  9:18                 ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 05/14] spi: mxic: " Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 06/14] spi: spi-mem: Kill the spi_mem_dtr_supports_op() helper Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 18:58   ` Pratyush Yadav
2021-12-20 18:58     ` Pratyush Yadav
2021-12-21  9:58     ` Miquel Raynal
2021-12-21  9:58       ` Miquel Raynal
2021-12-21 10:10       ` Pratyush Yadav
2021-12-21 10:10         ` Pratyush Yadav
2021-12-21 10:25         ` Miquel Raynal
2021-12-21 10:25           ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 07/14] spi: spi-mem: Add an ecc_en parameter to the spi_mem_op structure Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-20 19:02   ` Pratyush Yadav
2021-12-20 19:02     ` Pratyush Yadav
2021-12-21 17:37     ` Miquel Raynal
2021-12-21 17:37       ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 08/14] mtd: spinand: Delay a little bit the dirmap creation Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 09/14] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 10/14] spi: mxic: Fix the transmit path Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 11/14] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 12/14] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 13/14] spi: mxic: Add support for direct mapping Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal
2021-12-17 16:16 ` [PATCH v7 14/14] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
2021-12-17 16:16   ` Miquel Raynal

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