* [PATCH] EDAC/amd64: Add PCI device IDs for family 19h model 50h
@ 2021-12-19 22:31 Marc Bevand
2021-12-21 19:02 ` Yazen Ghannam
0 siblings, 1 reply; 5+ messages in thread
From: Marc Bevand @ 2021-12-19 22:31 UTC (permalink / raw)
To: linux-edac; +Cc: Yazen Ghannam, Marc Bevand
Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
to support Ryzen 5000 APUs ("Cezanne").
Signed-off-by: Marc Bevand <m@zorinaq.com>
---
drivers/edac/amd64_edac.c | 16 ++++++++++++++++
drivers/edac/amd64_edac.h | 3 +++
2 files changed, 19 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 4fce75013674..45c81c0a232f 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2650,6 +2650,16 @@ static struct amd64_family_type family_types[] = {
.dbam_to_cs = f17_addr_mask_to_cs_size,
}
},
+ [F19_M50H_CPUS] = {
+ .ctl_name = "F19h_M50h",
+ .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0,
+ .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6,
+ .max_mcs = 2,
+ .ops = {
+ .early_channel_count = f17_early_channel_count,
+ .dbam_to_cs = f17_addr_mask_to_cs_size,
+ }
+ },
};
/*
@@ -3693,6 +3703,12 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
fam_type->ctl_name = "F19h_M20h";
break;
}
+ if (pvt->model == 0x50) {
+ fam_type = &family_types[F19_M50H_CPUS];
+ pvt->ops = &family_types[F19_M50H_CPUS].ops;
+ fam_type->ctl_name = "F19h_M50h";
+ break;
+ }
fam_type = &family_types[F19_CPUS];
pvt->ops = &family_types[F19_CPUS].ops;
family_types[F19_CPUS].ctl_name = "F19h";
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 85aa820bc165..796e39e1890c 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -126,6 +126,8 @@
#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446
#define PCI_DEVICE_ID_AMD_19H_DF_F0 0x1650
#define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656
+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F0 0x166a
+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F6 0x1670
/*
* Function 1 - Address Map
@@ -298,6 +300,7 @@ enum amd_families {
F17_M60H_CPUS,
F17_M70H_CPUS,
F19_CPUS,
+ F19_M50H_CPUS,
NUM_FAMILIES,
};
--
2.30.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] EDAC/amd64: Add PCI device IDs for family 19h model 50h
2021-12-19 22:31 [PATCH] EDAC/amd64: Add PCI device IDs for family 19h model 50h Marc Bevand
@ 2021-12-21 19:02 ` Yazen Ghannam
2021-12-21 23:31 ` [PATCH v2] " Marc Bevand
0 siblings, 1 reply; 5+ messages in thread
From: Yazen Ghannam @ 2021-12-21 19:02 UTC (permalink / raw)
To: Marc Bevand; +Cc: linux-edac
On Sun, Dec 19, 2021 at 02:31:27PM -0800, Marc Bevand wrote:
> Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
> to support Ryzen 5000 APUs ("Cezanne").
>
> Signed-off-by: Marc Bevand <m@zorinaq.com>
Hi Marc,
Thanks for the patch.
> ---
> drivers/edac/amd64_edac.c | 16 ++++++++++++++++
> drivers/edac/amd64_edac.h | 3 +++
> 2 files changed, 19 insertions(+)
>
There are some recent changes in these files upstream. So this patch won't
apply.
Can you please base this patch on the following branch?
https://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git/log/?h=edac-for-next
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 4fce75013674..45c81c0a232f 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -2650,6 +2650,16 @@ static struct amd64_family_type family_types[] = {
> .dbam_to_cs = f17_addr_mask_to_cs_size,
> }
> },
> + [F19_M50H_CPUS] = {
> + .ctl_name = "F19h_M50h",
> + .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0,
> + .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6,
> + .max_mcs = 2,
> + .ops = {
> + .early_channel_count = f17_early_channel_count,
> + .dbam_to_cs = f17_addr_mask_to_cs_size,
> + }
> + },
> };
>
> /*
> @@ -3693,6 +3703,12 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
> fam_type->ctl_name = "F19h_M20h";
> break;
> }
> + if (pvt->model == 0x50) {
AMD systems are generally released in model groups. So this change should
apply to models 0x50 to 0x5f inclusive.
When updating this patch, you should find that there some "if/else if"
statements for the various model groups sorted in ascending order. This
addition should be inserted there.
> + fam_type = &family_types[F19_M50H_CPUS];
> + pvt->ops = &family_types[F19_M50H_CPUS].ops;
> + fam_type->ctl_name = "F19h_M50h";
> + break;
> + }
> fam_type = &family_types[F19_CPUS];
> pvt->ops = &family_types[F19_CPUS].ops;
> family_types[F19_CPUS].ctl_name = "F19h";
> diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
> index 85aa820bc165..796e39e1890c 100644
> --- a/drivers/edac/amd64_edac.h
> +++ b/drivers/edac/amd64_edac.h
> @@ -126,6 +126,8 @@
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446
> #define PCI_DEVICE_ID_AMD_19H_DF_F0 0x1650
> #define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656
> +#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F0 0x166a
> +#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F6 0x1670
>
> /*
> * Function 1 - Address Map
> @@ -298,6 +300,7 @@ enum amd_families {
> F17_M60H_CPUS,
> F17_M70H_CPUS,
> F19_CPUS,
> + F19_M50H_CPUS,
> NUM_FAMILIES,
> };
>
> --
Everything else looks good to me.
Thanks,
Yazen
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v2] EDAC/amd64: Add PCI device IDs for family 19h model 50h
2021-12-21 19:02 ` Yazen Ghannam
@ 2021-12-21 23:31 ` Marc Bevand
2021-12-23 20:04 ` Yazen Ghannam
0 siblings, 1 reply; 5+ messages in thread
From: Marc Bevand @ 2021-12-21 23:31 UTC (permalink / raw)
To: linux-edac; +Cc: Yazen Ghannam, Marc Bevand
Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
to support Ryzen 5000 APUs ("Cezanne").
Signed-off-by: Marc Bevand <m@zorinaq.com>
---
V1 -> V2: rebase on latest ras.git, apply to models 0x50-0x5f
Hi Yazen, I addressed your comments in v2 of this patch, included below.
Cheers,
Marc.
drivers/edac/amd64_edac.c | 15 +++++++++++++++
drivers/edac/amd64_edac.h | 3 +++
2 files changed, 18 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index c6c58f01067f..f8ef2edf8abf 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2660,6 +2660,16 @@ static struct amd64_family_type family_types[] = {
.dbam_to_cs = f17_addr_mask_to_cs_size,
}
},
+ [F19_M50H_CPUS] = {
+ .ctl_name = "F19h_M50h",
+ .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0,
+ .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6,
+ .max_mcs = 2,
+ .ops = {
+ .early_channel_count = f17_early_channel_count,
+ .dbam_to_cs = f17_addr_mask_to_cs_size,
+ }
+ },
};
/*
@@ -3706,6 +3716,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
pvt->ops = &family_types[F17_M70H_CPUS].ops;
fam_type->ctl_name = "F19h_M20h";
break;
+ } else if (pvt->model >= 0x50 && pvt->model <= 0x5f) {
+ fam_type = &family_types[F19_M50H_CPUS];
+ pvt->ops = &family_types[F19_M50H_CPUS].ops;
+ fam_type->ctl_name = "F19h_M50h";
+ break;
} else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) {
fam_type = &family_types[F19_M10H_CPUS];
pvt->ops = &family_types[F19_M10H_CPUS].ops;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 650cab401e21..352bda9803f6 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -128,6 +128,8 @@
#define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3
+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F0 0x166a
+#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F6 0x1670
/*
* Function 1 - Address Map
@@ -301,6 +303,7 @@ enum amd_families {
F17_M70H_CPUS,
F19_CPUS,
F19_M10H_CPUS,
+ F19_M50H_CPUS,
NUM_FAMILIES,
};
--
2.30.2
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2] EDAC/amd64: Add PCI device IDs for family 19h model 50h
2021-12-21 23:31 ` [PATCH v2] " Marc Bevand
@ 2021-12-23 20:04 ` Yazen Ghannam
2021-12-24 10:15 ` Borislav Petkov
0 siblings, 1 reply; 5+ messages in thread
From: Yazen Ghannam @ 2021-12-23 20:04 UTC (permalink / raw)
To: Marc Bevand; +Cc: linux-edac, bp
On Tue, Dec 21, 2021 at 03:31:12PM -0800, Marc Bevand wrote:
> Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
> to support Ryzen 5000 APUs ("Cezanne").
>
> Signed-off-by: Marc Bevand <m@zorinaq.com>
> ---
> V1 -> V2: rebase on latest ras.git, apply to models 0x50-0x5f
>
> Hi Yazen, I addressed your comments in v2 of this patch, included below.
> Cheers,
> Marc.
>
Thanks Marc. It looks good to me.
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Thanks,
Yazen
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2] EDAC/amd64: Add PCI device IDs for family 19h model 50h
2021-12-23 20:04 ` Yazen Ghannam
@ 2021-12-24 10:15 ` Borislav Petkov
0 siblings, 0 replies; 5+ messages in thread
From: Borislav Petkov @ 2021-12-24 10:15 UTC (permalink / raw)
To: Yazen Ghannam; +Cc: Marc Bevand, linux-edac
On Thu, Dec 23, 2021 at 08:04:05PM +0000, Yazen Ghannam wrote:
> On Tue, Dec 21, 2021 at 03:31:12PM -0800, Marc Bevand wrote:
> > Add the new family 19h model 50h PCI IDs (device 18h functions 0 and 6)
> > to support Ryzen 5000 APUs ("Cezanne").
> >
> > Signed-off-by: Marc Bevand <m@zorinaq.com>
> > ---
> > V1 -> V2: rebase on latest ras.git, apply to models 0x50-0x5f
> >
> > Hi Yazen, I addressed your comments in v2 of this patch, included below.
> > Cheers,
> > Marc.
> >
>
> Thanks Marc. It looks good to me.
>
> Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Applied, thanks.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-12-19 22:31 [PATCH] EDAC/amd64: Add PCI device IDs for family 19h model 50h Marc Bevand
2021-12-21 19:02 ` Yazen Ghannam
2021-12-21 23:31 ` [PATCH v2] " Marc Bevand
2021-12-23 20:04 ` Yazen Ghannam
2021-12-24 10:15 ` Borislav Petkov
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