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From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	openbmc@lists.ozlabs.org, "Tomer Maimon" <tmaimon77@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	linux-kernel@vger.kernel.org,
	"Andy Shevchenko" <andy.shevchenko@gmail.com>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
Subject: [PATCH v3 9/9] ARM: dts: wpcm450: Add pinmux information to UART0
Date: Fri, 24 Dec 2021 21:09:35 +0100	[thread overview]
Message-ID: <20211224200935.93817-10-j.neuschaefer@gmx.net> (raw)
In-Reply-To: <20211224200935.93817-1-j.neuschaefer@gmx.net>

UART0 always uses the same pins, so lets add the pinctrl information to
the common devicetree for WPCM450.

UART1 has different connection options, so I'm not adding the pinctrl
properties there.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---

v3:
- New patch
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 0c547bd88bdbd..93595850a4c3c 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -55,6 +55,8 @@ serial0: serial@b8000000 {
 			reg-shift = <2>;
 			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk24m>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&bsp_pins>;
 			status = "disabled";
 		};

--
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Tomer Maimon" <tmaimon77@gmail.com>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	linux-kernel@vger.kernel.org,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Andy Shevchenko" <andy.shevchenko@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
	openbmc@lists.ozlabs.org,
	"Benjamin Fair" <benjaminfair@google.com>
Subject: [PATCH v3 9/9] ARM: dts: wpcm450: Add pinmux information to UART0
Date: Fri, 24 Dec 2021 21:09:35 +0100	[thread overview]
Message-ID: <20211224200935.93817-10-j.neuschaefer@gmx.net> (raw)
In-Reply-To: <20211224200935.93817-1-j.neuschaefer@gmx.net>

UART0 always uses the same pins, so lets add the pinctrl information to
the common devicetree for WPCM450.

UART1 has different connection options, so I'm not adding the pinctrl
properties there.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---

v3:
- New patch
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 0c547bd88bdbd..93595850a4c3c 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -55,6 +55,8 @@ serial0: serial@b8000000 {
 			reg-shift = <2>;
 			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clk24m>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&bsp_pins>;
 			status = "disabled";
 		};

--
2.30.2


  parent reply	other threads:[~2021-12-24 20:10 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-24 20:09 [PATCH v3 0/9] Nuvoton WPCM450 pinctrl and GPIO driver Jonathan Neuschäfer
2021-12-24 20:09 ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2022-01-04 22:07   ` Rob Herring
2022-01-04 22:07     ` Rob Herring
2021-12-24 20:09 ` [PATCH v3 2/9] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 4/9] dt-bindings: pinctrl: Add Nuvoton WPCM450 Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2022-01-04 22:12   ` Rob Herring
2022-01-04 22:12     ` Rob Herring
2022-01-05 14:40     ` Jonathan Neuschäfer
2022-01-05 14:40       ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 5/9] pinctrl: nuvoton: Add driver for WPCM450 Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 21:15   ` Andy Shevchenko
2021-12-24 21:15     ` Andy Shevchenko
2022-01-05 14:24     ` Jonathan Neuschäfer
2022-01-05 14:24       ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 6/9] ARM: dts: wpcm450: Add pinctrl and GPIO nodes Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 7/9] ARM: dts: wpcm450: Add pin functions Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 20:09 ` [PATCH v3 8/9] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Jonathan Neuschäfer
2021-12-24 20:09   ` Jonathan Neuschäfer
2021-12-24 20:09 ` Jonathan Neuschäfer [this message]
2021-12-24 20:09   ` [PATCH v3 9/9] ARM: dts: wpcm450: Add pinmux information to UART0 Jonathan Neuschäfer

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