Re: [RFC PATCH v2 23/28] cxl/region: Implement XHB verification

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Fri, 22 Oct 2021 11:37:04 -0700
Ben Widawsky <ben.widawsky@intel.com> wrote:

> Cross host bridge verification primarily determines if the requested
> interleave ordering can be achieved by the root decoder, which isn't as
> programmable as other decoders.
> 
> The algorithm implemented here is based on the CXL Type 3 Memory Device
> Software Guide, chapter 2.13.14
> 
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> ---
>  .clang-format        |  1 +
>  drivers/cxl/region.c | 81 +++++++++++++++++++++++++++++++++++++++++++-
>  drivers/cxl/trace.h  |  3 ++
>  3 files changed, 84 insertions(+), 1 deletion(-)
> 
> diff --git a/.clang-format b/.clang-format
> index cb7c46371465..55f628f21722 100644
> --- a/.clang-format
> +++ b/.clang-format
> @@ -169,6 +169,7 @@ ForEachMacros:
>    - 'for_each_cpu_and'
>    - 'for_each_cpu_not'
>    - 'for_each_cpu_wrap'
> +  - 'for_each_cxl_decoder_target'
>    - 'for_each_cxl_endpoint'
>    - 'for_each_dapm_widgets'
>    - 'for_each_dev_addr'
> diff --git a/drivers/cxl/region.c b/drivers/cxl/region.c
> index d127c9c69eef..53442de33d11 100644
> --- a/drivers/cxl/region.c
> +++ b/drivers/cxl/region.c
> @@ -30,6 +30,11 @@
>  	for (idx = 0, ep = (region)->targets[idx]; idx < region_ways(region);  \
>  	     idx++, ep = (region)->targets[idx])
>  
> +#define for_each_cxl_decoder_target(target, decoder, idx)                      \
> +	for (idx = 0, target = (decoder)->target[idx];                         \
> +	     idx < (decoder)->nr_targets;                                      \
> +	     idx++, target = (decoder)->target[idx])
> +
target used for too many things in this macro.

I'm messing around with this to poke some of the Qemu stuff and noticed
this in passing...

Jonathan