[PATCH 00/10] ARM: dts: stm32: update sdmmc nodes

[PATCH 00/10] ARM: dts: stm32: update sdmmc nodes

[Yann Gautier]

This patches series brings updates for SDMMC nodes on STM32MP13
(max frequency, pins slew-rates, sleep pins, and controller version).
The sdmmc2 node is also added as STM32MP13 embeds 2 SDMMC controllers.

The compatible for sdmmc nodes is also updated for both STM32MP13
and STM32MP15, to align with bootloaders DT, and after arm,pl18x.yaml
has been updated [1].

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Gerald Baeza (1):
  ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl

Yann Gautier (9):
  ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
  ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131
  ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13
  ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
  ARM: dts: stm32: add sdmmc sleep pins for STM32MP13
  ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK
  ARM: dts: stm32: update SDMMC version for STM32MP13
  ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
  ARM: dts: stm32: add sdmmc2 pins for STM32MP13

 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 81 ++++++++++++++++++++----
 arch/arm/boot/dts/stm32mp131.dtsi        | 20 +++++-
 arch/arm/boot/dts/stm32mp135f-dk.dts     |  7 +-
 arch/arm/boot/dts/stm32mp151.dtsi        |  6 +-
 4 files changed, 94 insertions(+), 20 deletions(-)

-- 
2.17.1

[PATCH 00/10] ARM: dts: stm32: update sdmmc nodes

[Yann Gautier]

This patches series brings updates for SDMMC nodes on STM32MP13
(max frequency, pins slew-rates, sleep pins, and controller version).
The sdmmc2 node is also added as STM32MP13 embeds 2 SDMMC controllers.

The compatible for sdmmc nodes is also updated for both STM32MP13
and STM32MP15, to align with bootloaders DT, and after arm,pl18x.yaml
has been updated [1].

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Gerald Baeza (1):
  ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl

Yann Gautier (9):
  ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
  ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131
  ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13
  ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
  ARM: dts: stm32: add sdmmc sleep pins for STM32MP13
  ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK
  ARM: dts: stm32: update SDMMC version for STM32MP13
  ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
  ARM: dts: stm32: add sdmmc2 pins for STM32MP13

 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 81 ++++++++++++++++++++----
 arch/arm/boot/dts/stm32mp131.dtsi        | 20 +++++-
 arch/arm/boot/dts/stm32mp135f-dk.dts     |  7 +-
 arch/arm/boot/dts/stm32mp151.dtsi        |  6 +-
 4 files changed, 94 insertions(+), 20 deletions(-)

-- 
2.17.1


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[PATCH 01/10] ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151

[Yann Gautier]

To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc nodes is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp151.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 1cfc2f011e70..39e5ea16db88 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1059,7 +1059,7 @@
 		};
 
 		sdmmc3: mmc@48004000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x48004000 0x400>;
 			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
@@ -1381,7 +1381,7 @@
 		};
 
 		sdmmc1: mmc@58005000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58005000 0x1000>;
 			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
@@ -1396,7 +1396,7 @@
 		};
 
 		sdmmc2: mmc@58007000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58007000 0x1000>;
 			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.17.1

[PATCH 01/10] ARM: dts: stm32: add st, stm32-sdmmc2 compatible on stm32mp151

[Yann Gautier]

To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc nodes is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp151.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 1cfc2f011e70..39e5ea16db88 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1059,7 +1059,7 @@
 		};
 
 		sdmmc3: mmc@48004000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x48004000 0x400>;
 			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
@@ -1381,7 +1381,7 @@
 		};
 
 		sdmmc1: mmc@58005000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58005000 0x1000>;
 			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
@@ -1396,7 +1396,7 @@
 		};
 
 		sdmmc2: mmc@58007000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58007000 0x1000>;
 			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.17.1


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[PATCH 02/10] ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131

[Yann Gautier]

To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc1 node is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp131.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 86126dc0d898..9b318fcd6ef0 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -122,7 +122,7 @@
 		};
 
 		sdmmc1: mmc@58005000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
 			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.17.1

[PATCH 02/10] ARM: dts: stm32: add st, stm32-sdmmc2 compatible on stm32mp131

[Yann Gautier]

To align with bootloaders device tree files, and thanks to what was
added in yaml file [1], the compatible property for sdmmc1 node is
updated with "st,stm32-sdmmc2" string.

[1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
    compatible")

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp131.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 86126dc0d898..9b318fcd6ef0 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -122,7 +122,7 @@
 		};
 
 		sdmmc1: mmc@58005000 {
-			compatible = "arm,pl18x", "arm,primecell";
+			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x00253180>;
 			reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
 			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.17.1


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[PATCH 03/10] ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13

[Yann Gautier]

The max-frequency limitation is due to IOs.
On STM32MP13, it is 130MHz. Update the corresponding property.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp131.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 9b318fcd6ef0..672ac9360619 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -131,7 +131,7 @@
 			clock-names = "apb_pclk";
 			cap-sd-highspeed;
 			cap-mmc-highspeed;
-			max-frequency = <120000000>;
+			max-frequency = <130000000>;
 			status = "disabled";
 		};
 
-- 
2.17.1

[PATCH 03/10] ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13

[Yann Gautier]

The max-frequency limitation is due to IOs.
On STM32MP13, it is 130MHz. Update the corresponding property.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp131.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 9b318fcd6ef0..672ac9360619 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -131,7 +131,7 @@
 			clock-names = "apb_pclk";
 			cap-sd-highspeed;
 			cap-mmc-highspeed;
-			max-frequency = <120000000>;
+			max-frequency = <130000000>;
 			status = "disabled";
 		};
 
-- 
2.17.1


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[PATCH 04/10] ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl

[Yann Gautier]

From: Gerald Baeza <gerald.baeza@foss.st.com>

SDMMC1/2 CK <= 50 MHz so slew-rate = <1>
A new node sdmmc1-clk-0 is added to manage the new clock pin slew-rate.

Signed-off-by: Gerald Baeza <gerald.baeza@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index 069f95f2b628..ebb83c56c350 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -7,7 +7,7 @@
 
 &pinctrl {
 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
-		pins1 {
+		pins {
 			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
@@ -17,12 +17,6 @@
 			drive-push-pull;
 			bias-disable;
 		};
-		pins2 {
-			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-			slew-rate = <2>;
-			drive-push-pull;
-			bias-disable;
-		};
 	};
 
 	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
@@ -36,12 +30,6 @@
 			bias-disable;
 		};
 		pins2 {
-			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-			slew-rate = <2>;
-			drive-push-pull;
-			bias-disable;
-		};
-		pins3 {
 			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 			slew-rate = <1>;
 			drive-open-drain;
@@ -49,6 +37,15 @@
 		};
 	};
 
+	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-disable;
+		};
+	};
+
 	uart4_pins_a: uart4-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
-- 
2.17.1

[PATCH 04/10] ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl

[Yann Gautier]

From: Gerald Baeza <gerald.baeza@foss.st.com>

SDMMC1/2 CK <= 50 MHz so slew-rate = <1>
A new node sdmmc1-clk-0 is added to manage the new clock pin slew-rate.

Signed-off-by: Gerald Baeza <gerald.baeza@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index 069f95f2b628..ebb83c56c350 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -7,7 +7,7 @@
 
 &pinctrl {
 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
-		pins1 {
+		pins {
 			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
@@ -17,12 +17,6 @@
 			drive-push-pull;
 			bias-disable;
 		};
-		pins2 {
-			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-			slew-rate = <2>;
-			drive-push-pull;
-			bias-disable;
-		};
 	};
 
 	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
@@ -36,12 +30,6 @@
 			bias-disable;
 		};
 		pins2 {
-			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-			slew-rate = <2>;
-			drive-push-pull;
-			bias-disable;
-		};
-		pins3 {
 			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 			slew-rate = <1>;
 			drive-open-drain;
@@ -49,6 +37,15 @@
 		};
 	};
 
+	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
+			slew-rate = <1>;
+			drive-push-pull;
+			bias-disable;
+		};
+	};
+
 	uart4_pins_a: uart4-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
-- 
2.17.1


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[PATCH 05/10] ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board

[Yann Gautier]

Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp135f-dk.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 7e96d9e36217..aae8d3512f4b 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -39,8 +39,8 @@
 
 &sdmmc1 {
 	pinctrl-names = "default", "opendrain";
-	pinctrl-0 = <&sdmmc1_b4_pins_a>;
-	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
+	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
 	broken-cd;
 	disable-wp;
 	st,neg-edge;
-- 
2.17.1

[PATCH 05/10] ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board

[Yann Gautier]

Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp135f-dk.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 7e96d9e36217..aae8d3512f4b 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -39,8 +39,8 @@
 
 &sdmmc1 {
 	pinctrl-names = "default", "opendrain";
-	pinctrl-0 = <&sdmmc1_b4_pins_a>;
-	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
+	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
+	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
 	broken-cd;
 	disable-wp;
 	st,neg-edge;
-- 
2.17.1


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[PATCH 06/10] ARM: dts: stm32: add sdmmc sleep pins for STM32MP13

[Yann Gautier]

The node sdmmc1_b4_sleep_pins_a is added in stm32mp13-pinctrl.dtsi file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index ebb83c56c350..c6f78eef3698 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -37,6 +37,17 @@
 		};
 	};
 
+	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
+				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
+				 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
+				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
+				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
+				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
+		};
+	};
+
 	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
 		pins {
 			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-- 
2.17.1

[PATCH 06/10] ARM: dts: stm32: add sdmmc sleep pins for STM32MP13

[Yann Gautier]

The node sdmmc1_b4_sleep_pins_a is added in stm32mp13-pinctrl.dtsi file.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index ebb83c56c350..c6f78eef3698 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -37,6 +37,17 @@
 		};
 	};
 
+	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
+		pins {
+			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
+				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
+				 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
+				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
+				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
+				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
+		};
+	};
+
 	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
 		pins {
 			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
-- 
2.17.1


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[PATCH 07/10] ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK

[Yann Gautier]

Add sleep properties in pinctrl config for SDMMC1.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp135f-dk.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index aae8d3512f4b..ee100d108ea2 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -38,9 +38,10 @@
 };
 
 &sdmmc1 {
-	pinctrl-names = "default", "opendrain";
+	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
+	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
 	broken-cd;
 	disable-wp;
 	st,neg-edge;
-- 
2.17.1

[PATCH 07/10] ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK

[Yann Gautier]

Add sleep properties in pinctrl config for SDMMC1.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp135f-dk.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index aae8d3512f4b..ee100d108ea2 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -38,9 +38,10 @@
 };
 
 &sdmmc1 {
-	pinctrl-names = "default", "opendrain";
+	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
+	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
 	broken-cd;
 	disable-wp;
 	st,neg-edge;
-- 
2.17.1


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Re: [PATCH 00/10] ARM: dts: stm32: update sdmmc nodes

[Alexandre TORGUE]

Hi Yann

On 1/12/22 17:32, Yann Gautier wrote:
> This patches series brings updates for SDMMC nodes on STM32MP13
> (max frequency, pins slew-rates, sleep pins, and controller version).
> The sdmmc2 node is also added as STM32MP13 embeds 2 SDMMC controllers.
> 
> The compatible for sdmmc nodes is also updated for both STM32MP13
> and STM32MP15, to align with bootloaders DT, and after arm,pl18x.yaml
> has been updated [1].
> 
> [1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
>      compatible")
> 
> Gerald Baeza (1):
>    ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl
> 
> Yann Gautier (9):
>    ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
>    ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131
>    ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13
>    ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
>    ARM: dts: stm32: add sdmmc sleep pins for STM32MP13
>    ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK
>    ARM: dts: stm32: update SDMMC version for STM32MP13
>    ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
>    ARM: dts: stm32: add sdmmc2 pins for STM32MP13
> 
>   arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 81 ++++++++++++++++++++----
>   arch/arm/boot/dts/stm32mp131.dtsi        | 20 +++++-
>   arch/arm/boot/dts/stm32mp135f-dk.dts     |  7 +-
>   arch/arm/boot/dts/stm32mp151.dtsi        |  6 +-
>   4 files changed, 94 insertions(+), 20 deletions(-)
> 

Series applied on stm32-next.

Thanks
alex

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Re: [PATCH 00/10] ARM: dts: stm32: update sdmmc nodes

[Alexandre TORGUE]

Hi Yann

On 1/12/22 17:32, Yann Gautier wrote:
> This patches series brings updates for SDMMC nodes on STM32MP13
> (max frequency, pins slew-rates, sleep pins, and controller version).
> The sdmmc2 node is also added as STM32MP13 embeds 2 SDMMC controllers.
> 
> The compatible for sdmmc nodes is also updated for both STM32MP13
> and STM32MP15, to align with bootloaders DT, and after arm,pl18x.yaml
> has been updated [1].
> 
> [1] commit 552bc46484b3 ("dt-bindings: mmc: mmci: Add st,stm32-sdmmc2
>      compatible")
> 
> Gerald Baeza (1):
>    ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl
> 
> Yann Gautier (9):
>    ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp151
>    ARM: dts: stm32: add st,stm32-sdmmc2 compatible on stm32mp131
>    ARM: dts: stm32: increase SDMMC max-frequency for STM32MP13
>    ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
>    ARM: dts: stm32: add sdmmc sleep pins for STM32MP13
>    ARM: dts: stm32: add sdmmc sleep config for STM32MP135F-DK
>    ARM: dts: stm32: update SDMMC version for STM32MP13
>    ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
>    ARM: dts: stm32: add sdmmc2 pins for STM32MP13
> 
>   arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 81 ++++++++++++++++++++----
>   arch/arm/boot/dts/stm32mp131.dtsi        | 20 +++++-
>   arch/arm/boot/dts/stm32mp135f-dk.dts     |  7 +-
>   arch/arm/boot/dts/stm32mp151.dtsi        |  6 +-
>   4 files changed, 94 insertions(+), 20 deletions(-)
> 

Series applied on stm32-next.

Thanks
alex