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* [PATCH] pci: Fix register for determining type of IO base address
@ 2021-11-25 10:30 Pali Rohár
  2021-11-30  6:06 ` Stefan Roese
  2022-01-13  1:51 ` Tom Rini
  0 siblings, 2 replies; 3+ messages in thread
From: Pali Rohár @ 2021-11-25 10:30 UTC (permalink / raw)
  To: Stefan Roese, Simon Glass, Bin Meng; +Cc: u-boot

Function dm_pciauto_prescan_setup_bridge() configures base address
registers, therefore it should read type of IO from base address registers
(and not from limit address registers).

Note that base and limit address registers should have same type, so this
change is just usage correction and has no functional change on correctly
working hardware.

Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/pci_auto.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 5af4ee6e56df..7e6ee54be087 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -197,7 +197,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
 	dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat);
 	dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64);
 	prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
-	dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32);
+	dm_pci_read_config8(dev, PCI_IO_BASE, &io_32);
 	io_32 &= PCI_IO_RANGE_TYPE_MASK;
 
 	/* Configure bus number registers */
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] pci: Fix register for determining type of IO base address
  2021-11-25 10:30 [PATCH] pci: Fix register for determining type of IO base address Pali Rohár
@ 2021-11-30  6:06 ` Stefan Roese
  2022-01-13  1:51 ` Tom Rini
  1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2021-11-30  6:06 UTC (permalink / raw)
  To: Pali Rohár, Simon Glass, Bin Meng; +Cc: u-boot

On 11/25/21 11:30, Pali Rohár wrote:
> Function dm_pciauto_prescan_setup_bridge() configures base address
> registers, therefore it should read type of IO from base address registers
> (and not from limit address registers).
> 
> Note that base and limit address registers should have same type, so this
> change is just usage correction and has no functional change on correctly
> working hardware.
> 
> Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
>   drivers/pci/pci_auto.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
> index 5af4ee6e56df..7e6ee54be087 100644
> --- a/drivers/pci/pci_auto.c
> +++ b/drivers/pci/pci_auto.c
> @@ -197,7 +197,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
>   	dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat);
>   	dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64);
>   	prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
> -	dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32);
> +	dm_pci_read_config8(dev, PCI_IO_BASE, &io_32);
>   	io_32 &= PCI_IO_RANGE_TYPE_MASK;
>   
>   	/* Configure bus number registers */
> 

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] pci: Fix register for determining type of IO base address
  2021-11-25 10:30 [PATCH] pci: Fix register for determining type of IO base address Pali Rohár
  2021-11-30  6:06 ` Stefan Roese
@ 2022-01-13  1:51 ` Tom Rini
  1 sibling, 0 replies; 3+ messages in thread
From: Tom Rini @ 2022-01-13  1:51 UTC (permalink / raw)
  To: Pali Rohár; +Cc: Stefan Roese, Simon Glass, Bin Meng, u-boot

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On Thu, Nov 25, 2021 at 11:30:58AM +0100, Pali Rohár wrote:

> Function dm_pciauto_prescan_setup_bridge() configures base address
> registers, therefore it should read type of IO from base address registers
> (and not from limit address registers).
> 
> Note that base and limit address registers should have same type, so this
> change is just usage correction and has no functional change on correctly
> working hardware.
> 
> Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Stefan Roese <sr@denx.de>

Applied to u-boot/master, thanks!

-- 
Tom

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-01-13  1:51 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-11-25 10:30 [PATCH] pci: Fix register for determining type of IO base address Pali Rohár
2021-11-30  6:06 ` Stefan Roese
2022-01-13  1:51 ` Tom Rini

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