[PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras

[PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras

[yipechai]

Fix the code style warnings in amdgpu_ras.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++++++++++++++----------
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
 2 files changed, 30 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 0bb6b5354802..23502b2b0770 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct amdgpu_device *adev,
 static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_obj,
 		enum amdgpu_ras_block block)
 {
-	if(!block_obj)
+	if (!block_obj)
 		return -EINVAL;
 
 	if (block_obj->block == block)
@@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_
 	return -EINVAL;
 }
 
-static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
+static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
 					enum amdgpu_ras_block block, uint32_t sub_block_index)
 {
 	struct amdgpu_ras_block_object *obj, *tmp;
@@ -941,7 +941,7 @@ static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct ras_err_d
 int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
 				  struct ras_query_if *info)
 {
-	struct amdgpu_ras_block_object* block_obj = NULL;
+	struct amdgpu_ras_block_object *block_obj = NULL;
 	struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
 	struct ras_err_data err_data = {0, 0, 0, NULL};
 
@@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
 	} else {
 		block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
 		if (!block_obj || !block_obj->hw_ops)   {
-			dev_info(adev->dev, "%s doesn't config ras function \n",
+			dev_info(adev->dev, "%s doesn't config ras function.\n",
 					get_ras_block_str(&info->head));
 			return -EINVAL;
 		}
@@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
 int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
 		enum amdgpu_ras_block block)
 {
-	struct amdgpu_ras_block_object* block_obj = amdgpu_ras_get_ras_block(adev, block, 0);
+	struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0);
 
 	if (!amdgpu_ras_is_supported(adev, block))
 		return -EINVAL;
 
 	if (!block_obj || !block_obj->hw_ops)   {
-		dev_info(adev->dev, "%s doesn't config ras function \n", ras_block_str(block));
+		dev_info(adev->dev, "%s doesn't config ras function.\n",
+				ras_block_str(block));
 		return -EINVAL;
 	}
 
@@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
 		return -EINVAL;
 
 	if (!block_obj || !block_obj->hw_ops)	{
-		dev_info(adev->dev, "%s doesn't config ras function \n", get_ras_block_str(&info->head));
+		dev_info(adev->dev, "%s doesn't config ras function.\n",
+					get_ras_block_str(&info->head));
 		return -EINVAL;
 	}
 
@@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct amdgpu_device *adev)
 static void amdgpu_ras_error_status_query(struct amdgpu_device *adev,
 					  struct ras_query_if *info)
 {
-	struct amdgpu_ras_block_object* block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index);
+	struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev,
+									info->head.block,
+									info->head.sub_block_index);
 	/*
 	 * Only two block need to query read/write
 	 * RspStatus at current state
 	 */
 	if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
 		(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
-		return ;
+		return;
+
+	block_obj = amdgpu_ras_get_ras_block(adev,
+					info->head.block,
+					info->head.sub_block_index);
 
-	block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index);
 	if (!block_obj || !block_obj->hw_ops) {
-		dev_info(adev->dev, "%s doesn't config ras function \n", get_ras_block_str(&info->head));
-		return ;
+		dev_info(adev->dev, "%s doesn't config ras function.\n",
+			get_ras_block_str(&info->head));
+		return;
 	}
 
 	if (block_obj->hw_ops->query_ras_error_status)
@@ -2715,7 +2723,7 @@ static void amdgpu_register_bad_pages_mca_notifier(struct amdgpu_device *adev)
 }
 #endif
 
-struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev)
+struct amdgpu_ras *amdgpu_ras_get_context(struct amdgpu_device *adev)
 {
 	if (!adev)
 		return NULL;
@@ -2723,7 +2731,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev)
 	return adev->psp.ras_context.ras;
 }
 
-int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras* ras_con)
+int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con)
 {
 	if (!adev)
 		return -EINVAL;
@@ -2755,7 +2763,7 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev)
 
 /* Register each ip ras block into amdgpu ras */
 int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
-		struct amdgpu_ras_block_object* ras_block_obj)
+		struct amdgpu_ras_block_object *ras_block_obj)
 {
 	struct amdgpu_ras_block_object *obj, *tmp;
 	if (!adev || !ras_block_obj)
@@ -2766,9 +2774,8 @@ int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
 
 	/* If the ras object is in ras_list, don't add it again */
 	list_for_each_entry_safe(obj, tmp, &adev->ras_list, node) {
-		if (obj == ras_block_obj) {
+		if (obj == ras_block_obj)
 			return 0;
-		}
 	}
 
 	INIT_LIST_HEAD(&ras_block_obj->node);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 7a4d82378205..a51a281bd91a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -496,7 +496,8 @@ struct amdgpu_ras_block_object {
 	/* ras block link */
 	struct list_head node;
 
-	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index);
+	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
+				enum amdgpu_ras_block block, uint32_t sub_block_index);
 	int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info);
 	void (*ras_fini)(struct amdgpu_device *adev);
 	const struct amdgpu_ras_block_hw_ops *hw_ops;
@@ -504,7 +505,7 @@ struct amdgpu_ras_block_object {
 
 struct amdgpu_ras_block_hw_ops {
 	int  (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
-	void (*query_ras_error_count)(struct amdgpu_device *adev,void *ras_error_status);
+	void (*query_ras_error_count)(struct amdgpu_device *adev, void *ras_error_status);
 	void (*query_ras_error_status)(struct amdgpu_device *adev);
 	void (*query_ras_error_address)(struct amdgpu_device *adev, void *ras_error_status);
 	void (*reset_ras_error_count)(struct amdgpu_device *adev);
@@ -678,7 +679,8 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev);
 
 struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
 
-int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras* ras_con);
+int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras *ras_con);
 
-int amdgpu_ras_register_ras_block(struct amdgpu_device *adev, struct amdgpu_ras_block_object* ras_block_obj);
+int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
+				struct amdgpu_ras_block_object *ras_block_obj);
 #endif
-- 
2.25.1

[PATCH 2/5] drm/amdgpu: Fix the code style warnings in gfx

[yipechai]

Fix the code style warnings in gfx.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 4 ++--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index d36a6bc62560..e12f9f5c3beb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2314,11 +2314,11 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
 
 		/* If not define special ras_late_init function, use gfx default ras_late_init */
 		if (!adev->gfx.ras->ras_block.ras_late_init)
-				adev->gfx.ras->ras_block.ras_late_init = amdgpu_gfx_ras_late_init;
+			adev->gfx.ras->ras_block.ras_late_init = amdgpu_gfx_ras_late_init;
 
 		/* If not define special ras_fini function, use gfx default ras_fini */
 		if (!adev->gfx.ras->ras_block.ras_fini)
-				adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
+			adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
 	}
 
 	adev->gfx.config.gb_addr_config = gb_addr_config;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
index 7ec6243e015e..7653ebd0e67b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
@@ -1930,7 +1930,7 @@ static void gfx_v9_4_2_reset_sq_timeout_status(struct amdgpu_device *adev)
 	mutex_unlock(&adev->grbm_idx_mutex);
 }
 
-struct amdgpu_ras_block_hw_ops  gfx_v9_4_2_ras_ops ={
+struct amdgpu_ras_block_hw_ops  gfx_v9_4_2_ras_ops = {
 		.ras_error_inject = &gfx_v9_4_2_ras_error_inject,
 		.query_ras_error_count = &gfx_v9_4_2_query_ras_error_count,
 		.reset_ras_error_count = &gfx_v9_4_2_reset_ras_error_count,
-- 
2.25.1

[PATCH 3/5] drm/amdgpu: Fix the code style warnings in gmc

[yipechai]

Fix the code style warnings in gmc.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 5ef4ad28ab26..4f8d356f8432 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -672,7 +672,7 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device *adev)
 	if (adev->umc.ras) {
 		amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block);
 
-		strcpy(adev->umc.ras->ras_block.name,"umc");
+		strcpy(adev->umc.ras->ras_block.name, "umc");
 		adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
 
 		/* If don't define special ras_late_init function, use default ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3965aae435f8..c76ffd1a70cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1231,7 +1231,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
 	if (adev->umc.ras) {
 		amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block);
 
-		strcpy(adev->umc.ras->ras_block.name,"umc");
+		strcpy(adev->umc.ras->ras_block.name, "umc");
 		adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
 
 		/* If don't define special ras_late_init function, use default ras_late_init */
-- 
2.25.1

[PATCH 4/5] drm/amdgpu: Fix the code style warnings in sdma

[yipechai]

Fix the code style warnings in sdma.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 5 ++---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c | 3 +--
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 3c1483dc113e..e3f00376a2b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2767,8 +2767,7 @@ static void sdma_v4_0_query_ras_error_count(struct amdgpu_device *adev,  void *r
 {
 	int i = 0;
 	for (i = 0; i < adev->sdma.num_instances; i++) {
-		if (sdma_v4_0_query_ras_error_count_by_instance(adev, i, ras_error_status))
-		{
+		if (sdma_v4_0_query_ras_error_count_by_instance(adev, i, ras_error_status)) {
 			dev_err(adev->dev, "Query ras error count failed in SDMA%d \n", i);
 			return;
 		}
@@ -2814,7 +2813,7 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device *adev)
 	if (adev->sdma.ras) {
 		amdgpu_ras_register_ras_block(adev, &adev->sdma.ras->ras_block);
 
-		strcpy(adev->sdma.ras->ras_block.name,"sdma");
+		strcpy(adev->sdma.ras->ras_block.name, "sdma");
 		adev->sdma.ras->ras_block.block = AMDGPU_RAS_BLOCK__SDMA;
 
 		/* If don't define special ras_late_init function, use default ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
index 5c1ba1116e5c..5c90f456ece1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
@@ -249,8 +249,7 @@ static void sdma_v4_4_query_ras_error_count(struct amdgpu_device *adev,  void *r
 {
 	int i = 0;
 	for (i = 0; i < adev->sdma.num_instances; i++) {
-		if (sdma_v4_4_query_ras_error_count_by_instance(adev, i, ras_error_status))
-		{
+		if (sdma_v4_4_query_ras_error_count_by_instance(adev, i, ras_error_status)) {
 			dev_err(adev->dev, "Query ras error count failed in SDMA%d \n", i);
 			return;
 		}
-- 
2.25.1

[PATCH 5/5] drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc

[yipechai]

drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h  | 4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 3 ++-
 drivers/gpu/drm/amd/amdgpu/mca_v3_0.c    | 7 ++++---
 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c    | 3 ++-
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index c94a4b3c8d6d..8e9694a4d335 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -24,7 +24,7 @@
 #define __AMDGPU_HDP_H__
 #include "amdgpu_ras.h"
 
-struct amdgpu_hdp_ras{
+struct amdgpu_hdp_ras {
 	struct amdgpu_ras_block_object ras_block;
 };
 
@@ -40,7 +40,7 @@ struct amdgpu_hdp_funcs {
 struct amdgpu_hdp {
 	struct ras_common_if			*ras_if;
 	const struct amdgpu_hdp_funcs		*funcs;
-	struct amdgpu_hdp_ras 	*ras;
+	struct amdgpu_hdp_ras *ras;
 };
 
 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 478457637d29..5929d6f528c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -950,7 +950,8 @@ static void amdgpu_xgmi_query_ras_error_count(struct amdgpu_device *adev,
 static int amdgpu_ras_error_inject_xgmi(struct amdgpu_device *adev,  void *inject_if)
 {
 	int ret = 0;
-	struct ta_ras_trigger_error_input *block_info =  (struct ta_ras_trigger_error_input *)inject_if;
+	struct ta_ras_trigger_error_input *block_info =
+				(struct ta_ras_trigger_error_input *)inject_if;
 
 	if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
 		dev_warn(adev->dev, "Failed to disallow df cstate");
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index f51092041edc..68565262af9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -47,12 +47,13 @@ static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev)
 	amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
 }
 
-static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object* block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index)
+static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
+				enum amdgpu_ras_block block, uint32_t sub_block_index)
 {
-	if(!block_obj)
+	if (!block_obj)
 		return -EINVAL;
 
-	if( (block_obj->block == block) &&
+	if ((block_obj->block == block) &&
 		(block_obj->sub_block_index == sub_block_index)) {
 		return 0;
 	}
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
index 4776301972d4..c9891b7a05a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
@@ -475,4 +475,5 @@ struct amdgpu_umc_ras umc_v6_1_ras = {
 		.hw_ops = &umc_v6_1_ras_hw_ops,
 	},
 	.err_cnt_init = umc_v6_1_err_cnt_init,
-};
\ No newline at end of file
+};
+
-- 
2.25.1

RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras

[Zhou1, Tao]

[AMD Official Use Only]



> -----Original Message-----
> From: Chai, Thomas <YiPeng.Chai@amd.com>
> Sent: Friday, January 14, 2022 11:36 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas <YiPeng.Chai@amd.com>; Zhang, Hawking
> <Hawking.Zhang@amd.com>; Zhou1, Tao <Tao.Zhou1@amd.com>; Clements,
> John <John.Clements@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>
> Subject: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
> 
> Fix the code style warnings in amdgpu_ras.

[Tao] Could you add more description to explain the warnings you want to fix?

> 
> Signed-off-by: yipechai <YiPeng.Chai@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++++++++++++++----------
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
>  2 files changed, 30 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 0bb6b5354802..23502b2b0770 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev,  static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_obj,
>  		enum amdgpu_ras_block block)
>  {
> -	if(!block_obj)
> +	if (!block_obj)
>  		return -EINVAL;
> 
>  	if (block_obj->block == block)
> @@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_
>  	return -EINVAL;
>  }
> 
> -static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
> amdgpu_device *adev,
> +static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
> +amdgpu_device *adev,
>  					enum amdgpu_ras_block block,
> uint32_t sub_block_index)  {
>  	struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@
> static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct
> ras_err_d  int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
>  				  struct ras_query_if *info)
>  {
> -	struct amdgpu_ras_block_object* block_obj = NULL;
> +	struct amdgpu_ras_block_object *block_obj = NULL;
>  	struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
>  	struct ras_err_data err_data = {0, 0, 0, NULL};
> 
> @@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,
>  	} else {
>  		block_obj = amdgpu_ras_get_ras_block(adev, info->head.block,
> 0);
>  		if (!block_obj || !block_obj->hw_ops)   {
> -			dev_info(adev->dev, "%s doesn't config ras function \n",
> +			dev_info(adev->dev, "%s doesn't config ras function.\n",
>  					get_ras_block_str(&info->head));
>  			return -EINVAL;
>  		}
> @@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,  int amdgpu_ras_reset_error_status(struct
> amdgpu_device *adev,
>  		enum amdgpu_ras_block block)
>  {
> -	struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, block, 0);
> +	struct amdgpu_ras_block_object *block_obj =
> +amdgpu_ras_get_ras_block(adev, block, 0);
> 
>  	if (!amdgpu_ras_is_supported(adev, block))
>  		return -EINVAL;
> 
>  	if (!block_obj || !block_obj->hw_ops)   {
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> ras_block_str(block));
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +				ras_block_str(block));
>  		return -EINVAL;
>  	}
> 
> @@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device
> *adev,
>  		return -EINVAL;
> 
>  	if (!block_obj || !block_obj->hw_ops)	{
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(&info->head));
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +					get_ras_block_str(&info->head));
>  		return -EINVAL;
>  	}
> 
> @@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
> amdgpu_device *adev)  static void amdgpu_ras_error_status_query(struct
> amdgpu_device *adev,
>  					  struct ras_query_if *info)
>  {
> -	struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
> +	struct amdgpu_ras_block_object *block_obj =
> amdgpu_ras_get_ras_block(adev,
> +									info-
> >head.block,
> +									info-
> >head.sub_block_index);
>  	/*
>  	 * Only two block need to query read/write
>  	 * RspStatus at current state
>  	 */
>  	if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
>  		(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
> -		return ;
> +		return;
> +
> +	block_obj = amdgpu_ras_get_ras_block(adev,
> +					info->head.block,
> +					info->head.sub_block_index);
> 
> -	block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
>  	if (!block_obj || !block_obj->hw_ops) {
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(&info->head));
> -		return ;
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +			get_ras_block_str(&info->head));
> +		return;
>  	}
> 
>  	if (block_obj->hw_ops->query_ras_error_status)
> @@ -2715,7 +2723,7 @@ static void
> amdgpu_register_bad_pages_mca_notifier(struct amdgpu_device *adev)  }
> #endif
> 
> -struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev)
> +struct amdgpu_ras *amdgpu_ras_get_context(struct amdgpu_device *adev)
>  {
>  	if (!adev)
>  		return NULL;
> @@ -2723,7 +2731,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct
> amdgpu_device *adev)
>  	return adev->psp.ras_context.ras;
>  }
> 
> -int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras*
> ras_con)
> +int amdgpu_ras_set_context(struct amdgpu_device *adev, struct
> +amdgpu_ras *ras_con)
>  {
>  	if (!adev)
>  		return -EINVAL;
> @@ -2755,7 +2763,7 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device
> *adev)
> 
>  /* Register each ip ras block into amdgpu ras */  int
> amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> -		struct amdgpu_ras_block_object* ras_block_obj)
> +		struct amdgpu_ras_block_object *ras_block_obj)
>  {
>  	struct amdgpu_ras_block_object *obj, *tmp;
>  	if (!adev || !ras_block_obj)
> @@ -2766,9 +2774,8 @@ int amdgpu_ras_register_ras_block(struct
> amdgpu_device *adev,
> 
>  	/* If the ras object is in ras_list, don't add it again */
>  	list_for_each_entry_safe(obj, tmp, &adev->ras_list, node) {
> -		if (obj == ras_block_obj) {
> +		if (obj == ras_block_obj)
>  			return 0;
> -		}
>  	}
> 
>  	INIT_LIST_HEAD(&ras_block_obj->node);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> index 7a4d82378205..a51a281bd91a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> @@ -496,7 +496,8 @@ struct amdgpu_ras_block_object {
>  	/* ras block link */
>  	struct list_head node;
> 
> -	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
> enum amdgpu_ras_block block, uint32_t sub_block_index);
> +	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
> +				enum amdgpu_ras_block block, uint32_t
> sub_block_index);
>  	int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info);
>  	void (*ras_fini)(struct amdgpu_device *adev);
>  	const struct amdgpu_ras_block_hw_ops *hw_ops; @@ -504,7 +505,7
> @@ struct amdgpu_ras_block_object {
> 
>  struct amdgpu_ras_block_hw_ops {
>  	int  (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
> -	void (*query_ras_error_count)(struct amdgpu_device *adev,void
> *ras_error_status);
> +	void (*query_ras_error_count)(struct amdgpu_device *adev, void
> +*ras_error_status);
>  	void (*query_ras_error_status)(struct amdgpu_device *adev);
>  	void (*query_ras_error_address)(struct amdgpu_device *adev, void
> *ras_error_status);
>  	void (*reset_ras_error_count)(struct amdgpu_device *adev); @@ -
> 678,7 +679,8 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev);
> 
>  struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
> 
> -int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras*
> ras_con);
> +int amdgpu_ras_set_context(struct amdgpu_device *adev, struct
> +amdgpu_ras *ras_con);
> 
> -int amdgpu_ras_register_ras_block(struct amdgpu_device *adev, struct
> amdgpu_ras_block_object* ras_block_obj);
> +int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> +				struct amdgpu_ras_block_object
> *ras_block_obj);
>  #endif
> --
> 2.25.1

RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras

[Chai, Thomas]

OK, I will update the patches to add the fixed warning types.

-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1@amd.com> 
Sent: Friday, January 14, 2022 11:45 AM
To: Chai, Thomas <YiPeng.Chai@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>; Clements, John <John.Clements@amd.com>
Subject: RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras

[AMD Official Use Only]



> -----Original Message-----
> From: Chai, Thomas <YiPeng.Chai@amd.com>
> Sent: Friday, January 14, 2022 11:36 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas <YiPeng.Chai@amd.com>; Zhang, Hawking 
> <Hawking.Zhang@amd.com>; Zhou1, Tao <Tao.Zhou1@amd.com>; Clements, 
> John <John.Clements@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>
> Subject: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in 
> amdgpu_ras
> 
> Fix the code style warnings in amdgpu_ras.

[Tao] Could you add more description to explain the warnings you want to fix?

> 
> Signed-off-by: yipechai <YiPeng.Chai@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 
> +++++++++++++++---------- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 
> +++---
>  2 files changed, 30 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 0bb6b5354802..23502b2b0770 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev,  static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_obj,
>  		enum amdgpu_ras_block block)
>  {
> -	if(!block_obj)
> +	if (!block_obj)
>  		return -EINVAL;
> 
>  	if (block_obj->block == block)
> @@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_
>  	return -EINVAL;
>  }
> 
> -static struct amdgpu_ras_block_object* 
> amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
> +static struct amdgpu_ras_block_object 
> +*amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
>  					enum amdgpu_ras_block block,
> uint32_t sub_block_index)  {
>  	struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@ 
> static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct 
> ras_err_d  int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
>  				  struct ras_query_if *info)
>  {
> -	struct amdgpu_ras_block_object* block_obj = NULL;
> +	struct amdgpu_ras_block_object *block_obj = NULL;
>  	struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
>  	struct ras_err_data err_data = {0, 0, 0, NULL};
> 
> @@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,
>  	} else {
>  		block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
>  		if (!block_obj || !block_obj->hw_ops)   {
> -			dev_info(adev->dev, "%s doesn't config ras function \n",
> +			dev_info(adev->dev, "%s doesn't config ras function.\n",
>  					get_ras_block_str(&info->head));
>  			return -EINVAL;
>  		}
> @@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,  int amdgpu_ras_reset_error_status(struct
> amdgpu_device *adev,
>  		enum amdgpu_ras_block block)
>  {
> -	struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, block, 0);
> +	struct amdgpu_ras_block_object *block_obj = 
> +amdgpu_ras_get_ras_block(adev, block, 0);
> 
>  	if (!amdgpu_ras_is_supported(adev, block))
>  		return -EINVAL;
> 
>  	if (!block_obj || !block_obj->hw_ops)   {
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> ras_block_str(block));
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +				ras_block_str(block));
>  		return -EINVAL;
>  	}
> 
> @@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device 
> *adev,
>  		return -EINVAL;
> 
>  	if (!block_obj || !block_obj->hw_ops)	{
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(&info->head));
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +					get_ras_block_str(&info->head));
>  		return -EINVAL;
>  	}
> 
> @@ -1702,19 +1704,25 @@ static void 
> amdgpu_ras_log_on_err_counter(struct
> amdgpu_device *adev)  static void amdgpu_ras_error_status_query(struct
> amdgpu_device *adev,
>  					  struct ras_query_if *info)
>  {
> -	struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
> +	struct amdgpu_ras_block_object *block_obj =
> amdgpu_ras_get_ras_block(adev,
> +									info-
> >head.block,
> +									info-
> >head.sub_block_index);
>  	/*
>  	 * Only two block need to query read/write
>  	 * RspStatus at current state
>  	 */
>  	if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
>  		(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
> -		return ;
> +		return;
> +
> +	block_obj = amdgpu_ras_get_ras_block(adev,
> +					info->head.block,
> +					info->head.sub_block_index);
> 
> -	block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
>  	if (!block_obj || !block_obj->hw_ops) {
> -		dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(&info->head));
> -		return ;
> +		dev_info(adev->dev, "%s doesn't config ras function.\n",
> +			get_ras_block_str(&info->head));
> +		return;
>  	}
> 
>  	if (block_obj->hw_ops->query_ras_error_status)
> @@ -2715,7 +2723,7 @@ static void
> amdgpu_register_bad_pages_mca_notifier(struct amdgpu_device *adev)  } 
> #endif
> 
> -struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev)
> +struct amdgpu_ras *amdgpu_ras_get_context(struct amdgpu_device *adev)
>  {
>  	if (!adev)
>  		return NULL;
> @@ -2723,7 +2731,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct 
> amdgpu_device *adev)
>  	return adev->psp.ras_context.ras;
>  }
> 
> -int amdgpu_ras_set_context(struct amdgpu_device *adev, struct 
> amdgpu_ras*
> ras_con)
> +int amdgpu_ras_set_context(struct amdgpu_device *adev, struct 
> +amdgpu_ras *ras_con)
>  {
>  	if (!adev)
>  		return -EINVAL;
> @@ -2755,7 +2763,7 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device
> *adev)
> 
>  /* Register each ip ras block into amdgpu ras */  int 
> amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> -		struct amdgpu_ras_block_object* ras_block_obj)
> +		struct amdgpu_ras_block_object *ras_block_obj)
>  {
>  	struct amdgpu_ras_block_object *obj, *tmp;
>  	if (!adev || !ras_block_obj)
> @@ -2766,9 +2774,8 @@ int amdgpu_ras_register_ras_block(struct
> amdgpu_device *adev,
> 
>  	/* If the ras object is in ras_list, don't add it again */
>  	list_for_each_entry_safe(obj, tmp, &adev->ras_list, node) {
> -		if (obj == ras_block_obj) {
> +		if (obj == ras_block_obj)
>  			return 0;
> -		}
>  	}
> 
>  	INIT_LIST_HEAD(&ras_block_obj->node);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> index 7a4d82378205..a51a281bd91a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
> @@ -496,7 +496,8 @@ struct amdgpu_ras_block_object {
>  	/* ras block link */
>  	struct list_head node;
> 
> -	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
> enum amdgpu_ras_block block, uint32_t sub_block_index);
> +	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
> +				enum amdgpu_ras_block block, uint32_t
> sub_block_index);
>  	int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info);
>  	void (*ras_fini)(struct amdgpu_device *adev);
>  	const struct amdgpu_ras_block_hw_ops *hw_ops; @@ -504,7 +505,7 @@ 
> struct amdgpu_ras_block_object {
> 
>  struct amdgpu_ras_block_hw_ops {
>  	int  (*ras_error_inject)(struct amdgpu_device *adev, void *inject_if);
> -	void (*query_ras_error_count)(struct amdgpu_device *adev,void
> *ras_error_status);
> +	void (*query_ras_error_count)(struct amdgpu_device *adev, void 
> +*ras_error_status);
>  	void (*query_ras_error_status)(struct amdgpu_device *adev);
>  	void (*query_ras_error_address)(struct amdgpu_device *adev, void 
> *ras_error_status);
>  	void (*reset_ras_error_count)(struct amdgpu_device *adev); @@ -
> 678,7 +679,8 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev);
> 
>  struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device 
> *adev);
> 
> -int amdgpu_ras_set_context(struct amdgpu_device *adev, struct 
> amdgpu_ras* ras_con);
> +int amdgpu_ras_set_context(struct amdgpu_device *adev, struct 
> +amdgpu_ras *ras_con);
> 
> -int amdgpu_ras_register_ras_block(struct amdgpu_device *adev, struct
> amdgpu_ras_block_object* ras_block_obj);
> +int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> +				struct amdgpu_ras_block_object
> *ras_block_obj);
>  #endif
> --
> 2.25.1