From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Liang Yang <liang.yang@amlogic.com>,
Michael Turquette <mturquette@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
linux-clk@vger.kernel.org
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
XianWei Zhao <xianwei.zhao@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
BiChao Zheng <bichao.zheng@amlogic.com>,
YongHui Yu <yonghui.yu@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller
Date: Fri, 14 Jan 2022 14:59:55 -0800 [thread overview]
Message-ID: <20220114225957.285ADC36AE7@smtp.kernel.org> (raw)
In-Reply-To: <5d99ac02-a246-5bcc-2ecb-371b0d193537@amlogic.com>
Quoting Liang Yang (2022-01-13 19:06:07)
> Hi Stephen,
>
> Thanks for your quick response.
>
> On 2022/1/14 5:29, Stephen Boyd wrote:
> > [ EXTERNAL EMAIL ]
> >
> > Quoting Liang Yang (2022-01-13 03:57:44)
> >> Document the MMC sub clock controller driver, the potential consumer
> >> of this driver is MMC or NAND. Also add four clock bindings IDs which
> >> provided by this driver.
> >>
> >> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> >> ---
> >> .../bindings/clock/amlogic,mmc-clkc.yaml | 64 +++++++++++++++++++
> >> include/dt-bindings/clock/amlogic,mmc-clkc.h | 14 ++++
> >> 2 files changed, 78 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> new file mode 100644
> >> index 000000000000..a274c3d5fc2e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> @@ -0,0 +1,64 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Amlogic MMC Sub Clock Controller Driver Device Tree Bindings
> >> +
> >> +maintainers:
> >> + - jianxin.pan@amlogic.com
> >> + - liang.yang@amlogic.com
> >> +
> >> +properties:
> >> + compatible:
> >> + enum:
> >> + - "amlogic,axg-mmc-clkc", "syscon"
> >
> > Why is it a syscon?
>
> The register documented by reg is shared with SD/eMMC controller port C,
> and it need to be ops on NFC driver.
>
Is this the case where the clk is inside the SD/eMMC controller? Can the
mmc driver register the clk controller from there and pass it an iomem
pointer to poke clks?
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Liang Yang <liang.yang@amlogic.com>,
Michael Turquette <mturquette@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
linux-clk@vger.kernel.org
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
XianWei Zhao <xianwei.zhao@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
BiChao Zheng <bichao.zheng@amlogic.com>,
YongHui Yu <yonghui.yu@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller
Date: Fri, 14 Jan 2022 14:59:55 -0800 [thread overview]
Message-ID: <20220114225957.285ADC36AE7@smtp.kernel.org> (raw)
In-Reply-To: <5d99ac02-a246-5bcc-2ecb-371b0d193537@amlogic.com>
Quoting Liang Yang (2022-01-13 19:06:07)
> Hi Stephen,
>
> Thanks for your quick response.
>
> On 2022/1/14 5:29, Stephen Boyd wrote:
> > [ EXTERNAL EMAIL ]
> >
> > Quoting Liang Yang (2022-01-13 03:57:44)
> >> Document the MMC sub clock controller driver, the potential consumer
> >> of this driver is MMC or NAND. Also add four clock bindings IDs which
> >> provided by this driver.
> >>
> >> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> >> ---
> >> .../bindings/clock/amlogic,mmc-clkc.yaml | 64 +++++++++++++++++++
> >> include/dt-bindings/clock/amlogic,mmc-clkc.h | 14 ++++
> >> 2 files changed, 78 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> new file mode 100644
> >> index 000000000000..a274c3d5fc2e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> @@ -0,0 +1,64 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Amlogic MMC Sub Clock Controller Driver Device Tree Bindings
> >> +
> >> +maintainers:
> >> + - jianxin.pan@amlogic.com
> >> + - liang.yang@amlogic.com
> >> +
> >> +properties:
> >> + compatible:
> >> + enum:
> >> + - "amlogic,axg-mmc-clkc", "syscon"
> >
> > Why is it a syscon?
>
> The register documented by reg is shared with SD/eMMC controller port C,
> and it need to be ops on NFC driver.
>
Is this the case where the clk is inside the SD/eMMC controller? Can the
mmc driver register the clk controller from there and pass it an iomem
pointer to poke clks?
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Liang Yang <liang.yang@amlogic.com>,
Michael Turquette <mturquette@baylibre.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
linux-clk@vger.kernel.org
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Victor Wan <victor.wan@amlogic.com>,
XianWei Zhao <xianwei.zhao@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
BiChao Zheng <bichao.zheng@amlogic.com>,
YongHui Yu <yonghui.yu@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller
Date: Fri, 14 Jan 2022 14:59:55 -0800 [thread overview]
Message-ID: <20220114225957.285ADC36AE7@smtp.kernel.org> (raw)
In-Reply-To: <5d99ac02-a246-5bcc-2ecb-371b0d193537@amlogic.com>
Quoting Liang Yang (2022-01-13 19:06:07)
> Hi Stephen,
>
> Thanks for your quick response.
>
> On 2022/1/14 5:29, Stephen Boyd wrote:
> > [ EXTERNAL EMAIL ]
> >
> > Quoting Liang Yang (2022-01-13 03:57:44)
> >> Document the MMC sub clock controller driver, the potential consumer
> >> of this driver is MMC or NAND. Also add four clock bindings IDs which
> >> provided by this driver.
> >>
> >> Signed-off-by: Liang Yang <liang.yang@amlogic.com>
> >> ---
> >> .../bindings/clock/amlogic,mmc-clkc.yaml | 64 +++++++++++++++++++
> >> include/dt-bindings/clock/amlogic,mmc-clkc.h | 14 ++++
> >> 2 files changed, 78 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> new file mode 100644
> >> index 000000000000..a274c3d5fc2e
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
> >> @@ -0,0 +1,64 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Amlogic MMC Sub Clock Controller Driver Device Tree Bindings
> >> +
> >> +maintainers:
> >> + - jianxin.pan@amlogic.com
> >> + - liang.yang@amlogic.com
> >> +
> >> +properties:
> >> + compatible:
> >> + enum:
> >> + - "amlogic,axg-mmc-clkc", "syscon"
> >
> > Why is it a syscon?
>
> The register documented by reg is shared with SD/eMMC controller port C,
> and it need to be ops on NFC driver.
>
Is this the case where the clk is inside the SD/eMMC controller? Can the
mmc driver register the clk controller from there and pass it an iomem
pointer to poke clks?
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-01-14 23:00 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-13 11:57 [PATCH v9 0/4] clk: meson: add a sub EMMC clock controller support Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 1/4] clk: meson: add one based divider support for sclk Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 21:28 ` Stephen Boyd
2022-01-13 21:28 ` Stephen Boyd
2022-01-13 21:28 ` Stephen Boyd
2022-01-14 3:07 ` Liang Yang
2022-01-14 3:07 ` Liang Yang
2022-01-14 3:07 ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 2/4] clk: meson: add emmc sub clock phase delay driver Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 21:29 ` Stephen Boyd
2022-01-13 21:29 ` Stephen Boyd
2022-01-13 21:29 ` Stephen Boyd
2022-01-14 3:08 ` Liang Yang
2022-01-14 3:08 ` Liang Yang
2022-01-14 3:08 ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 21:29 ` Stephen Boyd
2022-01-13 21:29 ` Stephen Boyd
2022-01-13 21:29 ` Stephen Boyd
2022-01-14 3:06 ` Liang Yang
2022-01-14 3:06 ` Liang Yang
2022-01-14 3:06 ` Liang Yang
2022-01-14 22:59 ` Stephen Boyd [this message]
2022-01-14 22:59 ` Stephen Boyd
2022-01-14 22:59 ` Stephen Boyd
2022-01-17 2:43 ` Liang Yang
2022-01-17 2:43 ` Liang Yang
2022-01-17 2:43 ` Liang Yang
2022-01-15 0:09 ` Martin Blumenstingl
2022-01-15 0:09 ` Martin Blumenstingl
2022-01-15 0:09 ` Martin Blumenstingl
2022-01-17 7:03 ` Liang Yang
2022-01-17 7:03 ` Liang Yang
2022-01-17 7:03 ` Liang Yang
2022-01-13 11:57 ` [PATCH v9 4/4] clk: meson: add sub MMC clock controller driver Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 11:57 ` Liang Yang
2022-01-13 21:35 ` Stephen Boyd
2022-01-13 21:35 ` Stephen Boyd
2022-01-13 21:35 ` Stephen Boyd
2022-01-14 5:14 ` Liang Yang
2022-01-14 5:14 ` Liang Yang
2022-01-14 5:14 ` Liang Yang
2022-01-14 23:01 ` Stephen Boyd
2022-01-14 23:01 ` Stephen Boyd
2022-01-14 23:01 ` Stephen Boyd
2022-01-17 6:24 ` Liang Yang
2022-01-17 6:24 ` Liang Yang
2022-01-17 6:24 ` Liang Yang
2022-01-19 2:22 ` Stephen Boyd
2022-01-19 2:22 ` Stephen Boyd
2022-01-19 2:22 ` Stephen Boyd
2022-01-19 2:55 ` Liang Yang
2022-01-19 2:55 ` Liang Yang
2022-01-19 2:55 ` Liang Yang
-- strict thread matches above, loose matches on Subject: below --
2019-01-08 13:50 [PATCH RESEND v9 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2019-01-08 13:50 ` [PATCH v9 3/4] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2019-01-08 13:50 ` Jianxin Pan
2019-01-08 13:50 ` Jianxin Pan
2019-01-22 9:27 ` Jerome Brunet
2019-01-22 9:27 ` Jerome Brunet
2019-01-22 9:27 ` Jerome Brunet
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