* [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:20 ` Jerin Jacob
2021-12-09 9:13 ` [PATCH 3/8] common/cnxk: change order of frag sizes and infos Nithin Dabilpuram
` (7 subsequent siblings)
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Gowrishankar Muthukrishnan, Shijith Thotton
From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
In shaper profiles cleanup, KW reports infinite loop although existing
loop condition is alright. False positive may be due to tqh_first not
checked in loop, hence switching to FOREACH_SAFE to make KW happy.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
---
drivers/common/cnxk/roc_nix_tm.c | 8 ++++----
drivers/common/cnxk/roc_platform.h | 2 ++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index b3d8ebd..fe9e83f 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -17,16 +17,16 @@ bitmap_ctzll(uint64_t slab)
void
nix_tm_clear_shaper_profiles(struct nix *nix)
{
- struct nix_tm_shaper_profile *shaper_profile;
+ struct nix_tm_shaper_profile *shaper_profile, *tmp;
+ struct nix_tm_shaper_profile_list *list;
- shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
- while (shaper_profile != NULL) {
+ list = &nix->shaper_profile_list;
+ PLT_TAILQ_FOREACH_SAFE(shaper_profile, list, shaper, tmp) {
if (shaper_profile->ref_cnt)
plt_warn("Shaper profile %u has non zero references",
shaper_profile->id);
TAILQ_REMOVE(&nix->shaper_profile_list, shaper_profile, shaper);
nix_tm_shaper_profile_free(shaper_profile);
- shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
}
}
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 61d4781..3648e84 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -19,6 +19,7 @@
#include <rte_pci.h>
#include <rte_spinlock.h>
#include <rte_string_fns.h>
+#include <rte_tailq.h>
#include <rte_telemetry.h>
#include "roc_bits.h"
@@ -53,6 +54,7 @@
#define BITMASK_ULL GENMASK_ULL
#define PLT_ALIGN_CEIL RTE_ALIGN_CEIL
#define PLT_INIT RTE_INIT
+#define PLT_TAILQ_FOREACH_SAFE RTE_TAILQ_FOREACH_SAFE
/** Divide ceil */
#define PLT_DIV_CEIL(x, y) \
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup
2021-12-09 9:13 ` [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
@ 2022-01-19 16:20 ` Jerin Jacob
0 siblings, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:20 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
dpdk-dev, Gowrishankar Muthukrishnan, Shijith Thotton
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
>
> In shaper profiles cleanup, KW reports infinite loop although existing
> loop condition is alright. False positive may be due to tqh_first not
> checked in loop, hence switching to FOREACH_SAFE to make KW happy.
>
> Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
Changed the git log to:
common/cnxk: use for loop in shaper profiles cleanup
In shaper profiles cleanup, Klockwork static analyzer tool reports
infinite loop although existing loop condition is alright.
False positive may be due to tqh_first not checked in loop,
hence switching to FOREACH_SAFE to make Klockwork happy.
> ---
> drivers/common/cnxk/roc_nix_tm.c | 8 ++++----
> drivers/common/cnxk/roc_platform.h | 2 ++
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
> index b3d8ebd..fe9e83f 100644
> --- a/drivers/common/cnxk/roc_nix_tm.c
> +++ b/drivers/common/cnxk/roc_nix_tm.c
> @@ -17,16 +17,16 @@ bitmap_ctzll(uint64_t slab)
> void
> nix_tm_clear_shaper_profiles(struct nix *nix)
> {
> - struct nix_tm_shaper_profile *shaper_profile;
> + struct nix_tm_shaper_profile *shaper_profile, *tmp;
> + struct nix_tm_shaper_profile_list *list;
>
> - shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
> - while (shaper_profile != NULL) {
> + list = &nix->shaper_profile_list;
> + PLT_TAILQ_FOREACH_SAFE(shaper_profile, list, shaper, tmp) {
> if (shaper_profile->ref_cnt)
> plt_warn("Shaper profile %u has non zero references",
> shaper_profile->id);
> TAILQ_REMOVE(&nix->shaper_profile_list, shaper_profile, shaper);
> nix_tm_shaper_profile_free(shaper_profile);
> - shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
> }
> }
>
> diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
> index 61d4781..3648e84 100644
> --- a/drivers/common/cnxk/roc_platform.h
> +++ b/drivers/common/cnxk/roc_platform.h
> @@ -19,6 +19,7 @@
> #include <rte_pci.h>
> #include <rte_spinlock.h>
> #include <rte_string_fns.h>
> +#include <rte_tailq.h>
> #include <rte_telemetry.h>
>
> #include "roc_bits.h"
> @@ -53,6 +54,7 @@
> #define BITMASK_ULL GENMASK_ULL
> #define PLT_ALIGN_CEIL RTE_ALIGN_CEIL
> #define PLT_INIT RTE_INIT
> +#define PLT_TAILQ_FOREACH_SAFE RTE_TAILQ_FOREACH_SAFE
>
> /** Divide ceil */
> #define PLT_DIV_CEIL(x, y) \
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 3/8] common/cnxk: change order of frag sizes and infos
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
2021-12-09 9:13 ` [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:25 ` Jerin Jacob
2022-01-21 10:03 ` Ferruh Yigit
2021-12-09 9:13 ` [PATCH 4/8] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
` (6 subsequent siblings)
8 siblings, 2 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Vidya Sagar Velumuri
Change the order of frag sizes and infos to match HW
implementation.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
---
drivers/common/cnxk/hw/cpt.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 919f842..99a900c 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -286,10 +286,10 @@ struct cpt_frag_info_s {
union {
uint64_t u64;
struct {
- union cpt_frag_info f3;
- union cpt_frag_info f2;
- union cpt_frag_info f1;
union cpt_frag_info f0;
+ union cpt_frag_info f1;
+ union cpt_frag_info f2;
+ union cpt_frag_info f3;
};
} w0;
@@ -297,10 +297,10 @@ struct cpt_frag_info_s {
union {
uint64_t u64;
struct {
- uint16_t frag_size3;
- uint16_t frag_size2;
- uint16_t frag_size1;
uint16_t frag_size0;
+ uint16_t frag_size1;
+ uint16_t frag_size2;
+ uint16_t frag_size3;
};
} w1;
};
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 3/8] common/cnxk: change order of frag sizes and infos
2021-12-09 9:13 ` [PATCH 3/8] common/cnxk: change order of frag sizes and infos Nithin Dabilpuram
@ 2022-01-19 16:25 ` Jerin Jacob
2022-01-21 10:03 ` Ferruh Yigit
1 sibling, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:25 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
dpdk-dev, Vidya Sagar Velumuri
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Change the order of frag sizes and infos to match HW
> implementation.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
> Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Since it a fix, change git log following and Applied to
dpdk-next-net-mrvl/for-next-net. Thanks
common/cnxk: fix byte order of frag sizes and infos
Change the byte order of frag sizes and infos to match HW
implementation.
Fixes: 64a73ebd87bd ("common/cnxk: add CPT hardware definitions")
Cc: stable@dpdk.org
> ---
> drivers/common/cnxk/hw/cpt.h | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
> index 919f842..99a900c 100644
> --- a/drivers/common/cnxk/hw/cpt.h
> +++ b/drivers/common/cnxk/hw/cpt.h
> @@ -286,10 +286,10 @@ struct cpt_frag_info_s {
> union {
> uint64_t u64;
> struct {
> - union cpt_frag_info f3;
> - union cpt_frag_info f2;
> - union cpt_frag_info f1;
> union cpt_frag_info f0;
> + union cpt_frag_info f1;
> + union cpt_frag_info f2;
> + union cpt_frag_info f3;
> };
> } w0;
>
> @@ -297,10 +297,10 @@ struct cpt_frag_info_s {
> union {
> uint64_t u64;
> struct {
> - uint16_t frag_size3;
> - uint16_t frag_size2;
> - uint16_t frag_size1;
> uint16_t frag_size0;
> + uint16_t frag_size1;
> + uint16_t frag_size2;
> + uint16_t frag_size3;
> };
> } w1;
> };
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 3/8] common/cnxk: change order of frag sizes and infos
2021-12-09 9:13 ` [PATCH 3/8] common/cnxk: change order of frag sizes and infos Nithin Dabilpuram
2022-01-19 16:25 ` Jerin Jacob
@ 2022-01-21 10:03 ` Ferruh Yigit
1 sibling, 0 replies; 32+ messages in thread
From: Ferruh Yigit @ 2022-01-21 10:03 UTC (permalink / raw)
To: Nithin Dabilpuram, jerinj, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Vidya Sagar Velumuri
On 12/9/2021 9:13 AM, Nithin Dabilpuram wrote:
> Change the order of frag sizes and infos to match HW
> implementation.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
> Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
> ---
> drivers/common/cnxk/hw/cpt.h | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
> index 919f842..99a900c 100644
> --- a/drivers/common/cnxk/hw/cpt.h
> +++ b/drivers/common/cnxk/hw/cpt.h
> @@ -286,10 +286,10 @@ struct cpt_frag_info_s {
> union {
> uint64_t u64;
> struct {
> - union cpt_frag_info f3;
> - union cpt_frag_info f2;
> - union cpt_frag_info f1;
> union cpt_frag_info f0;
> + union cpt_frag_info f1;
> + union cpt_frag_info f2;
> + union cpt_frag_info f3;
> };
> } w0;
>
> @@ -297,10 +297,10 @@ struct cpt_frag_info_s {
> union {
> uint64_t u64;
> struct {
> - uint16_t frag_size3;
> - uint16_t frag_size2;
> - uint16_t frag_size1;
> uint16_t frag_size0;
> + uint16_t frag_size1;
> + uint16_t frag_size2;
> + uint16_t frag_size3;
If this is related to the endianness requirement of the HW, it can be good to comment
this in the code.
> };
> } w1;
> };
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 4/8] common/cnxk: reset stale values on error debug registers
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
2021-12-09 9:13 ` [PATCH 2/8] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
2021-12-09 9:13 ` [PATCH 3/8] common/cnxk: change order of frag sizes and infos Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:25 ` Jerin Jacob
2021-12-09 9:13 ` [PATCH 5/8] common/cnxk: always use single qint with NIX Nithin Dabilpuram
` (5 subsequent siblings)
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Harman Kalra
From: Harman Kalra <hkalra@marvell.com>
LF's error debug registers like NIX_LF_SQ_OP_ERR_DBG,
NIX_LF_MNQ_ERR_DBG, NIX_LF_SEND_ERR_DBG captures debug
info for an error detected during LMT operation or meta
enqueue or after meta enqueue granted respectively. HW
sets a valid bit when info is captured and SW is expected
to clear this valid bit by writing 1, else these registers
will show stale values of first interrupt when occurred and
will never update with subsequent interrupts.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
drivers/common/cnxk/roc_nix_irq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c
index a5cd9d4..7dcd533 100644
--- a/drivers/common/cnxk/roc_nix_irq.c
+++ b/drivers/common/cnxk/roc_nix_irq.c
@@ -202,9 +202,12 @@ nix_lf_sq_debug_reg(struct nix *nix, uint32_t off)
uint64_t reg;
reg = plt_read64(nix->base + off);
- if (reg & BIT_ULL(44))
+ if (reg & BIT_ULL(44)) {
plt_err("SQ=%d err_code=0x%x", (int)((reg >> 8) & 0xfffff),
(uint8_t)(reg & 0xff));
+ /* Clear valid bit */
+ plt_write64(BIT_ULL(44), nix->base + off);
+ }
}
static void
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 4/8] common/cnxk: reset stale values on error debug registers
2021-12-09 9:13 ` [PATCH 4/8] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
@ 2022-01-19 16:25 ` Jerin Jacob
0 siblings, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:25 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
dpdk-dev, Harman Kalra
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> From: Harman Kalra <hkalra@marvell.com>
>
> LF's error debug registers like NIX_LF_SQ_OP_ERR_DBG,
> NIX_LF_MNQ_ERR_DBG, NIX_LF_SEND_ERR_DBG captures debug
> info for an error detected during LMT operation or meta
> enqueue or after meta enqueue granted respectively. HW
> sets a valid bit when info is captured and SW is expected
> to clear this valid bit by writing 1, else these registers
> will show stale values of first interrupt when occurred and
> will never update with subsequent interrupts.
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_nix_irq.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c
> index a5cd9d4..7dcd533 100644
> --- a/drivers/common/cnxk/roc_nix_irq.c
> +++ b/drivers/common/cnxk/roc_nix_irq.c
> @@ -202,9 +202,12 @@ nix_lf_sq_debug_reg(struct nix *nix, uint32_t off)
> uint64_t reg;
>
> reg = plt_read64(nix->base + off);
> - if (reg & BIT_ULL(44))
> + if (reg & BIT_ULL(44)) {
> plt_err("SQ=%d err_code=0x%x", (int)((reg >> 8) & 0xfffff),
> (uint8_t)(reg & 0xff));
> + /* Clear valid bit */
> + plt_write64(BIT_ULL(44), nix->base + off);
> + }
> }
>
> static void
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 5/8] common/cnxk: always use single qint with NIX
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (2 preceding siblings ...)
2021-12-09 9:13 ` [PATCH 4/8] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:28 ` Jerin Jacob
2021-12-09 9:13 ` [PATCH 6/8] common/cnxk: handle issues from static analysis Nithin Dabilpuram
` (4 subsequent siblings)
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Harman Kalra
From: Harman Kalra <hkalra@marvell.com>
An errata exists whereby, in certain cases NIX may use an
incorrect QINT_IDX for SQ interrupts. As a result, the
interrupt may not be delivered to software, or may not be
associated with the correct SQ.
When NIX uses an incorrect QINT_IDX :
1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
incorrect QINT.
2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
QINT.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
drivers/common/cnxk/roc_nix_queue.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index c8c8401..4455fc1 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -680,7 +680,11 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
/* Many to one reduction */
- aq->sq.qint_idx = sq->qid % nix->qints;
+ /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+ * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+ * might result in software missing the interrupt.
+ */
+ aq->sq.qint_idx = 0;
}
static int
@@ -779,8 +783,11 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
aq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);
aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
- /* Many to one reduction */
- aq->sq.qint_idx = sq->qid % nix->qints;
+ /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+ * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+ * might result in software missing the interrupt.
+ */
+ aq->sq.qint_idx = 0;
}
static int
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 5/8] common/cnxk: always use single qint with NIX
2021-12-09 9:13 ` [PATCH 5/8] common/cnxk: always use single qint with NIX Nithin Dabilpuram
@ 2022-01-19 16:28 ` Jerin Jacob
0 siblings, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:28 UTC (permalink / raw)
To: Nithin Dabilpuram
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
dpdk-dev, Harman Kalra
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> From: Harman Kalra <hkalra@marvell.com>
>
> An errata exists whereby, in certain cases NIX may use an
> incorrect QINT_IDX for SQ interrupts. As a result, the
> interrupt may not be delivered to software, or may not be
> associated with the correct SQ.
> When NIX uses an incorrect QINT_IDX :
> 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
> incorrect QINT.
> 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
> QINT.
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
Changed the subject to;
common/cnxk: always use single interrupt ID with NIX
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_nix_queue.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
> index c8c8401..4455fc1 100644
> --- a/drivers/common/cnxk/roc_nix_queue.c
> +++ b/drivers/common/cnxk/roc_nix_queue.c
> @@ -680,7 +680,11 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
>
> /* Many to one reduction */
> - aq->sq.qint_idx = sq->qid % nix->qints;
> + /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
> + * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
> + * might result in software missing the interrupt.
> + */
> + aq->sq.qint_idx = 0;
> }
>
> static int
> @@ -779,8 +783,11 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> aq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);
> aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
>
> - /* Many to one reduction */
> - aq->sq.qint_idx = sq->qid % nix->qints;
> + /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
> + * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
> + * might result in software missing the interrupt.
> + */
> + aq->sq.qint_idx = 0;
> }
>
> static int
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 6/8] common/cnxk: handle issues from static analysis
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (3 preceding siblings ...)
2021-12-09 9:13 ` [PATCH 5/8] common/cnxk: always use single qint with NIX Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:44 ` Jerin Jacob
2022-01-21 10:05 ` Ferruh Yigit
2021-12-09 9:13 ` [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
` (3 subsequent siblings)
8 siblings, 2 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Gowrishankar Muthukrishnan
From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Handle issues reported by static analysis tool such as
null pointer dereferences, variable initialization, etc.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 7 +++--
drivers/common/cnxk/roc_dev.c | 21 ++++++++++++-
drivers/common/cnxk/roc_nix_debug.c | 6 ++++
drivers/common/cnxk/roc_nix_fc.c | 12 ++++++++
drivers/common/cnxk/roc_nix_queue.c | 61 ++++++++++++++++++++++++++++++++++---
drivers/common/cnxk/roc_nix_stats.c | 18 +++++++++++
drivers/common/cnxk/roc_nix_tm.c | 8 ++++-
7 files changed, 125 insertions(+), 8 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 8f8e6d3..0e2dc45 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -385,6 +385,9 @@ cpt_lfs_alloc(struct dev *dev, uint8_t eng_grpmsk, uint8_t blkaddr,
return -EINVAL;
req = mbox_alloc_msg_cpt_lf_alloc(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->nix_pf_func = 0;
if (inl_dev_sso && nix_inl_dev_pffunc_get())
req->sso_pf_func = nix_inl_dev_pffunc_get();
@@ -812,9 +815,9 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
void
roc_cpt_iq_disable(struct roc_cpt_lf *lf)
{
+ volatile union cpt_lf_q_grp_ptr grp_ptr = {.u = 0x0};
+ volatile union cpt_lf_inprog lf_inprog = {.u = 0x0};
union cpt_lf_ctl lf_ctl = {.u = 0x0};
- union cpt_lf_q_grp_ptr grp_ptr;
- union cpt_lf_inprog lf_inprog;
int timeout = 20;
int cnt;
diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
index 926a916..9a86969 100644
--- a/drivers/common/cnxk/roc_dev.c
+++ b/drivers/common/cnxk/roc_dev.c
@@ -57,7 +57,7 @@ pf_af_sync_msg(struct dev *dev, struct mbox_msghdr **rsp)
struct mbox *mbox = dev->mbox;
struct mbox_dev *mdev = &mbox->dev[0];
- volatile uint64_t int_status;
+ volatile uint64_t int_status = 0;
struct mbox_msghdr *msghdr;
uint64_t off;
int rc = 0;
@@ -152,6 +152,11 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg)
/* Reserve PF/VF mbox message */
size = PLT_ALIGN(size, MBOX_MSG_ALIGN);
rsp = mbox_alloc_msg(&dev->mbox_vfpf, vf, size);
+ if (!rsp) {
+ plt_err("Failed to reserve VF%d message", vf);
+ continue;
+ }
+
mbox_rsp_init(msg->id, rsp);
/* Copy message from AF<->PF mbox to PF<->VF mbox */
@@ -236,6 +241,12 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf)
BIT_ULL(vf % max_bits);
rsp = (struct ready_msg_rsp *)mbox_alloc_msg(
mbox, vf, sizeof(*rsp));
+ if (!rsp) {
+ plt_err("Failed to alloc VF%d READY message",
+ vf);
+ continue;
+ }
+
mbox_rsp_init(msg->id, rsp);
/* PF/VF function ID */
@@ -988,6 +999,9 @@ dev_setup_shared_lmt_region(struct mbox *mbox, bool valid_iova, uint64_t iova)
struct lmtst_tbl_setup_req *req;
req = mbox_alloc_msg_lmtst_tbl_setup(mbox);
+ if (!req)
+ return -ENOSPC;
+
/* This pcifunc is defined with primary pcifunc whose LMT address
* will be shared. If call contains valid IOVA, following pcifunc
* field is of no use.
@@ -1061,6 +1075,11 @@ dev_lmt_setup(struct dev *dev)
*/
if (!dev->disable_shared_lmt) {
idev = idev_get_cfg();
+ if (!idev) {
+ errno = EFAULT;
+ goto free;
+ }
+
if (!__atomic_load_n(&idev->lmt_pf_func, __ATOMIC_ACQUIRE)) {
idev->lmt_base_addr = dev->lmt_base;
idev->lmt_pf_func = dev->pf_func;
diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c
index 266935a..7dc54f3 100644
--- a/drivers/common/cnxk/roc_nix_debug.c
+++ b/drivers/common/cnxk/roc_nix_debug.c
@@ -323,6 +323,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
int rc;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
@@ -341,6 +344,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index ca29cd2..d311371 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -113,6 +113,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -120,6 +123,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -147,6 +153,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -164,6 +173,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index 4455fc1..f99cdd0 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -38,6 +38,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -48,6 +51,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -80,6 +86,9 @@ nix_rq_cn9k_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
@@ -195,6 +204,9 @@ nix_rq_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints, bool cfg,
struct mbox *mbox = dev->mbox;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
@@ -463,6 +475,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -471,6 +486,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -547,6 +565,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -558,6 +579,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -649,7 +673,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
return rc;
}
-static void
+static int
sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
uint16_t smq)
{
@@ -657,6 +681,9 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -685,6 +712,7 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
* might result in software missing the interrupt.
*/
aq->sq.qint_idx = 0;
+ return 0;
}
static int
@@ -698,6 +726,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
int rc, count;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -711,6 +742,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Disable sq */
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -722,6 +756,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Read SQ and free sqb's */
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -753,7 +790,7 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
return 0;
}
-static void
+static int
sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
uint16_t smq)
{
@@ -761,6 +798,9 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -788,6 +828,7 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
* might result in software missing the interrupt.
*/
aq->sq.qint_idx = 0;
+ return 0;
}
static int
@@ -801,6 +842,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
int rc, count;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -814,6 +858,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Disable sq */
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -825,6 +872,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Read SQ and free sqb's */
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -895,9 +945,12 @@ roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
/* Init SQ context */
if (roc_model_is_cn9k())
- sq_cn9k_init(nix, sq, rr_quantum, smq);
+ rc = sq_cn9k_init(nix, sq, rr_quantum, smq);
else
- sq_init(nix, sq, rr_quantum, smq);
+ rc = sq_init(nix, sq, rr_quantum, smq);
+
+ if (rc)
+ goto nomem;
rc = mbox_process(mbox);
if (rc)
diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c
index c50c8fa..756111f 100644
--- a/drivers/common/cnxk/roc_nix_stats.c
+++ b/drivers/common/cnxk/roc_nix_stats.c
@@ -124,6 +124,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -143,6 +146,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -174,6 +180,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -190,6 +199,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -295,6 +307,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
if (roc_model_is_cn9k()) {
req = mbox_alloc_msg_cgx_stats(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
rc = mbox_process_msg(mbox, (void *)&cgx_resp);
@@ -316,6 +331,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
}
} else {
req = mbox_alloc_msg_rpm_stats(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
rc = mbox_process_msg(mbox, (void *)&rpm_resp);
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index fe9e83f..a0448be 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -424,7 +424,7 @@ nix_tm_bp_config_get(struct roc_nix *roc_nix, bool *is_enabled)
if (req) {
req->num_regs = k;
- rc = mbox_process(mbox);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
if (rc)
goto err;
/* Report it as enabled only if enabled or all */
@@ -766,6 +766,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -781,6 +784,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 6/8] common/cnxk: handle issues from static analysis
2021-12-09 9:13 ` [PATCH 6/8] common/cnxk: handle issues from static analysis Nithin Dabilpuram
@ 2022-01-19 16:44 ` Jerin Jacob
2022-01-21 10:05 ` Ferruh Yigit
1 sibling, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:44 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao,
dpdk-dev, Gowrishankar Muthukrishnan
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
>
> Handle issues reported by static analysis tool such as
> null pointer dereferences, variable initialization, etc.
>
> Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
Since it the fix, Changed the git log to
common/cnxk: fix issues reported by klockwork
Fix issues reported by klockwork(static analysis tool) such as
null pointer dereferences, variable initialization, etc.
Fixes: c045d2e5cbbc ("common/cnxk: add CPT configuration")
Fixes: ed135040f0ab ("common/cnxk: add CPT LF configuration")
Fixes: 585bb3e538f9 ("common/cnxk: add VF support to base device class")
Fixes: 665ff1ccc2c4 ("common/cnxk: add base device class")
Fixes: da57d4589a6f ("common/cnxk: support NIX flow control")
Fixes: 218d022e1f3f ("common/cnxk: support NIX stats")
Fixes: 4efa6e82fe43 ("common/cnxk: support NIX extended stats")
Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> drivers/common/cnxk/roc_cpt.c | 7 +++--
> drivers/common/cnxk/roc_dev.c | 21 ++++++++++++-
> drivers/common/cnxk/roc_nix_debug.c | 6 ++++
> drivers/common/cnxk/roc_nix_fc.c | 12 ++++++++
> drivers/common/cnxk/roc_nix_queue.c | 61 ++++++++++++++++++++++++++++++++++---
> drivers/common/cnxk/roc_nix_stats.c | 18 +++++++++++
> drivers/common/cnxk/roc_nix_tm.c | 8 ++++-
> 7 files changed, 125 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
> index 8f8e6d3..0e2dc45 100644
> --- a/drivers/common/cnxk/roc_cpt.c
> +++ b/drivers/common/cnxk/roc_cpt.c
> @@ -385,6 +385,9 @@ cpt_lfs_alloc(struct dev *dev, uint8_t eng_grpmsk, uint8_t blkaddr,
> return -EINVAL;
>
> req = mbox_alloc_msg_cpt_lf_alloc(mbox);
> + if (!req)
> + return -ENOSPC;
> +
> req->nix_pf_func = 0;
> if (inl_dev_sso && nix_inl_dev_pffunc_get())
> req->sso_pf_func = nix_inl_dev_pffunc_get();
> @@ -812,9 +815,9 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
> void
> roc_cpt_iq_disable(struct roc_cpt_lf *lf)
> {
> + volatile union cpt_lf_q_grp_ptr grp_ptr = {.u = 0x0};
> + volatile union cpt_lf_inprog lf_inprog = {.u = 0x0};
> union cpt_lf_ctl lf_ctl = {.u = 0x0};
> - union cpt_lf_q_grp_ptr grp_ptr;
> - union cpt_lf_inprog lf_inprog;
> int timeout = 20;
> int cnt;
>
> diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
> index 926a916..9a86969 100644
> --- a/drivers/common/cnxk/roc_dev.c
> +++ b/drivers/common/cnxk/roc_dev.c
> @@ -57,7 +57,7 @@ pf_af_sync_msg(struct dev *dev, struct mbox_msghdr **rsp)
> struct mbox *mbox = dev->mbox;
> struct mbox_dev *mdev = &mbox->dev[0];
>
> - volatile uint64_t int_status;
> + volatile uint64_t int_status = 0;
> struct mbox_msghdr *msghdr;
> uint64_t off;
> int rc = 0;
> @@ -152,6 +152,11 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg)
> /* Reserve PF/VF mbox message */
> size = PLT_ALIGN(size, MBOX_MSG_ALIGN);
> rsp = mbox_alloc_msg(&dev->mbox_vfpf, vf, size);
> + if (!rsp) {
> + plt_err("Failed to reserve VF%d message", vf);
> + continue;
> + }
> +
> mbox_rsp_init(msg->id, rsp);
>
> /* Copy message from AF<->PF mbox to PF<->VF mbox */
> @@ -236,6 +241,12 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf)
> BIT_ULL(vf % max_bits);
> rsp = (struct ready_msg_rsp *)mbox_alloc_msg(
> mbox, vf, sizeof(*rsp));
> + if (!rsp) {
> + plt_err("Failed to alloc VF%d READY message",
> + vf);
> + continue;
> + }
> +
> mbox_rsp_init(msg->id, rsp);
>
> /* PF/VF function ID */
> @@ -988,6 +999,9 @@ dev_setup_shared_lmt_region(struct mbox *mbox, bool valid_iova, uint64_t iova)
> struct lmtst_tbl_setup_req *req;
>
> req = mbox_alloc_msg_lmtst_tbl_setup(mbox);
> + if (!req)
> + return -ENOSPC;
> +
> /* This pcifunc is defined with primary pcifunc whose LMT address
> * will be shared. If call contains valid IOVA, following pcifunc
> * field is of no use.
> @@ -1061,6 +1075,11 @@ dev_lmt_setup(struct dev *dev)
> */
> if (!dev->disable_shared_lmt) {
> idev = idev_get_cfg();
> + if (!idev) {
> + errno = EFAULT;
> + goto free;
> + }
> +
> if (!__atomic_load_n(&idev->lmt_pf_func, __ATOMIC_ACQUIRE)) {
> idev->lmt_base_addr = dev->lmt_base;
> idev->lmt_pf_func = dev->pf_func;
> diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c
> index 266935a..7dc54f3 100644
> --- a/drivers/common/cnxk/roc_nix_debug.c
> +++ b/drivers/common/cnxk/roc_nix_debug.c
> @@ -323,6 +323,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
> int rc;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = ctype;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -341,6 +344,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = ctype;
> aq->op = NIX_AQ_INSTOP_READ;
> diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
> index ca29cd2..d311371 100644
> --- a/drivers/common/cnxk/roc_nix_fc.c
> +++ b/drivers/common/cnxk/roc_nix_fc.c
> @@ -113,6 +113,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = fc_cfg->cq_cfg.rq;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -120,6 +123,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = fc_cfg->cq_cfg.rq;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -147,6 +153,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = fc_cfg->cq_cfg.rq;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -164,6 +173,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = fc_cfg->cq_cfg.rq;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
> index 4455fc1..f99cdd0 100644
> --- a/drivers/common/cnxk/roc_nix_queue.c
> +++ b/drivers/common/cnxk/roc_nix_queue.c
> @@ -38,6 +38,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = rq->qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -48,6 +51,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = rq->qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -80,6 +86,9 @@ nix_rq_cn9k_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints,
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = rq->qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
> @@ -195,6 +204,9 @@ nix_rq_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints, bool cfg,
> struct mbox *mbox = dev->mbox;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = rq->qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
> @@ -463,6 +475,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = cq->qid;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_INIT;
> @@ -471,6 +486,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = cq->qid;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_INIT;
> @@ -547,6 +565,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = cq->qid;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -558,6 +579,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = cq->qid;
> aq->ctype = NIX_AQ_CTYPE_CQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -649,7 +673,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
> return rc;
> }
>
> -static void
> +static int
> sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> uint16_t smq)
> {
> @@ -657,6 +681,9 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_INIT;
> @@ -685,6 +712,7 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> * might result in software missing the interrupt.
> */
> aq->sq.qint_idx = 0;
> + return 0;
> }
>
> static int
> @@ -698,6 +726,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
> int rc, count;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -711,6 +742,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
>
> /* Disable sq */
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -722,6 +756,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
>
> /* Read SQ and free sqb's */
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -753,7 +790,7 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
> return 0;
> }
>
> -static void
> +static int
> sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> uint16_t smq)
> {
> @@ -761,6 +798,9 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_INIT;
> @@ -788,6 +828,7 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
> * might result in software missing the interrupt.
> */
> aq->sq.qint_idx = 0;
> + return 0;
> }
>
> static int
> @@ -801,6 +842,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
> int rc, count;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -814,6 +858,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
>
> /* Disable sq */
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -825,6 +872,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
>
> /* Read SQ and free sqb's */
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = sq->qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_READ;
> @@ -895,9 +945,12 @@ roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
>
> /* Init SQ context */
> if (roc_model_is_cn9k())
> - sq_cn9k_init(nix, sq, rr_quantum, smq);
> + rc = sq_cn9k_init(nix, sq, rr_quantum, smq);
> else
> - sq_init(nix, sq, rr_quantum, smq);
> + rc = sq_init(nix, sq, rr_quantum, smq);
> +
> + if (rc)
> + goto nomem;
>
> rc = mbox_process(mbox);
> if (rc)
> diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c
> index c50c8fa..756111f 100644
> --- a/drivers/common/cnxk/roc_nix_stats.c
> +++ b/drivers/common/cnxk/roc_nix_stats.c
> @@ -124,6 +124,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -143,6 +146,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_RQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -174,6 +180,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -190,6 +199,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -295,6 +307,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
>
> if (roc_model_is_cn9k()) {
> req = mbox_alloc_msg_cgx_stats(mbox);
> + if (!req)
> + return -ENOSPC;
> +
> req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
>
> rc = mbox_process_msg(mbox, (void *)&cgx_resp);
> @@ -316,6 +331,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
> }
> } else {
> req = mbox_alloc_msg_rpm_stats(mbox);
> + if (!req)
> + return -ENOSPC;
> +
> req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
>
> rc = mbox_process_msg(mbox, (void *)&rpm_resp);
> diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
> index fe9e83f..a0448be 100644
> --- a/drivers/common/cnxk/roc_nix_tm.c
> +++ b/drivers/common/cnxk/roc_nix_tm.c
> @@ -424,7 +424,7 @@ nix_tm_bp_config_get(struct roc_nix *roc_nix, bool *is_enabled)
>
> if (req) {
> req->num_regs = k;
> - rc = mbox_process(mbox);
> + rc = mbox_process_msg(mbox, (void **)&rsp);
> if (rc)
> goto err;
> /* Report it as enabled only if enabled or all */
> @@ -766,6 +766,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
> struct nix_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> @@ -781,6 +784,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
> struct nix_cn10k_aq_enq_req *aq;
>
> aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
> + if (!aq)
> + return -ENOSPC;
> +
> aq->qidx = qid;
> aq->ctype = NIX_AQ_CTYPE_SQ;
> aq->op = NIX_AQ_INSTOP_WRITE;
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 6/8] common/cnxk: handle issues from static analysis
2021-12-09 9:13 ` [PATCH 6/8] common/cnxk: handle issues from static analysis Nithin Dabilpuram
2022-01-19 16:44 ` Jerin Jacob
@ 2022-01-21 10:05 ` Ferruh Yigit
1 sibling, 0 replies; 32+ messages in thread
From: Ferruh Yigit @ 2022-01-21 10:05 UTC (permalink / raw)
To: Nithin Dabilpuram, jerinj, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, Gowrishankar Muthukrishnan
On 12/9/2021 9:13 AM, Nithin Dabilpuram wrote:
> From: Gowrishankar Muthukrishnan<gmuthukrishn@marvell.com>
>
> Handle issues reported by static analysis tool such as
> null pointer dereferences, variable initialization, etc.
>
> Signed-off-by: Gowrishankar Muthukrishnan<gmuthukrishn@marvell.com>
> Signed-off-by: Nithin Dabilpuram<ndabilpuram@marvell.com>
Hi Gowrishankar, Nithin,
On its own static analysis issues fixed is not very descriptive,
can you please split the patch to the fix types, like:
- fix null pointer derefences
- fix variable initialization
...
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (4 preceding siblings ...)
2021-12-09 9:13 ` [PATCH 6/8] common/cnxk: handle issues from static analysis Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-21 10:06 ` Ferruh Yigit
2021-12-09 9:13 ` [PATCH 8/8] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
` (2 subsequent siblings)
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao; +Cc: dev
Improve inbound inline error handling for CN9K in terms of
packet delivered to application for different kinds of errors.
Also update udp ports to be used for UDP encapsulation support.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/cnxk_security.c | 6 +++++
drivers/common/cnxk/roc_ie_on.h | 16 +++++++++++-
drivers/net/cnxk/cn9k_rx.h | 50 +++++++++++++++++++++++++++++++++++--
3 files changed, 69 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c
index 30562b4..8b4dd1c 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -710,6 +710,12 @@ cnxk_onf_ipsec_outb_sa_fill(struct roc_onf_ipsec_outb_sa *sa,
return -EINVAL;
}
+ /* Update udp encap ports */
+ if (ipsec_xfrm->options.udp_encap == 1) {
+ sa->udp_src = 4500;
+ sa->udp_dst = 4500;
+ }
+
skip_tunnel_info:
rte_wmb();
diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index 53591c6..376e698 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -188,7 +188,21 @@ struct roc_ie_on_inb_sa {
#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL
/* Ucode completion codes */
-#define ROC_IE_ONF_UCC_SUCCESS 0
+#define ROC_IE_ON_UCC_SUCCESS 0
+#define ROC_IE_ON_UCC_ENC_TYPE_ERR 0xB1
+#define ROC_IE_ON_UCC_IP_VER_ERR 0xB2
+#define ROC_IE_ON_UCC_PROTO_ERR 0xB3
+#define ROC_IE_ON_UCC_CTX_INVALID 0xB4
+#define ROC_IE_ON_UCC_CTX_DIR_MISMATCH 0xB5
+#define ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR 0xB6
+#define ROC_IE_ON_UCC_CTX_FLAG_MISMATCH 0xB7
+#define ROC_IE_ON_UCC_SPI_MISMATCH 0xBE
+#define ROC_IE_ON_UCC_IP_CHKSUM_ERR 0xBF
+#define ROC_IE_ON_UCC_AUTH_ERR 0xC3
+#define ROC_IE_ON_UCC_PADDING_INVALID 0xC4
+#define ROC_IE_ON_UCC_SA_MISMATCH 0xCC
+#define ROC_IE_ON_UCC_L2_HDR_INFO_ERR 0xCF
+#define ROC_IE_ON_UCC_L2_HDR_LEN_ERR 0xE0
struct roc_ie_onf_sa_ctl {
uint32_t spi;
diff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h
index 225bb41..cbb6299 100644
--- a/drivers/net/cnxk/cn9k_rx.h
+++ b/drivers/net/cnxk/cn9k_rx.h
@@ -211,6 +211,52 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,
return rc;
}
+static inline uint64_t
+nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,
+ uint64_t *rearm_val, uint16_t *len)
+{
+ uint8_t uc_cc = res >> 8;
+ uint8_t cc = res & 0xFF;
+ uint64_t data_off;
+ uint64_t ol_flags;
+ uint16_t m_len;
+
+ if (unlikely(cc != CPT_COMP_GOOD))
+ return RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+
+ data_off = *rearm_val & (BIT_ULL(16) - 1);
+ m_len = rx->cn9k.pkt_lenm1 + 1;
+
+ switch (uc_cc) {
+ case ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR:
+ case ROC_IE_ON_UCC_AUTH_ERR:
+ case ROC_IE_ON_UCC_PADDING_INVALID:
+ /* Adjust data offset to start at copied L2 */
+ data_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
+ ROC_ONF_IPSEC_INB_MAX_L2_SZ;
+ ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ break;
+ case ROC_IE_ON_UCC_CTX_INVALID:
+ case ROC_IE_ON_UCC_SPI_MISMATCH:
+ case ROC_IE_ON_UCC_SA_MISMATCH:
+ /* Return as normal packet */
+ ol_flags = 0;
+ break;
+ default:
+ /* Return as error packet after updating packet lengths */
+ ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ break;
+ }
+
+ *len = m_len;
+ *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
+ *rearm_val |= data_off;
+ return ol_flags;
+}
+
static __rte_always_inline uint64_t
nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)
@@ -236,8 +282,8 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
rte_prefetch0((void *)data);
- if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8)))
- return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8)))
+ return nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len);
data += lcptr;
/* 20 bits of tag would have the SPI */
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k
2021-12-09 9:13 ` [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
@ 2022-01-21 10:06 ` Ferruh Yigit
0 siblings, 0 replies; 32+ messages in thread
From: Ferruh Yigit @ 2022-01-21 10:06 UTC (permalink / raw)
To: Nithin Dabilpuram, jerinj, Kiran Kumar K, Sunil Kumar Kori, Satha Rao; +Cc: dev
On 12/9/2021 9:13 AM, Nithin Dabilpuram wrote:
> Improve inbound inline error handling for CN9K in terms of
> packet delivered to application for different kinds of errors.
>
> Also update udp ports to be used for UDP encapsulation support.
>
This second change seems very unrelated with first change (unless I am missing something),
can you please split it to another patch?
> Signed-off-by: Nithin Dabilpuram<ndabilpuram@marvell.com>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 8/8] net/cnxk: synchronize inline session create and destroy
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (5 preceding siblings ...)
2021-12-09 9:13 ` [PATCH 7/8] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
@ 2021-12-09 9:13 ` Nithin Dabilpuram
2022-01-19 16:45 ` Jerin Jacob
2022-01-19 16:15 ` [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Jerin Jacob
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2021-12-09 9:13 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao; +Cc: dev
Synchronize inline session create and destroy using spinlock.
Also move security related error prints outside the spinlock.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/net/cnxk/cn10k_ethdev_sec.c | 35 ++++++++++++++++++++++++++++-------
drivers/net/cnxk/cn9k_ethdev_sec.c | 34 +++++++++++++++++++++++++++-------
drivers/net/cnxk/cnxk_ethdev.c | 7 +++++--
drivers/net/cnxk/cnxk_ethdev.h | 6 ++++++
4 files changed, 66 insertions(+), 16 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 235c168..12cec0a 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -238,6 +238,8 @@ cn10k_eth_sec_session_create(void *device,
struct rte_crypto_sym_xform *crypto;
struct cnxk_eth_sec_sess *eth_sec;
bool inbound, inl_dev;
+ rte_spinlock_t *lock;
+ char tbuf[128] = {0};
int rc = 0;
if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)
@@ -272,6 +274,9 @@ cn10k_eth_sec_session_create(void *device,
memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
sess_priv.u64 = 0;
+ lock = inbound ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
/* Acquire lock on inline dev for inbound */
if (inbound && inl_dev)
roc_nix_inl_dev_lock();
@@ -287,12 +292,14 @@ cn10k_eth_sec_session_create(void *device,
/* Get Inbound SA from NIX_RX_IPSEC_SA_BASE */
sa = roc_nix_inl_inb_sa_get(&dev->nix, inl_dev, ipsec->spi);
if (!sa && dev->inb.inl_dev) {
- plt_err("Failed to create ingress sa, inline dev "
- "not found or spi not in range");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa, inline dev "
+ "not found or spi not in range");
rc = -ENOTSUP;
goto mempool_put;
} else if (!sa) {
- plt_err("Failed to create ingress sa");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa");
rc = -EFAULT;
goto mempool_put;
}
@@ -301,8 +308,9 @@ cn10k_eth_sec_session_create(void *device,
/* Check if SA is already in use */
if (inb_sa->w2.s.valid) {
- plt_err("Inbound SA with SPI %u already in use",
- ipsec->spi);
+ snprintf(tbuf, sizeof(tbuf),
+ "Inbound SA with SPI %u already in use",
+ ipsec->spi);
rc = -EBUSY;
goto mempool_put;
}
@@ -313,7 +321,8 @@ cn10k_eth_sec_session_create(void *device,
/* Fill inbound sa params */
rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto);
if (rc) {
- plt_err("Failed to init inbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init inbound sa, rc=%d", rc);
goto mempool_put;
}
@@ -371,7 +380,8 @@ cn10k_eth_sec_session_create(void *device,
/* Fill outbound sa params */
rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
if (rc) {
- plt_err("Failed to init outbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init outbound sa, rc=%d", rc);
rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
goto mempool_put;
}
@@ -409,6 +419,7 @@ cn10k_eth_sec_session_create(void *device,
}
if (inbound && inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u inl_dev=%u",
inbound ? "inbound" : "outbound", eth_sec->spi,
@@ -422,7 +433,11 @@ cn10k_eth_sec_session_create(void *device,
mempool_put:
if (inbound && inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
+
rte_mempool_put(mempool, eth_sec);
+ if (rc)
+ plt_err("%s", tbuf);
return rc;
}
@@ -433,12 +448,16 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
struct cnxk_eth_sec_sess *eth_sec;
struct rte_mempool *mp;
+ rte_spinlock_t *lock;
void *sa_dptr;
eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
if (!eth_sec)
return -ENOENT;
+ lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
if (eth_sec->inl_dev)
roc_nix_inl_dev_lock();
@@ -468,6 +487,8 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
if (eth_sec->inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u, inl_dev=%u",
eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx, eth_sec->inl_dev);
diff --git a/drivers/net/cnxk/cn9k_ethdev_sec.c b/drivers/net/cnxk/cn9k_ethdev_sec.c
index b070ad5..efdce22 100644
--- a/drivers/net/cnxk/cn9k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn9k_ethdev_sec.c
@@ -146,6 +146,8 @@ cn9k_eth_sec_session_create(void *device,
struct cn9k_sec_sess_priv sess_priv;
struct rte_crypto_sym_xform *crypto;
struct cnxk_eth_sec_sess *eth_sec;
+ rte_spinlock_t *lock;
+ char tbuf[128] = {0};
bool inbound;
int rc = 0;
@@ -174,6 +176,9 @@ cn9k_eth_sec_session_create(void *device,
return -ENOMEM;
}
+ lock = inbound ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
sess_priv.u64 = 0;
@@ -187,18 +192,20 @@ cn9k_eth_sec_session_create(void *device,
/* Get Inbound SA from NIX_RX_IPSEC_SA_BASE. Assume no inline
* device always for CN9K.
*/
- inb_sa = (struct roc_onf_ipsec_inb_sa *)
- roc_nix_inl_inb_sa_get(&dev->nix, false, ipsec->spi);
+ inb_sa = (struct roc_onf_ipsec_inb_sa *)roc_nix_inl_inb_sa_get(
+ &dev->nix, false, ipsec->spi);
if (!inb_sa) {
- plt_err("Failed to create ingress sa");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa");
rc = -EFAULT;
goto mempool_put;
}
/* Check if SA is already in use */
if (inb_sa->ctl.valid) {
- plt_err("Inbound SA with SPI %u already in use",
- ipsec->spi);
+ snprintf(tbuf, sizeof(tbuf),
+ "Inbound SA with SPI %u already in use",
+ ipsec->spi);
rc = -EBUSY;
goto mempool_put;
}
@@ -208,7 +215,8 @@ cn9k_eth_sec_session_create(void *device,
/* Fill inbound sa params */
rc = cnxk_onf_ipsec_inb_sa_fill(inb_sa, ipsec, crypto);
if (rc) {
- plt_err("Failed to init inbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init inbound sa, rc=%d", rc);
goto mempool_put;
}
@@ -263,7 +271,8 @@ cn9k_eth_sec_session_create(void *device,
/* Fill outbound sa params */
rc = cnxk_onf_ipsec_outb_sa_fill(outb_sa, ipsec, crypto);
if (rc) {
- plt_err("Failed to init outbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init outbound sa, rc=%d", rc);
rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
goto mempool_put;
}
@@ -300,6 +309,8 @@ cn9k_eth_sec_session_create(void *device,
/* Sync SA content */
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u",
inbound ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx);
@@ -310,7 +321,10 @@ cn9k_eth_sec_session_create(void *device,
return 0;
mempool_put:
+ rte_spinlock_unlock(lock);
rte_mempool_put(mempool, eth_sec);
+ if (rc)
+ plt_err("%s", tbuf);
return rc;
}
@@ -323,11 +337,15 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
struct roc_onf_ipsec_inb_sa *inb_sa;
struct cnxk_eth_sec_sess *eth_sec;
struct rte_mempool *mp;
+ rte_spinlock_t *lock;
eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
if (!eth_sec)
return -ENOENT;
+ lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
if (eth_sec->inb) {
inb_sa = eth_sec->sa;
/* Disable SA */
@@ -349,6 +367,8 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
/* Sync SA content */
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u",
eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx);
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 74f6255..c2e7f2f 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1605,8 +1605,6 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
sec_ctx->flags =
(RTE_SEC_CTX_F_FAST_SET_MDATA | RTE_SEC_CTX_F_FAST_GET_UDATA);
eth_dev->security_ctx = sec_ctx;
- TAILQ_INIT(&dev->inb.list);
- TAILQ_INIT(&dev->outb.list);
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@ -1642,6 +1640,11 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
dev->configured = 0;
dev->ptype_disable = 0;
+ TAILQ_INIT(&dev->inb.list);
+ TAILQ_INIT(&dev->outb.list);
+ rte_spinlock_init(&dev->inb.lock);
+ rte_spinlock_init(&dev->outb.lock);
+
/* For vfs, returned max_entries will be 0. but to keep default mac
* address, one entry must be allocated. so setting up to 1.
*/
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5bfda3d..db1fb4b 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -271,6 +271,9 @@ struct cnxk_eth_dev_sec_inb {
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
/* Outbound security data */
@@ -304,6 +307,9 @@ struct cnxk_eth_dev_sec_outb {
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
struct cnxk_eth_dev {
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH 8/8] net/cnxk: synchronize inline session create and destroy
2021-12-09 9:13 ` [PATCH 8/8] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
@ 2022-01-19 16:45 ` Jerin Jacob
0 siblings, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:45 UTC (permalink / raw)
To: Nithin Dabilpuram
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dpdk-dev
On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Synchronize inline session create and destroy using spinlock.
> Also move security related error prints outside the spinlock.
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Fixed the following issue
CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#159: FILE: drivers/net/cnxk/cn9k_ethdev_sec.c:195:
+ inb_sa = (struct roc_onf_ipsec_inb_sa *)roc_nix_inl_inb_sa_get(
And Series applied to dpdk-next-net-mrvl/for-next-net. Thanks.
> ---
> drivers/net/cnxk/cn10k_ethdev_sec.c | 35 ++++++++++++++++++++++++++++-------
> drivers/net/cnxk/cn9k_ethdev_sec.c | 34 +++++++++++++++++++++++++++-------
> drivers/net/cnxk/cnxk_ethdev.c | 7 +++++--
> drivers/net/cnxk/cnxk_ethdev.h | 6 ++++++
> 4 files changed, 66 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c
> index 235c168..12cec0a 100644
> --- a/drivers/net/cnxk/cn10k_ethdev_sec.c
> +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
> @@ -238,6 +238,8 @@ cn10k_eth_sec_session_create(void *device,
> struct rte_crypto_sym_xform *crypto;
> struct cnxk_eth_sec_sess *eth_sec;
> bool inbound, inl_dev;
> + rte_spinlock_t *lock;
> + char tbuf[128] = {0};
> int rc = 0;
>
> if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)
> @@ -272,6 +274,9 @@ cn10k_eth_sec_session_create(void *device,
> memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
> sess_priv.u64 = 0;
>
> + lock = inbound ? &dev->inb.lock : &dev->outb.lock;
> + rte_spinlock_lock(lock);
> +
> /* Acquire lock on inline dev for inbound */
> if (inbound && inl_dev)
> roc_nix_inl_dev_lock();
> @@ -287,12 +292,14 @@ cn10k_eth_sec_session_create(void *device,
> /* Get Inbound SA from NIX_RX_IPSEC_SA_BASE */
> sa = roc_nix_inl_inb_sa_get(&dev->nix, inl_dev, ipsec->spi);
> if (!sa && dev->inb.inl_dev) {
> - plt_err("Failed to create ingress sa, inline dev "
> - "not found or spi not in range");
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to create ingress sa, inline dev "
> + "not found or spi not in range");
> rc = -ENOTSUP;
> goto mempool_put;
> } else if (!sa) {
> - plt_err("Failed to create ingress sa");
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to create ingress sa");
> rc = -EFAULT;
> goto mempool_put;
> }
> @@ -301,8 +308,9 @@ cn10k_eth_sec_session_create(void *device,
>
> /* Check if SA is already in use */
> if (inb_sa->w2.s.valid) {
> - plt_err("Inbound SA with SPI %u already in use",
> - ipsec->spi);
> + snprintf(tbuf, sizeof(tbuf),
> + "Inbound SA with SPI %u already in use",
> + ipsec->spi);
> rc = -EBUSY;
> goto mempool_put;
> }
> @@ -313,7 +321,8 @@ cn10k_eth_sec_session_create(void *device,
> /* Fill inbound sa params */
> rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto);
> if (rc) {
> - plt_err("Failed to init inbound sa, rc=%d", rc);
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to init inbound sa, rc=%d", rc);
> goto mempool_put;
> }
>
> @@ -371,7 +380,8 @@ cn10k_eth_sec_session_create(void *device,
> /* Fill outbound sa params */
> rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
> if (rc) {
> - plt_err("Failed to init outbound sa, rc=%d", rc);
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to init outbound sa, rc=%d", rc);
> rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
> goto mempool_put;
> }
> @@ -409,6 +419,7 @@ cn10k_eth_sec_session_create(void *device,
> }
> if (inbound && inl_dev)
> roc_nix_inl_dev_unlock();
> + rte_spinlock_unlock(lock);
>
> plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u inl_dev=%u",
> inbound ? "inbound" : "outbound", eth_sec->spi,
> @@ -422,7 +433,11 @@ cn10k_eth_sec_session_create(void *device,
> mempool_put:
> if (inbound && inl_dev)
> roc_nix_inl_dev_unlock();
> + rte_spinlock_unlock(lock);
> +
> rte_mempool_put(mempool, eth_sec);
> + if (rc)
> + plt_err("%s", tbuf);
> return rc;
> }
>
> @@ -433,12 +448,16 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
> struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
> struct cnxk_eth_sec_sess *eth_sec;
> struct rte_mempool *mp;
> + rte_spinlock_t *lock;
> void *sa_dptr;
>
> eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
> if (!eth_sec)
> return -ENOENT;
>
> + lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
> + rte_spinlock_lock(lock);
> +
> if (eth_sec->inl_dev)
> roc_nix_inl_dev_lock();
>
> @@ -468,6 +487,8 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
> if (eth_sec->inl_dev)
> roc_nix_inl_dev_unlock();
>
> + rte_spinlock_unlock(lock);
> +
> plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u, inl_dev=%u",
> eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
> eth_sec->sa_idx, eth_sec->inl_dev);
> diff --git a/drivers/net/cnxk/cn9k_ethdev_sec.c b/drivers/net/cnxk/cn9k_ethdev_sec.c
> index b070ad5..efdce22 100644
> --- a/drivers/net/cnxk/cn9k_ethdev_sec.c
> +++ b/drivers/net/cnxk/cn9k_ethdev_sec.c
> @@ -146,6 +146,8 @@ cn9k_eth_sec_session_create(void *device,
> struct cn9k_sec_sess_priv sess_priv;
> struct rte_crypto_sym_xform *crypto;
> struct cnxk_eth_sec_sess *eth_sec;
> + rte_spinlock_t *lock;
> + char tbuf[128] = {0};
> bool inbound;
> int rc = 0;
>
> @@ -174,6 +176,9 @@ cn9k_eth_sec_session_create(void *device,
> return -ENOMEM;
> }
>
> + lock = inbound ? &dev->inb.lock : &dev->outb.lock;
> + rte_spinlock_lock(lock);
> +
> memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
> sess_priv.u64 = 0;
>
> @@ -187,18 +192,20 @@ cn9k_eth_sec_session_create(void *device,
> /* Get Inbound SA from NIX_RX_IPSEC_SA_BASE. Assume no inline
> * device always for CN9K.
> */
> - inb_sa = (struct roc_onf_ipsec_inb_sa *)
> - roc_nix_inl_inb_sa_get(&dev->nix, false, ipsec->spi);
> + inb_sa = (struct roc_onf_ipsec_inb_sa *)roc_nix_inl_inb_sa_get(
> + &dev->nix, false, ipsec->spi);
> if (!inb_sa) {
> - plt_err("Failed to create ingress sa");
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to create ingress sa");
> rc = -EFAULT;
> goto mempool_put;
> }
>
> /* Check if SA is already in use */
> if (inb_sa->ctl.valid) {
> - plt_err("Inbound SA with SPI %u already in use",
> - ipsec->spi);
> + snprintf(tbuf, sizeof(tbuf),
> + "Inbound SA with SPI %u already in use",
> + ipsec->spi);
> rc = -EBUSY;
> goto mempool_put;
> }
> @@ -208,7 +215,8 @@ cn9k_eth_sec_session_create(void *device,
> /* Fill inbound sa params */
> rc = cnxk_onf_ipsec_inb_sa_fill(inb_sa, ipsec, crypto);
> if (rc) {
> - plt_err("Failed to init inbound sa, rc=%d", rc);
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to init inbound sa, rc=%d", rc);
> goto mempool_put;
> }
>
> @@ -263,7 +271,8 @@ cn9k_eth_sec_session_create(void *device,
> /* Fill outbound sa params */
> rc = cnxk_onf_ipsec_outb_sa_fill(outb_sa, ipsec, crypto);
> if (rc) {
> - plt_err("Failed to init outbound sa, rc=%d", rc);
> + snprintf(tbuf, sizeof(tbuf),
> + "Failed to init outbound sa, rc=%d", rc);
> rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
> goto mempool_put;
> }
> @@ -300,6 +309,8 @@ cn9k_eth_sec_session_create(void *device,
> /* Sync SA content */
> plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
>
> + rte_spinlock_unlock(lock);
> +
> plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u",
> inbound ? "inbound" : "outbound", eth_sec->spi,
> eth_sec->sa_idx);
> @@ -310,7 +321,10 @@ cn9k_eth_sec_session_create(void *device,
>
> return 0;
> mempool_put:
> + rte_spinlock_unlock(lock);
> rte_mempool_put(mempool, eth_sec);
> + if (rc)
> + plt_err("%s", tbuf);
> return rc;
> }
>
> @@ -323,11 +337,15 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
> struct roc_onf_ipsec_inb_sa *inb_sa;
> struct cnxk_eth_sec_sess *eth_sec;
> struct rte_mempool *mp;
> + rte_spinlock_t *lock;
>
> eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
> if (!eth_sec)
> return -ENOENT;
>
> + lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
> + rte_spinlock_lock(lock);
> +
> if (eth_sec->inb) {
> inb_sa = eth_sec->sa;
> /* Disable SA */
> @@ -349,6 +367,8 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
> /* Sync SA content */
> plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
>
> + rte_spinlock_unlock(lock);
> +
> plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u",
> eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
> eth_sec->sa_idx);
> diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
> index 74f6255..c2e7f2f 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.c
> +++ b/drivers/net/cnxk/cnxk_ethdev.c
> @@ -1605,8 +1605,6 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
> sec_ctx->flags =
> (RTE_SEC_CTX_F_FAST_SET_MDATA | RTE_SEC_CTX_F_FAST_GET_UDATA);
> eth_dev->security_ctx = sec_ctx;
> - TAILQ_INIT(&dev->inb.list);
> - TAILQ_INIT(&dev->outb.list);
>
> /* For secondary processes, the primary has done all the work */
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> @@ -1642,6 +1640,11 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
> dev->configured = 0;
> dev->ptype_disable = 0;
>
> + TAILQ_INIT(&dev->inb.list);
> + TAILQ_INIT(&dev->outb.list);
> + rte_spinlock_init(&dev->inb.lock);
> + rte_spinlock_init(&dev->outb.lock);
> +
> /* For vfs, returned max_entries will be 0. but to keep default mac
> * address, one entry must be allocated. so setting up to 1.
> */
> diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
> index 5bfda3d..db1fb4b 100644
> --- a/drivers/net/cnxk/cnxk_ethdev.h
> +++ b/drivers/net/cnxk/cnxk_ethdev.h
> @@ -271,6 +271,9 @@ struct cnxk_eth_dev_sec_inb {
>
> /* DPTR for WRITE_SA microcode op */
> void *sa_dptr;
> +
> + /* Lock to synchronize sa setup/release */
> + rte_spinlock_t lock;
> };
>
> /* Outbound security data */
> @@ -304,6 +307,9 @@ struct cnxk_eth_dev_sec_outb {
>
> /* DPTR for WRITE_SA microcode op */
> void *sa_dptr;
> +
> + /* Lock to synchronize sa setup/release */
> + rte_spinlock_t lock;
> };
>
> struct cnxk_eth_dev {
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (6 preceding siblings ...)
2021-12-09 9:13 ` [PATCH 8/8] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
@ 2022-01-19 16:15 ` Jerin Jacob
2022-01-21 10:08 ` Ferruh Yigit
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
8 siblings, 1 reply; 32+ messages in thread
From: Jerin Jacob @ 2022-01-19 16:15 UTC (permalink / raw)
To: Nithin Dabilpuram, Ferruh Yigit
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dpdk-dev
On Thu, Dec 9, 2021 at 2:43 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE
> register to be 24 instead of zero similar to other level SHAPE
> registers. Also mask unused bits in adjust value.
>
> Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
> Signed-off-by: Satha Rao <skoteshwar@marvell.com>
1) FIxed following warning
Is it candidate for Cc: stable@dpdk.org backport?
common/cnxk: fix shift offset for tl3 length disable
2) Change tl3 to TL3.
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_nix_tm_utils.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
> index 543adf9..9e80c2a 100644
> --- a/drivers/common/cnxk/roc_nix_tm_utils.c
> +++ b/drivers/common/cnxk/roc_nix_tm_utils.c
> @@ -642,6 +642,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
> else if (profile)
> adjust = profile->pkt_len_adj;
>
> + adjust &= 0x1FF;
> plt_tm_dbg("Shaper config node %s(%u) lvl %u id %u, "
> "pir %" PRIu64 "(%" PRIu64 "B),"
> " cir %" PRIu64 "(%" PRIu64 "B)"
> @@ -708,7 +709,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
> /* Configure RED algo */
> reg[k] = NIX_AF_TL3X_SHAPE(schq);
> regval[k] = (adjust | (uint64_t)node->red_algo << 9 |
> - (uint64_t)node->pkt_mode);
> + (uint64_t)node->pkt_mode << 24);
> k++;
>
> break;
> --
> 2.8.4
>
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable
2022-01-19 16:15 ` [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Jerin Jacob
@ 2022-01-21 10:08 ` Ferruh Yigit
2022-01-21 10:24 ` Nithin Kumar Dabilpuram
0 siblings, 1 reply; 32+ messages in thread
From: Ferruh Yigit @ 2022-01-21 10:08 UTC (permalink / raw)
To: Jerin Jacob, Nithin Dabilpuram
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dpdk-dev
On 1/19/2022 4:15 PM, Jerin Jacob wrote:
> On Thu, Dec 9, 2021 at 2:43 PM Nithin Dabilpuram
> <ndabilpuram@marvell.com> wrote:
>>
>> Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE
>> register to be 24 instead of zero similar to other level SHAPE
>> registers. Also mask unused bits in adjust value.
>>
>> Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
>>
>> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
>> Signed-off-by: Satha Rao <skoteshwar@marvell.com>
>
>
> 1) FIxed following warning
> Is it candidate for Cc: stable@dpdk.org backport?
> common/cnxk: fix shift offset for tl3 length disable
>
> 2) Change tl3 to TL3.
>
> Applied to dpdk-next-net-mrvl/for-next-net. Thanks
>
>
I commented on a few changes mainly related to the patch splitting,
can it be possible to have a new version of the set?
Thanks,
ferruh
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable
2022-01-21 10:08 ` Ferruh Yigit
@ 2022-01-21 10:24 ` Nithin Kumar Dabilpuram
0 siblings, 0 replies; 32+ messages in thread
From: Nithin Kumar Dabilpuram @ 2022-01-21 10:24 UTC (permalink / raw)
To: Ferruh Yigit, Jerin Jacob
Cc: Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dpdk-dev
On 1/21/22 3:38 PM, Ferruh Yigit wrote:
> On 1/19/2022 4:15 PM, Jerin Jacob wrote:
>> On Thu, Dec 9, 2021 at 2:43 PM Nithin Dabilpuram
>> <ndabilpuram@marvell.com> wrote:
>>>
>>> Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE
>>> register to be 24 instead of zero similar to other level SHAPE
>>> registers. Also mask unused bits in adjust value.
>>>
>>> Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
>>>
>>> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
>>> Signed-off-by: Satha Rao <skoteshwar@marvell.com>
>>
>>
>> 1) FIxed following warning
>> Is it candidate for Cc: stable@dpdk.org backport?
>> common/cnxk: fix shift offset for tl3 length disable
>>
>> 2) Change tl3 to TL3.
>>
>> Applied to dpdk-next-net-mrvl/for-next-net. Thanks
>>
>>
>
> I commented on a few changes mainly related to the patch splitting,
> can it be possible to have a new version of the set?
Ack, will send next version with comments addressed.
Thanks
Nithin
>
> Thanks,
> ferruh
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 length disable
2021-12-09 9:13 [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Nithin Dabilpuram
` (7 preceding siblings ...)
2022-01-19 16:15 ` [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable Jerin Jacob
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 02/10] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
` (8 more replies)
8 siblings, 9 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, stable
Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE
register to be 24 instead of zero similar to other level SHAPE
registers. Also mask unused bits in adjust value.
Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
v2:
- Updated series from Jerin
- Handle comments from Ferruh in patch 3/8.
- Split patch 6/8 to two patches
- Split patch 7/8 to two patches
drivers/common/cnxk/roc_nix_tm_utils.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index 543adf9..9e80c2a 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -642,6 +642,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
else if (profile)
adjust = profile->pkt_len_adj;
+ adjust &= 0x1FF;
plt_tm_dbg("Shaper config node %s(%u) lvl %u id %u, "
"pir %" PRIu64 "(%" PRIu64 "B),"
" cir %" PRIu64 "(%" PRIu64 "B)"
@@ -708,7 +709,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,
/* Configure RED algo */
reg[k] = NIX_AF_TL3X_SHAPE(schq);
regval[k] = (adjust | (uint64_t)node->red_algo << 9 |
- (uint64_t)node->pkt_mode);
+ (uint64_t)node->pkt_mode << 24);
k++;
break;
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 02/10] common/cnxk: use for loop in shaper profiles cleanup
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 03/10] common/cnxk: fix byte order of frag sizes and infos Nithin Dabilpuram
` (7 subsequent siblings)
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, Gowrishankar Muthukrishnan, Shijith Thotton
From: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
In shaper profiles cleanup, Klockwork static analyzer tool reports
infinite loop although existing loop condition is alright.
False positive may be due to tqh_first not checked in loop,
hence switching to FOREACH_SAFE to make Klockwork happy.
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_nix_tm.c | 8 ++++----
drivers/common/cnxk/roc_platform.h | 2 ++
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index b3d8ebd..fe9e83f 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -17,16 +17,16 @@ bitmap_ctzll(uint64_t slab)
void
nix_tm_clear_shaper_profiles(struct nix *nix)
{
- struct nix_tm_shaper_profile *shaper_profile;
+ struct nix_tm_shaper_profile *shaper_profile, *tmp;
+ struct nix_tm_shaper_profile_list *list;
- shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
- while (shaper_profile != NULL) {
+ list = &nix->shaper_profile_list;
+ PLT_TAILQ_FOREACH_SAFE(shaper_profile, list, shaper, tmp) {
if (shaper_profile->ref_cnt)
plt_warn("Shaper profile %u has non zero references",
shaper_profile->id);
TAILQ_REMOVE(&nix->shaper_profile_list, shaper_profile, shaper);
nix_tm_shaper_profile_free(shaper_profile);
- shaper_profile = TAILQ_FIRST(&nix->shaper_profile_list);
}
}
diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index 85aa6dc..adcd2fa 100644
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -19,6 +19,7 @@
#include <rte_pci.h>
#include <rte_spinlock.h>
#include <rte_string_fns.h>
+#include <rte_tailq.h>
#include <rte_telemetry.h>
#include "roc_bits.h"
@@ -53,6 +54,7 @@
#define BITMASK_ULL GENMASK_ULL
#define PLT_ALIGN_CEIL RTE_ALIGN_CEIL
#define PLT_INIT RTE_INIT
+#define PLT_TAILQ_FOREACH_SAFE RTE_TAILQ_FOREACH_SAFE
/** Divide ceil */
#define PLT_DIV_CEIL(x, y) \
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 03/10] common/cnxk: fix byte order of frag sizes and infos
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 02/10] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 04/10] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
` (6 subsequent siblings)
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, stable, Vidya Sagar Velumuri
Change the byte order of frag sizes and infos to match HW
implementation.
Fixes: 64a73ebd87bd ("common/cnxk: add CPT hardware definitions")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
---
drivers/common/cnxk/hw/cpt.h | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 919f842..3ade4dc 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -286,10 +286,11 @@ struct cpt_frag_info_s {
union {
uint64_t u64;
struct {
- union cpt_frag_info f3;
- union cpt_frag_info f2;
- union cpt_frag_info f1;
+ /* CPT HW swaps each 8B word implicitly */
union cpt_frag_info f0;
+ union cpt_frag_info f1;
+ union cpt_frag_info f2;
+ union cpt_frag_info f3;
};
} w0;
@@ -297,10 +298,11 @@ struct cpt_frag_info_s {
union {
uint64_t u64;
struct {
- uint16_t frag_size3;
- uint16_t frag_size2;
- uint16_t frag_size1;
+ /* CPT HW swaps each 8B word implicitly */
uint16_t frag_size0;
+ uint16_t frag_size1;
+ uint16_t frag_size2;
+ uint16_t frag_size3;
};
} w1;
};
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 04/10] common/cnxk: reset stale values on error debug registers
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 02/10] common/cnxk: use for loop in shaper profiles cleanup Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 03/10] common/cnxk: fix byte order of frag sizes and infos Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX Nithin Dabilpuram
` (5 subsequent siblings)
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, Harman Kalra
From: Harman Kalra <hkalra@marvell.com>
LF's error debug registers like NIX_LF_SQ_OP_ERR_DBG,
NIX_LF_MNQ_ERR_DBG, NIX_LF_SEND_ERR_DBG captures debug
info for an error detected during LMT operation or meta
enqueue or after meta enqueue granted respectively. HW
sets a valid bit when info is captured and SW is expected
to clear this valid bit by writing 1, else these registers
will show stale values of first interrupt when occurred and
will never update with subsequent interrupts.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_nix_irq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c
index a5cd9d4..7dcd533 100644
--- a/drivers/common/cnxk/roc_nix_irq.c
+++ b/drivers/common/cnxk/roc_nix_irq.c
@@ -202,9 +202,12 @@ nix_lf_sq_debug_reg(struct nix *nix, uint32_t off)
uint64_t reg;
reg = plt_read64(nix->base + off);
- if (reg & BIT_ULL(44))
+ if (reg & BIT_ULL(44)) {
plt_err("SQ=%d err_code=0x%x", (int)((reg >> 8) & 0xfffff),
(uint8_t)(reg & 0xff));
+ /* Clear valid bit */
+ plt_write64(BIT_ULL(44), nix->base + off);
+ }
}
static void
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (2 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 04/10] common/cnxk: reset stale values on error debug registers Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 17:16 ` Kevin Traynor
2022-01-21 12:04 ` [PATCH v2 06/10] common/cnxk: fix null pointer dereferences Nithin Dabilpuram
` (4 subsequent siblings)
8 siblings, 1 reply; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, Harman Kalra
From: Harman Kalra <hkalra@marvell.com>
An errata exists whereby, in certain cases NIX may use an
incorrect QINT_IDX for SQ interrupts. As a result, the
interrupt may not be delivered to software, or may not be
associated with the correct SQ.
When NIX uses an incorrect QINT_IDX :
1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
incorrect QINT.
2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
QINT.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_nix_queue.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index c638cd4..80e1c9f 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -690,7 +690,11 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
/* Many to one reduction */
- aq->sq.qint_idx = sq->qid % nix->qints;
+ /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+ * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+ * might result in software missing the interrupt.
+ */
+ aq->sq.qint_idx = 0;
}
static int
@@ -789,8 +793,11 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
aq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);
aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
- /* Many to one reduction */
- aq->sq.qint_idx = sq->qid % nix->qints;
+ /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+ * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+ * might result in software missing the interrupt.
+ */
+ aq->sq.qint_idx = 0;
}
static int
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* Re: [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX
2022-01-21 12:04 ` [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX Nithin Dabilpuram
@ 2022-01-21 17:16 ` Kevin Traynor
2022-01-23 7:45 ` Jerin Jacob
0 siblings, 1 reply; 32+ messages in thread
From: Kevin Traynor @ 2022-01-21 17:16 UTC (permalink / raw)
To: Nithin Dabilpuram, jerinj, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, Harman Kalra
On 21/01/2022 12:04, Nithin Dabilpuram wrote:
> From: Harman Kalra<hkalra@marvell.com>
>
> An errata exists whereby, in certain cases NIX may use an
> incorrect QINT_IDX for SQ interrupts. As a result, the
> interrupt may not be delivered to software, or may not be
> associated with the correct SQ.
> When NIX uses an incorrect QINT_IDX :
> 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
> incorrect QINT.
> 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
> QINT.
>
> Signed-off-by: Harman Kalra<hkalra@marvell.com>
> Acked-by: Jerin Jacob<jerinj@marvell.com>
> ---
Patches 4/10 and 5/10 look like fixes, that should have Fixes: tags.
Also, please mark them for stable if you would like them backported to LTS.
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX
2022-01-21 17:16 ` Kevin Traynor
@ 2022-01-23 7:45 ` Jerin Jacob
0 siblings, 0 replies; 32+ messages in thread
From: Jerin Jacob @ 2022-01-23 7:45 UTC (permalink / raw)
To: Kevin Traynor
Cc: Nithin Dabilpuram, Jerin Jacob, Kiran Kumar K, Sunil Kumar Kori,
Satha Rao, dpdk-dev, Ferruh Yigit, Harman Kalra
On Fri, Jan 21, 2022 at 10:46 PM Kevin Traynor <ktraynor@redhat.com> wrote:
>
> On 21/01/2022 12:04, Nithin Dabilpuram wrote:
> > From: Harman Kalra<hkalra@marvell.com>
> >
> > An errata exists whereby, in certain cases NIX may use an
> > incorrect QINT_IDX for SQ interrupts. As a result, the
> > interrupt may not be delivered to software, or may not be
> > associated with the correct SQ.
> > When NIX uses an incorrect QINT_IDX :
> > 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
> > incorrect QINT.
> > 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
> > QINT.
> >
> > Signed-off-by: Harman Kalra<hkalra@marvell.com>
> > Acked-by: Jerin Jacob<jerinj@marvell.com>
> > ---
>
> Patches 4/10 and 5/10 look like fixes, that should have Fixes: tags.
> Also, please mark them for stable if you would like them backported to LTS.
Added Fixes tag and CCed stable@dpdk.org and
Series applied to dpdk-next-net-mrvl/for-next-net. Thanks.
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH v2 06/10] common/cnxk: fix null pointer dereferences
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (3 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 05/10] common/cnxk: always use single interrupt ID with NIX Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 07/10] common/cnxk: fix uninitialized variable issues Nithin Dabilpuram
` (3 subsequent siblings)
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, stable, Gowrishankar Muthukrishnan
Fix null pointer dereference issues reported by
klockwork(static analysis tool).
Fixes: c045d2e5cbbc ("common/cnxk: add CPT configuration")
Fixes: 585bb3e538f9 ("common/cnxk: add VF support to base device class")
Fixes: 665ff1ccc2c4 ("common/cnxk: add base device class")
Fixes: da57d4589a6f ("common/cnxk: support NIX flow control")
Fixes: 218d022e1f3f ("common/cnxk: support NIX stats")
Fixes: 4efa6e82fe43 ("common/cnxk: support NIX extended stats")
Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 3 ++
drivers/common/cnxk/roc_dev.c | 19 ++++++++++++
drivers/common/cnxk/roc_nix_debug.c | 6 ++++
drivers/common/cnxk/roc_nix_fc.c | 12 ++++++++
drivers/common/cnxk/roc_nix_queue.c | 61 ++++++++++++++++++++++++++++++++++---
drivers/common/cnxk/roc_nix_stats.c | 18 +++++++++++
drivers/common/cnxk/roc_nix_tm.c | 6 ++++
7 files changed, 121 insertions(+), 4 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 8f8e6d3..84cc5f0 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -385,6 +385,9 @@ cpt_lfs_alloc(struct dev *dev, uint8_t eng_grpmsk, uint8_t blkaddr,
return -EINVAL;
req = mbox_alloc_msg_cpt_lf_alloc(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->nix_pf_func = 0;
if (inl_dev_sso && nix_inl_dev_pffunc_get())
req->sso_pf_func = nix_inl_dev_pffunc_get();
diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
index 926a916..0ac50ca 100644
--- a/drivers/common/cnxk/roc_dev.c
+++ b/drivers/common/cnxk/roc_dev.c
@@ -152,6 +152,11 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg)
/* Reserve PF/VF mbox message */
size = PLT_ALIGN(size, MBOX_MSG_ALIGN);
rsp = mbox_alloc_msg(&dev->mbox_vfpf, vf, size);
+ if (!rsp) {
+ plt_err("Failed to reserve VF%d message", vf);
+ continue;
+ }
+
mbox_rsp_init(msg->id, rsp);
/* Copy message from AF<->PF mbox to PF<->VF mbox */
@@ -236,6 +241,12 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf)
BIT_ULL(vf % max_bits);
rsp = (struct ready_msg_rsp *)mbox_alloc_msg(
mbox, vf, sizeof(*rsp));
+ if (!rsp) {
+ plt_err("Failed to alloc VF%d READY message",
+ vf);
+ continue;
+ }
+
mbox_rsp_init(msg->id, rsp);
/* PF/VF function ID */
@@ -988,6 +999,9 @@ dev_setup_shared_lmt_region(struct mbox *mbox, bool valid_iova, uint64_t iova)
struct lmtst_tbl_setup_req *req;
req = mbox_alloc_msg_lmtst_tbl_setup(mbox);
+ if (!req)
+ return -ENOSPC;
+
/* This pcifunc is defined with primary pcifunc whose LMT address
* will be shared. If call contains valid IOVA, following pcifunc
* field is of no use.
@@ -1061,6 +1075,11 @@ dev_lmt_setup(struct dev *dev)
*/
if (!dev->disable_shared_lmt) {
idev = idev_get_cfg();
+ if (!idev) {
+ errno = EFAULT;
+ goto free;
+ }
+
if (!__atomic_load_n(&idev->lmt_pf_func, __ATOMIC_ACQUIRE)) {
idev->lmt_base_addr = dev->lmt_base;
idev->lmt_pf_func = dev->pf_func;
diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c
index 266935a..7dc54f3 100644
--- a/drivers/common/cnxk/roc_nix_debug.c
+++ b/drivers/common/cnxk/roc_nix_debug.c
@@ -323,6 +323,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
int rc;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
@@ -341,6 +344,9 @@ nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c
index ca29cd2..d311371 100644
--- a/drivers/common/cnxk/roc_nix_fc.c
+++ b/drivers/common/cnxk/roc_nix_fc.c
@@ -113,6 +113,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -120,6 +123,9 @@ nix_fc_cq_config_get(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -147,6 +153,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -164,6 +173,9 @@ nix_fc_cq_config_set(struct roc_nix *roc_nix, struct roc_nix_fc_cfg *fc_cfg)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = fc_cfg->cq_cfg.rq;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index 80e1c9f..e2426d9 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -38,6 +38,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -48,6 +51,9 @@ nix_rq_ena_dis(struct dev *dev, struct roc_nix_rq *rq, bool enable)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -80,6 +86,9 @@ nix_rq_cn9k_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
@@ -195,6 +204,9 @@ nix_rq_cfg(struct dev *dev, struct roc_nix_rq *rq, uint16_t qints, bool cfg,
struct mbox *mbox = dev->mbox;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = rq->qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = cfg ? NIX_AQ_INSTOP_WRITE : NIX_AQ_INSTOP_INIT;
@@ -463,6 +475,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -471,6 +486,9 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -547,6 +565,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -558,6 +579,9 @@ roc_nix_cq_fini(struct roc_nix_cq *cq)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = cq->qid;
aq->ctype = NIX_AQ_CTYPE_CQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -659,7 +683,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
return rc;
}
-static void
+static int
sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
uint16_t smq)
{
@@ -667,6 +691,9 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -695,6 +722,7 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
* might result in software missing the interrupt.
*/
aq->sq.qint_idx = 0;
+ return 0;
}
static int
@@ -708,6 +736,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
int rc, count;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -721,6 +752,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Disable sq */
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -732,6 +766,9 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Read SQ and free sqb's */
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -763,7 +800,7 @@ sq_cn9k_fini(struct nix *nix, struct roc_nix_sq *sq)
return 0;
}
-static void
+static int
sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
uint16_t smq)
{
@@ -771,6 +808,9 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_INIT;
@@ -798,6 +838,7 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
* might result in software missing the interrupt.
*/
aq->sq.qint_idx = 0;
+ return 0;
}
static int
@@ -811,6 +852,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
int rc, count;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -824,6 +868,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Disable sq */
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -835,6 +882,9 @@ sq_fini(struct nix *nix, struct roc_nix_sq *sq)
/* Read SQ and free sqb's */
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = sq->qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_READ;
@@ -905,9 +955,12 @@ roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
/* Init SQ context */
if (roc_model_is_cn9k())
- sq_cn9k_init(nix, sq, rr_quantum, smq);
+ rc = sq_cn9k_init(nix, sq, rr_quantum, smq);
else
- sq_init(nix, sq, rr_quantum, smq);
+ rc = sq_init(nix, sq, rr_quantum, smq);
+
+ if (rc)
+ goto nomem;
rc = mbox_process(mbox);
if (rc)
diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c
index c50c8fa..756111f 100644
--- a/drivers/common/cnxk/roc_nix_stats.c
+++ b/drivers/common/cnxk/roc_nix_stats.c
@@ -124,6 +124,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -143,6 +146,9 @@ nix_stat_rx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_RQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -174,6 +180,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -190,6 +199,9 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid)
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -295,6 +307,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
if (roc_model_is_cn9k()) {
req = mbox_alloc_msg_cgx_stats(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
rc = mbox_process_msg(mbox, (void *)&cgx_resp);
@@ -316,6 +331,9 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats,
}
} else {
req = mbox_alloc_msg_rpm_stats(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->hdr.pcifunc = roc_nix_get_pf_func(roc_nix);
rc = mbox_process_msg(mbox, (void *)&rpm_resp);
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index fe9e83f..3b38cc0 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -766,6 +766,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
struct nix_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
@@ -781,6 +784,9 @@ nix_tm_sq_sched_conf(struct nix *nix, struct nix_tm_node *node,
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = NIX_AQ_CTYPE_SQ;
aq->op = NIX_AQ_INSTOP_WRITE;
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 07/10] common/cnxk: fix uninitialized variable issues
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (4 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 06/10] common/cnxk: fix null pointer dereferences Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 08/10] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
` (2 subsequent siblings)
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit, stable, Gowrishankar Muthukrishnan
Fix uninitialized variable issues reported by
klockwork(static analysis tool).
Fixes: ed135040f0ab ("common/cnxk: add CPT LF configuration")
Fixes: 585bb3e538f9 ("common/cnxk: add VF support to base device class")
Fixes: 58debb813a8d ("common/cnxk: enable TM to listen on Rx pause frames")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 4 ++--
drivers/common/cnxk/roc_dev.c | 2 +-
drivers/common/cnxk/roc_nix_tm.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 84cc5f0..0e2dc45 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -815,9 +815,9 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
void
roc_cpt_iq_disable(struct roc_cpt_lf *lf)
{
+ volatile union cpt_lf_q_grp_ptr grp_ptr = {.u = 0x0};
+ volatile union cpt_lf_inprog lf_inprog = {.u = 0x0};
union cpt_lf_ctl lf_ctl = {.u = 0x0};
- union cpt_lf_q_grp_ptr grp_ptr;
- union cpt_lf_inprog lf_inprog;
int timeout = 20;
int cnt;
diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
index 0ac50ca..9a86969 100644
--- a/drivers/common/cnxk/roc_dev.c
+++ b/drivers/common/cnxk/roc_dev.c
@@ -57,7 +57,7 @@ pf_af_sync_msg(struct dev *dev, struct mbox_msghdr **rsp)
struct mbox *mbox = dev->mbox;
struct mbox_dev *mdev = &mbox->dev[0];
- volatile uint64_t int_status;
+ volatile uint64_t int_status = 0;
struct mbox_msghdr *msghdr;
uint64_t off;
int rc = 0;
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 3b38cc0..a0448be 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -424,7 +424,7 @@ nix_tm_bp_config_get(struct roc_nix *roc_nix, bool *is_enabled)
if (req) {
req->num_regs = k;
- rc = mbox_process(mbox);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
if (rc)
goto err;
/* Report it as enabled only if enabled or all */
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 08/10] net/cnxk: improve inbound inline error handling for cn9k
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (5 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 07/10] common/cnxk: fix uninitialized variable issues Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 09/10] common/cnxk: set UDP ports for IPsec UDP encapsulation Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 10/10] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit
Improve inbound inline error handling for CN9K in terms of
packet delivered to application for different kinds of errors.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/roc_ie_on.h | 16 ++++++++++++-
drivers/net/cnxk/cn9k_rx.h | 50 +++++++++++++++++++++++++++++++++++++++--
2 files changed, 63 insertions(+), 3 deletions(-)
diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index 53591c6..376e698 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -188,7 +188,21 @@ struct roc_ie_on_inb_sa {
#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL
/* Ucode completion codes */
-#define ROC_IE_ONF_UCC_SUCCESS 0
+#define ROC_IE_ON_UCC_SUCCESS 0
+#define ROC_IE_ON_UCC_ENC_TYPE_ERR 0xB1
+#define ROC_IE_ON_UCC_IP_VER_ERR 0xB2
+#define ROC_IE_ON_UCC_PROTO_ERR 0xB3
+#define ROC_IE_ON_UCC_CTX_INVALID 0xB4
+#define ROC_IE_ON_UCC_CTX_DIR_MISMATCH 0xB5
+#define ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR 0xB6
+#define ROC_IE_ON_UCC_CTX_FLAG_MISMATCH 0xB7
+#define ROC_IE_ON_UCC_SPI_MISMATCH 0xBE
+#define ROC_IE_ON_UCC_IP_CHKSUM_ERR 0xBF
+#define ROC_IE_ON_UCC_AUTH_ERR 0xC3
+#define ROC_IE_ON_UCC_PADDING_INVALID 0xC4
+#define ROC_IE_ON_UCC_SA_MISMATCH 0xCC
+#define ROC_IE_ON_UCC_L2_HDR_INFO_ERR 0xCF
+#define ROC_IE_ON_UCC_L2_HDR_LEN_ERR 0xE0
struct roc_ie_onf_sa_ctl {
uint32_t spi;
diff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h
index 225bb41..cbb6299 100644
--- a/drivers/net/cnxk/cn9k_rx.h
+++ b/drivers/net/cnxk/cn9k_rx.h
@@ -211,6 +211,52 @@ ipsec_antireplay_check(struct roc_onf_ipsec_inb_sa *sa,
return rc;
}
+static inline uint64_t
+nix_rx_sec_mbuf_err_update(const union nix_rx_parse_u *rx, uint16_t res,
+ uint64_t *rearm_val, uint16_t *len)
+{
+ uint8_t uc_cc = res >> 8;
+ uint8_t cc = res & 0xFF;
+ uint64_t data_off;
+ uint64_t ol_flags;
+ uint16_t m_len;
+
+ if (unlikely(cc != CPT_COMP_GOOD))
+ return RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+
+ data_off = *rearm_val & (BIT_ULL(16) - 1);
+ m_len = rx->cn9k.pkt_lenm1 + 1;
+
+ switch (uc_cc) {
+ case ROC_IE_ON_UCC_IP_PAYLOAD_TYPE_ERR:
+ case ROC_IE_ON_UCC_AUTH_ERR:
+ case ROC_IE_ON_UCC_PADDING_INVALID:
+ /* Adjust data offset to start at copied L2 */
+ data_off += ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +
+ ROC_ONF_IPSEC_INB_MAX_L2_SZ;
+ ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ break;
+ case ROC_IE_ON_UCC_CTX_INVALID:
+ case ROC_IE_ON_UCC_SPI_MISMATCH:
+ case ROC_IE_ON_UCC_SA_MISMATCH:
+ /* Return as normal packet */
+ ol_flags = 0;
+ break;
+ default:
+ /* Return as error packet after updating packet lengths */
+ ol_flags = RTE_MBUF_F_RX_SEC_OFFLOAD |
+ RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ break;
+ }
+
+ *len = m_len;
+ *rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);
+ *rearm_val |= data_off;
+ return ol_flags;
+}
+
static __rte_always_inline uint64_t
nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)
@@ -236,8 +282,8 @@ nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,
rte_prefetch0((void *)data);
- if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8)))
- return RTE_MBUF_F_RX_SEC_OFFLOAD | RTE_MBUF_F_RX_SEC_OFFLOAD_FAILED;
+ if (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ON_UCC_SUCCESS << 8)))
+ return nix_rx_sec_mbuf_err_update(rx, res, rearm_val, len);
data += lcptr;
/* 20 bits of tag would have the SPI */
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 09/10] common/cnxk: set UDP ports for IPsec UDP encapsulation
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (6 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 08/10] net/cnxk: improve inbound inline error handling for cn9k Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
2022-01-21 12:04 ` [PATCH v2 10/10] net/cnxk: synchronize inline session create and destroy Nithin Dabilpuram
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit
Set UDP ports for IPsec UDP encapsulation feature in
outbound inline.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/cnxk_security.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c
index 30562b4..8b4dd1c 100644
--- a/drivers/common/cnxk/cnxk_security.c
+++ b/drivers/common/cnxk/cnxk_security.c
@@ -710,6 +710,12 @@ cnxk_onf_ipsec_outb_sa_fill(struct roc_onf_ipsec_outb_sa *sa,
return -EINVAL;
}
+ /* Update udp encap ports */
+ if (ipsec_xfrm->options.udp_encap == 1) {
+ sa->udp_src = 4500;
+ sa->udp_dst = 4500;
+ }
+
skip_tunnel_info:
rte_wmb();
--
2.8.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH v2 10/10] net/cnxk: synchronize inline session create and destroy
2022-01-21 12:04 ` [PATCH v2 01/10] common/cnxk: fix shift offset for TL3 " Nithin Dabilpuram
` (7 preceding siblings ...)
2022-01-21 12:04 ` [PATCH v2 09/10] common/cnxk: set UDP ports for IPsec UDP encapsulation Nithin Dabilpuram
@ 2022-01-21 12:04 ` Nithin Dabilpuram
8 siblings, 0 replies; 32+ messages in thread
From: Nithin Dabilpuram @ 2022-01-21 12:04 UTC (permalink / raw)
To: jerinj, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
Cc: dev, ferruh.yigit
Synchronize inline session create and destroy using spinlock.
Also move security related error prints outside the spinlock.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/net/cnxk/cn10k_ethdev_sec.c | 35 ++++++++++++++++++++++++++++-------
drivers/net/cnxk/cn9k_ethdev_sec.c | 32 ++++++++++++++++++++++++++------
drivers/net/cnxk/cnxk_ethdev.c | 7 +++++--
drivers/net/cnxk/cnxk_ethdev.h | 6 ++++++
4 files changed, 65 insertions(+), 15 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c
index 235c168..12cec0a 100644
--- a/drivers/net/cnxk/cn10k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c
@@ -238,6 +238,8 @@ cn10k_eth_sec_session_create(void *device,
struct rte_crypto_sym_xform *crypto;
struct cnxk_eth_sec_sess *eth_sec;
bool inbound, inl_dev;
+ rte_spinlock_t *lock;
+ char tbuf[128] = {0};
int rc = 0;
if (conf->action_type != RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL)
@@ -272,6 +274,9 @@ cn10k_eth_sec_session_create(void *device,
memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
sess_priv.u64 = 0;
+ lock = inbound ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
/* Acquire lock on inline dev for inbound */
if (inbound && inl_dev)
roc_nix_inl_dev_lock();
@@ -287,12 +292,14 @@ cn10k_eth_sec_session_create(void *device,
/* Get Inbound SA from NIX_RX_IPSEC_SA_BASE */
sa = roc_nix_inl_inb_sa_get(&dev->nix, inl_dev, ipsec->spi);
if (!sa && dev->inb.inl_dev) {
- plt_err("Failed to create ingress sa, inline dev "
- "not found or spi not in range");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa, inline dev "
+ "not found or spi not in range");
rc = -ENOTSUP;
goto mempool_put;
} else if (!sa) {
- plt_err("Failed to create ingress sa");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa");
rc = -EFAULT;
goto mempool_put;
}
@@ -301,8 +308,9 @@ cn10k_eth_sec_session_create(void *device,
/* Check if SA is already in use */
if (inb_sa->w2.s.valid) {
- plt_err("Inbound SA with SPI %u already in use",
- ipsec->spi);
+ snprintf(tbuf, sizeof(tbuf),
+ "Inbound SA with SPI %u already in use",
+ ipsec->spi);
rc = -EBUSY;
goto mempool_put;
}
@@ -313,7 +321,8 @@ cn10k_eth_sec_session_create(void *device,
/* Fill inbound sa params */
rc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto);
if (rc) {
- plt_err("Failed to init inbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init inbound sa, rc=%d", rc);
goto mempool_put;
}
@@ -371,7 +380,8 @@ cn10k_eth_sec_session_create(void *device,
/* Fill outbound sa params */
rc = cnxk_ot_ipsec_outb_sa_fill(outb_sa_dptr, ipsec, crypto);
if (rc) {
- plt_err("Failed to init outbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init outbound sa, rc=%d", rc);
rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
goto mempool_put;
}
@@ -409,6 +419,7 @@ cn10k_eth_sec_session_create(void *device,
}
if (inbound && inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u inl_dev=%u",
inbound ? "inbound" : "outbound", eth_sec->spi,
@@ -422,7 +433,11 @@ cn10k_eth_sec_session_create(void *device,
mempool_put:
if (inbound && inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
+
rte_mempool_put(mempool, eth_sec);
+ if (rc)
+ plt_err("%s", tbuf);
return rc;
}
@@ -433,12 +448,16 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
struct cnxk_eth_sec_sess *eth_sec;
struct rte_mempool *mp;
+ rte_spinlock_t *lock;
void *sa_dptr;
eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
if (!eth_sec)
return -ENOENT;
+ lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
if (eth_sec->inl_dev)
roc_nix_inl_dev_lock();
@@ -468,6 +487,8 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
if (eth_sec->inl_dev)
roc_nix_inl_dev_unlock();
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u, inl_dev=%u",
eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx, eth_sec->inl_dev);
diff --git a/drivers/net/cnxk/cn9k_ethdev_sec.c b/drivers/net/cnxk/cn9k_ethdev_sec.c
index b070ad5..27930d1 100644
--- a/drivers/net/cnxk/cn9k_ethdev_sec.c
+++ b/drivers/net/cnxk/cn9k_ethdev_sec.c
@@ -146,6 +146,8 @@ cn9k_eth_sec_session_create(void *device,
struct cn9k_sec_sess_priv sess_priv;
struct rte_crypto_sym_xform *crypto;
struct cnxk_eth_sec_sess *eth_sec;
+ rte_spinlock_t *lock;
+ char tbuf[128] = {0};
bool inbound;
int rc = 0;
@@ -174,6 +176,9 @@ cn9k_eth_sec_session_create(void *device,
return -ENOMEM;
}
+ lock = inbound ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
memset(eth_sec, 0, sizeof(struct cnxk_eth_sec_sess));
sess_priv.u64 = 0;
@@ -188,17 +193,19 @@ cn9k_eth_sec_session_create(void *device,
* device always for CN9K.
*/
inb_sa = (struct roc_onf_ipsec_inb_sa *)
- roc_nix_inl_inb_sa_get(&dev->nix, false, ipsec->spi);
+ roc_nix_inl_inb_sa_get(&dev->nix, false, ipsec->spi);
if (!inb_sa) {
- plt_err("Failed to create ingress sa");
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to create ingress sa");
rc = -EFAULT;
goto mempool_put;
}
/* Check if SA is already in use */
if (inb_sa->ctl.valid) {
- plt_err("Inbound SA with SPI %u already in use",
- ipsec->spi);
+ snprintf(tbuf, sizeof(tbuf),
+ "Inbound SA with SPI %u already in use",
+ ipsec->spi);
rc = -EBUSY;
goto mempool_put;
}
@@ -208,7 +215,8 @@ cn9k_eth_sec_session_create(void *device,
/* Fill inbound sa params */
rc = cnxk_onf_ipsec_inb_sa_fill(inb_sa, ipsec, crypto);
if (rc) {
- plt_err("Failed to init inbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init inbound sa, rc=%d", rc);
goto mempool_put;
}
@@ -263,7 +271,8 @@ cn9k_eth_sec_session_create(void *device,
/* Fill outbound sa params */
rc = cnxk_onf_ipsec_outb_sa_fill(outb_sa, ipsec, crypto);
if (rc) {
- plt_err("Failed to init outbound sa, rc=%d", rc);
+ snprintf(tbuf, sizeof(tbuf),
+ "Failed to init outbound sa, rc=%d", rc);
rc |= cnxk_eth_outb_sa_idx_put(dev, sa_idx);
goto mempool_put;
}
@@ -300,6 +309,8 @@ cn9k_eth_sec_session_create(void *device,
/* Sync SA content */
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Created %s session with spi=%u, sa_idx=%u",
inbound ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx);
@@ -310,7 +321,10 @@ cn9k_eth_sec_session_create(void *device,
return 0;
mempool_put:
+ rte_spinlock_unlock(lock);
rte_mempool_put(mempool, eth_sec);
+ if (rc)
+ plt_err("%s", tbuf);
return rc;
}
@@ -323,11 +337,15 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
struct roc_onf_ipsec_inb_sa *inb_sa;
struct cnxk_eth_sec_sess *eth_sec;
struct rte_mempool *mp;
+ rte_spinlock_t *lock;
eth_sec = cnxk_eth_sec_sess_get_by_sess(dev, sess);
if (!eth_sec)
return -ENOENT;
+ lock = eth_sec->inb ? &dev->inb.lock : &dev->outb.lock;
+ rte_spinlock_lock(lock);
+
if (eth_sec->inb) {
inb_sa = eth_sec->sa;
/* Disable SA */
@@ -349,6 +367,8 @@ cn9k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)
/* Sync SA content */
plt_atomic_thread_fence(__ATOMIC_ACQ_REL);
+ rte_spinlock_unlock(lock);
+
plt_nix_dbg("Destroyed %s session with spi=%u, sa_idx=%u",
eth_sec->inb ? "inbound" : "outbound", eth_sec->spi,
eth_sec->sa_idx);
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 74f6255..c2e7f2f 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1605,8 +1605,6 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
sec_ctx->flags =
(RTE_SEC_CTX_F_FAST_SET_MDATA | RTE_SEC_CTX_F_FAST_GET_UDATA);
eth_dev->security_ctx = sec_ctx;
- TAILQ_INIT(&dev->inb.list);
- TAILQ_INIT(&dev->outb.list);
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
@@ -1642,6 +1640,11 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)
dev->configured = 0;
dev->ptype_disable = 0;
+ TAILQ_INIT(&dev->inb.list);
+ TAILQ_INIT(&dev->outb.list);
+ rte_spinlock_init(&dev->inb.lock);
+ rte_spinlock_init(&dev->outb.lock);
+
/* For vfs, returned max_entries will be 0. but to keep default mac
* address, one entry must be allocated. so setting up to 1.
*/
diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
index 5bfda3d..db1fb4b 100644
--- a/drivers/net/cnxk/cnxk_ethdev.h
+++ b/drivers/net/cnxk/cnxk_ethdev.h
@@ -271,6 +271,9 @@ struct cnxk_eth_dev_sec_inb {
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
/* Outbound security data */
@@ -304,6 +307,9 @@ struct cnxk_eth_dev_sec_outb {
/* DPTR for WRITE_SA microcode op */
void *sa_dptr;
+
+ /* Lock to synchronize sa setup/release */
+ rte_spinlock_t lock;
};
struct cnxk_eth_dev {
--
2.8.4
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