* [PATCH v2 0/2] Add BananaPi R2 Pro board @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This Series adds RK3568 based Bananapi R2 Board. changes in v2: - rebase on 5.17-rc1 - dropped patch for fixing dtbs_check (sent separately) - verified pins on gpio-header (con2) and changed pinctrl where needed - changed led part Frank Wunderlich (2): dt-bindings: rockchip: Add BananaPi R2 Pro Board arm64: dts: rockchip: Add Bananapi R2 Pro .../devicetree/bindings/arm/rockchip.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 3 files changed, 467 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -- 2.25.1 ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 0/2] Add BananaPi R2 Pro board @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This Series adds RK3568 based Bananapi R2 Board. changes in v2: - rebase on 5.17-rc1 - dropped patch for fixing dtbs_check (sent separately) - verified pins on gpio-header (con2) and changed pinctrl where needed - changed led part Frank Wunderlich (2): dt-bindings: rockchip: Add BananaPi R2 Pro Board arm64: dts: rockchip: Add Bananapi R2 Pro .../devicetree/bindings/arm/rockchip.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 3 files changed, 467 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 0/2] Add BananaPi R2 Pro board @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This Series adds RK3568 based Bananapi R2 Board. changes in v2: - rebase on 5.17-rc1 - dropped patch for fixing dtbs_check (sent separately) - verified pins on gpio-header (con2) and changed pinctrl where needed - changed led part Frank Wunderlich (2): dt-bindings: rockchip: Add BananaPi R2 Pro Board arm64: dts: rockchip: Add Bananapi R2 Pro .../devicetree/bindings/arm/rockchip.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 3 files changed, 467 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts -- 2.25.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-01-23 13:51 ` Frank Wunderlich -1 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 4aed16176434..33d6423fe6c3 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -651,6 +651,11 @@ properties: - const: rockchip,rk3568-evb1-v10 - const: rockchip,rk3568 + - description: Rockchip RK3568 Banana Pi R2 Pro + items: + - const: rockchip,rk3568-bpi-r2pro + - const: rockchip,rk3568 + additionalProperties: true ... -- 2.25.1 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 4aed16176434..33d6423fe6c3 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -651,6 +651,11 @@ properties: - const: rockchip,rk3568-evb1-v10 - const: rockchip,rk3568 + - description: Rockchip RK3568 Banana Pi R2 Pro + items: + - const: rockchip,rk3568-bpi-r2pro + - const: rockchip,rk3568 + additionalProperties: true ... -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 4aed16176434..33d6423fe6c3 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -651,6 +651,11 @@ properties: - const: rockchip,rk3568-evb1-v10 - const: rockchip,rk3568 + - description: Rockchip RK3568 Banana Pi R2 Pro + items: + - const: rockchip,rk3568-bpi-r2pro + - const: rockchip,rk3568 + additionalProperties: true ... -- 2.25.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Aw: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-02-05 18:59 ` Frank Wunderlich -1 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-02-05 18:59 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi just want to send a friendly ping ;) regards Frank > Gesendet: Sonntag, 23. Januar 2022 um 14:51 Uhr > Von: "Frank Wunderlich" <linux@fw-web.de> > An: linux-rockchip@lists.infradead.org > Cc: "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board > > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 4aed16176434..33d6423fe6c3 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -651,6 +651,11 @@ properties: > - const: rockchip,rk3568-evb1-v10 > - const: rockchip,rk3568 > > + - description: Rockchip RK3568 Banana Pi R2 Pro > + items: > + - const: rockchip,rk3568-bpi-r2pro > + - const: rockchip,rk3568 > + > additionalProperties: true > > ... > -- > 2.25.1 > > ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-02-05 18:59 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-02-05 18:59 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi just want to send a friendly ping ;) regards Frank > Gesendet: Sonntag, 23. Januar 2022 um 14:51 Uhr > Von: "Frank Wunderlich" <linux@fw-web.de> > An: linux-rockchip@lists.infradead.org > Cc: "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board > > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 4aed16176434..33d6423fe6c3 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -651,6 +651,11 @@ properties: > - const: rockchip,rk3568-evb1-v10 > - const: rockchip,rk3568 > > + - description: Rockchip RK3568 Banana Pi R2 Pro > + items: > + - const: rockchip,rk3568-bpi-r2pro > + - const: rockchip,rk3568 > + > additionalProperties: true > > ... > -- > 2.25.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-02-05 18:59 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-02-05 18:59 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi just want to send a friendly ping ;) regards Frank > Gesendet: Sonntag, 23. Januar 2022 um 14:51 Uhr > Von: "Frank Wunderlich" <linux@fw-web.de> > An: linux-rockchip@lists.infradead.org > Cc: "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board > > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 4aed16176434..33d6423fe6c3 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -651,6 +651,11 @@ properties: > - const: rockchip,rk3568-evb1-v10 > - const: rockchip,rk3568 > > + - description: Rockchip RK3568 Banana Pi R2 Pro > + items: > + - const: rockchip,rk3568-bpi-r2pro > + - const: rockchip,rk3568 > + > additionalProperties: true > > ... > -- > 2.25.1 > > _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-02-07 22:56 ` Rob Herring -1 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2022-02-07 22:56 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Johan Jonker, devicetree, Frank Wunderlich, Rob Herring, linux-kernel, Peter Geis, Heiko Stuebner, linux-arm-kernel On Sun, 23 Jan 2022 14:51:15 +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-02-07 22:56 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2022-02-07 22:56 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Johan Jonker, devicetree, Frank Wunderlich, Rob Herring, linux-kernel, Peter Geis, Heiko Stuebner, linux-arm-kernel On Sun, 23 Jan 2022 14:51:15 +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board @ 2022-02-07 22:56 ` Rob Herring 0 siblings, 0 replies; 30+ messages in thread From: Rob Herring @ 2022-02-07 22:56 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Johan Jonker, devicetree, Frank Wunderlich, Rob Herring, linux-kernel, Peter Geis, Heiko Stuebner, linux-arm-kernel On Sun, 23 Jan 2022 14:51:15 +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Add Devicetree Binding for Bananapi R2 Pro Board based on rk3568 SoC > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-01-23 13:51 ` Frank Wunderlich -1 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This patch adds Devicetree for Bananapi R2 Pro based on RK3568. Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. Gmac0 is directly connected to wan-port so usable without additional driver. On gmac1 there is a switch (rtl8367rb) connected which have not yet a driver in mainline. Patch also prepares nodes for GPIO header. Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- changes in v2: - drop alias for gmac1 - currently unused due to missing switch driver - verified / changed pinctrl of pwm/spi/uart/i2c - add sharing information for con2 functions - always power on vccio1 iodomain (used for rtc) - drop V00 from model - change leds (change names, drop label, add pinctrl, use color+function) - add fan --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 2 files changed, 462 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 479906f3ad7b..70007b370d87 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -58,3 +58,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts new file mode 100644 index 000000000000..738b62adbef8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Author: Frank Wunderlich <frank-w@public-files.de> + * + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi" + +/ { + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + bootargs = "earlycon=uart8250,mmio32,0xfe660000"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin &green_led_pin>; + + blue_led: led-0 { + color = <LED_COLOR_ID_BLUE>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + clock_in_out = "input"; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c5 { + /* pin 3 (SDA) + 4 (SCL) of header con2 */ + status = "disabled"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + green_led_pin: green-led-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm8 { + /* fan 5v - gnd - pwm */ + status = "okay"; +}; + +&pwm10 { + /* pin 7 of header con2 */ + status = "disabled"; +}; + +&pwm11 { + /* pin 15 of header con2 */ + status = "disabled"; +}; + +&pwm12 { + /* pin 21 of header con2 */ + /* shared with uart9 + spi3 */ + pinctrl-0 = <&pwm12m1_pins>; + status = "disabled"; +}; + +&pwm13 { + /* pin 24 of header con2 */ + /* shared with uart9 */ + pinctrl-0 = <&pwm13m1_pins>; + status = "disabled"; +}; + +&pwm14 { + /* pin 23 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm14m1_pins>; + status = "disabled"; +}; + +&pwm15 { + /* pin 19 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm15m1_pins>; + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&spi3 { + /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ + /* shared with pwm12/14/15 and uart9 */ + pinctrl-0 = <&spi3m1_pins>; + status = "disabled"; +}; + +&tsadc { + status = "okay"; +}; + +&uart0 { + /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ + status = "disabled"; +}; + +&uart2 { + /* debug-uart */ + status = "okay"; +}; + +&uart7 { + /* pin 11 (TX) + 13 (RX) of header con2 */ + pinctrl-0 = <&uart7m1_xfer>; + status = "disabled"; +}; + +&uart9 { + /* pin 21 (TX) + 24 (RX) of header con2 */ + /* shared with pwm13 and pwm12/spi3 */ + pinctrl-0 = <&uart9m1_xfer>; + status = "disabled"; +}; -- 2.25.1 ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This patch adds Devicetree for Bananapi R2 Pro based on RK3568. Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. Gmac0 is directly connected to wan-port so usable without additional driver. On gmac1 there is a switch (rtl8367rb) connected which have not yet a driver in mainline. Patch also prepares nodes for GPIO header. Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- changes in v2: - drop alias for gmac1 - currently unused due to missing switch driver - verified / changed pinctrl of pwm/spi/uart/i2c - add sharing information for con2 functions - always power on vccio1 iodomain (used for rtc) - drop V00 from model - change leds (change names, drop label, add pinctrl, use color+function) - add fan --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 2 files changed, 462 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 479906f3ad7b..70007b370d87 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -58,3 +58,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts new file mode 100644 index 000000000000..738b62adbef8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Author: Frank Wunderlich <frank-w@public-files.de> + * + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi" + +/ { + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + bootargs = "earlycon=uart8250,mmio32,0xfe660000"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin &green_led_pin>; + + blue_led: led-0 { + color = <LED_COLOR_ID_BLUE>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + clock_in_out = "input"; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c5 { + /* pin 3 (SDA) + 4 (SCL) of header con2 */ + status = "disabled"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + green_led_pin: green-led-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm8 { + /* fan 5v - gnd - pwm */ + status = "okay"; +}; + +&pwm10 { + /* pin 7 of header con2 */ + status = "disabled"; +}; + +&pwm11 { + /* pin 15 of header con2 */ + status = "disabled"; +}; + +&pwm12 { + /* pin 21 of header con2 */ + /* shared with uart9 + spi3 */ + pinctrl-0 = <&pwm12m1_pins>; + status = "disabled"; +}; + +&pwm13 { + /* pin 24 of header con2 */ + /* shared with uart9 */ + pinctrl-0 = <&pwm13m1_pins>; + status = "disabled"; +}; + +&pwm14 { + /* pin 23 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm14m1_pins>; + status = "disabled"; +}; + +&pwm15 { + /* pin 19 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm15m1_pins>; + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&spi3 { + /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ + /* shared with pwm12/14/15 and uart9 */ + pinctrl-0 = <&spi3m1_pins>; + status = "disabled"; +}; + +&tsadc { + status = "okay"; +}; + +&uart0 { + /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ + status = "disabled"; +}; + +&uart2 { + /* debug-uart */ + status = "okay"; +}; + +&uart7 { + /* pin 11 (TX) + 13 (RX) of header con2 */ + pinctrl-0 = <&uart7m1_xfer>; + status = "disabled"; +}; + +&uart9 { + /* pin 21 (TX) + 24 (RX) of header con2 */ + /* shared with pwm13 and pwm12/spi3 */ + pinctrl-0 = <&uart9m1_xfer>; + status = "disabled"; +}; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-23 13:51 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-23 13:51 UTC (permalink / raw) To: linux-rockchip Cc: Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel From: Frank Wunderlich <frank-w@public-files.de> This patch adds Devicetree for Bananapi R2 Pro based on RK3568. Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. Gmac0 is directly connected to wan-port so usable without additional driver. On gmac1 there is a switch (rtl8367rb) connected which have not yet a driver in mainline. Patch also prepares nodes for GPIO header. Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> --- changes in v2: - drop alias for gmac1 - currently unused due to missing switch driver - verified / changed pinctrl of pwm/spi/uart/i2c - add sharing information for con2 functions - always power on vccio1 iodomain (used for rtc) - drop V00 from model - change leds (change names, drop label, add pinctrl, use color+function) - add fan --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-bpi-r2-pro.dts | 461 ++++++++++++++++++ 2 files changed, 462 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 479906f3ad7b..70007b370d87 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -58,3 +58,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts new file mode 100644 index 000000000000..738b62adbef8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts @@ -0,0 +1,461 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Author: Frank Wunderlich <frank-w@public-files.de> + * + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi" + +/ { + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + bootargs = "earlycon=uart8250,mmio32,0xfe660000"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin &green_led_pin>; + + blue_led: led-0 { + color = <LED_COLOR_ID_BLUE>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + clock_in_out = "input"; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c5 { + /* pin 3 (SDA) + 4 (SCL) of header con2 */ + status = "disabled"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + green_led_pin: green-led-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm8 { + /* fan 5v - gnd - pwm */ + status = "okay"; +}; + +&pwm10 { + /* pin 7 of header con2 */ + status = "disabled"; +}; + +&pwm11 { + /* pin 15 of header con2 */ + status = "disabled"; +}; + +&pwm12 { + /* pin 21 of header con2 */ + /* shared with uart9 + spi3 */ + pinctrl-0 = <&pwm12m1_pins>; + status = "disabled"; +}; + +&pwm13 { + /* pin 24 of header con2 */ + /* shared with uart9 */ + pinctrl-0 = <&pwm13m1_pins>; + status = "disabled"; +}; + +&pwm14 { + /* pin 23 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm14m1_pins>; + status = "disabled"; +}; + +&pwm15 { + /* pin 19 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm15m1_pins>; + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&spi3 { + /* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */ + /* shared with pwm12/14/15 and uart9 */ + pinctrl-0 = <&spi3m1_pins>; + status = "disabled"; +}; + +&tsadc { + status = "okay"; +}; + +&uart0 { + /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ + status = "disabled"; +}; + +&uart2 { + /* debug-uart */ + status = "okay"; +}; + +&uart7 { + /* pin 11 (TX) + 13 (RX) of header con2 */ + pinctrl-0 = <&uart7m1_xfer>; + status = "disabled"; +}; + +&uart9 { + /* pin 21 (TX) + 24 (RX) of header con2 */ + /* shared with pwm13 and pwm12/spi3 */ + pinctrl-0 = <&uart9m1_xfer>; + status = "disabled"; +}; -- 2.25.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-01-24 8:31 ` Sascha Hauer -1 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 8:31 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > Gmac0 is directly connected to wan-port so usable without additional > driver. > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > driver in mainline. > > Patch also prepares nodes for GPIO header. > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > +&gmac0 { > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > + clock_in_out = "input"; > + phy-handle = <&rgmii_phy0>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac0_miim > + &gmac0_tx_bus2 > + &gmac0_rx_bus2 > + &gmac0_rgmii_clk > + &gmac0_rgmii_bus>; > + > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ Is this really a rtl8211f? I don't know and it could indeed be a rtl8211f, I'm just asking because the comment is copy pasted from the Quartz64 board. > + snps,reset-delays-us = <0 20000 100000>; > + > +&mdio0 { > + rgmii_phy0: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + }; 0 is the broadcast address. I'm not sure if it's a good idea to use it. There should be another address the phy listens on. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 8:31 ` Sascha Hauer 0 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 8:31 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > Gmac0 is directly connected to wan-port so usable without additional > driver. > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > driver in mainline. > > Patch also prepares nodes for GPIO header. > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > +&gmac0 { > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > + clock_in_out = "input"; > + phy-handle = <&rgmii_phy0>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac0_miim > + &gmac0_tx_bus2 > + &gmac0_rx_bus2 > + &gmac0_rgmii_clk > + &gmac0_rgmii_bus>; > + > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ Is this really a rtl8211f? I don't know and it could indeed be a rtl8211f, I'm just asking because the comment is copy pasted from the Quartz64 board. > + snps,reset-delays-us = <0 20000 100000>; > + > +&mdio0 { > + rgmii_phy0: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + }; 0 is the broadcast address. I'm not sure if it's a good idea to use it. There should be another address the phy listens on. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 8:31 ` Sascha Hauer 0 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 8:31 UTC (permalink / raw) To: Frank Wunderlich Cc: linux-rockchip, Frank Wunderlich, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > Gmac0 is directly connected to wan-port so usable without additional > driver. > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > driver in mainline. > > Patch also prepares nodes for GPIO header. > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > +&gmac0 { > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > + clock_in_out = "input"; > + phy-handle = <&rgmii_phy0>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac0_miim > + &gmac0_tx_bus2 > + &gmac0_rx_bus2 > + &gmac0_rgmii_clk > + &gmac0_rgmii_bus>; > + > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ Is this really a rtl8211f? I don't know and it could indeed be a rtl8211f, I'm just asking because the comment is copy pasted from the Quartz64 board. > + snps,reset-delays-us = <0 20000 100000>; > + > +&mdio0 { > + rgmii_phy0: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + }; 0 is the broadcast address. I'm not sure if it's a good idea to use it. There should be another address the phy listens on. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro 2022-01-24 8:31 ` Sascha Hauer (?) @ 2022-01-24 8:55 ` Frank Wunderlich -1 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 8:55 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > An: "Frank Wunderlich" <linux@fw-web.de> > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > From: Frank Wunderlich <frank-w@public-files.de> > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > Gmac0 is directly connected to wan-port so usable without additional > > driver. > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > driver in mainline. > > > > Patch also prepares nodes for GPIO header. > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > --- > > +&gmac0 { > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > + clock_in_out = "input"; > > + phy-handle = <&rgmii_phy0>; > > + phy-mode = "rgmii"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&gmac0_miim > > + &gmac0_tx_bus2 > > + &gmac0_rx_bus2 > > + &gmac0_rgmii_clk > > + &gmac0_rgmii_bus>; > > + > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > + snps,reset-active-low; > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > Is this really a rtl8211f? I don't know and it could indeed be a > rtl8211f, I'm just asking because the comment is copy pasted from > the Quartz64 board. i know thats a RTL8211 phy, but i see no additional letter on the chip, based on shematics it's a RTL8211F-CG > > + snps,reset-delays-us = <0 20000 100000>; > > + > > +&mdio0 { > > + rgmii_phy0: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0x0>; > > + }; > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > There should be another address the phy listens on. took this from the 3568-EVB (like the most parts, as the board is mostly the same), and in linux it's the same and working. The switch have also phy-id 0 on mdio bus #1, are you sure this is invalid? regards Frank ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 8:55 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 8:55 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > An: "Frank Wunderlich" <linux@fw-web.de> > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > From: Frank Wunderlich <frank-w@public-files.de> > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > Gmac0 is directly connected to wan-port so usable without additional > > driver. > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > driver in mainline. > > > > Patch also prepares nodes for GPIO header. > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > --- > > +&gmac0 { > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > + clock_in_out = "input"; > > + phy-handle = <&rgmii_phy0>; > > + phy-mode = "rgmii"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&gmac0_miim > > + &gmac0_tx_bus2 > > + &gmac0_rx_bus2 > > + &gmac0_rgmii_clk > > + &gmac0_rgmii_bus>; > > + > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > + snps,reset-active-low; > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > Is this really a rtl8211f? I don't know and it could indeed be a > rtl8211f, I'm just asking because the comment is copy pasted from > the Quartz64 board. i know thats a RTL8211 phy, but i see no additional letter on the chip, based on shematics it's a RTL8211F-CG > > + snps,reset-delays-us = <0 20000 100000>; > > + > > +&mdio0 { > > + rgmii_phy0: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0x0>; > > + }; > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > There should be another address the phy listens on. took this from the 3568-EVB (like the most parts, as the board is mostly the same), and in linux it's the same and working. The switch have also phy-id 0 on mdio bus #1, are you sure this is invalid? regards Frank _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 8:55 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 8:55 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel Hi > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > An: "Frank Wunderlich" <linux@fw-web.de> > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > From: Frank Wunderlich <frank-w@public-files.de> > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > Gmac0 is directly connected to wan-port so usable without additional > > driver. > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > driver in mainline. > > > > Patch also prepares nodes for GPIO header. > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > --- > > +&gmac0 { > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > + clock_in_out = "input"; > > + phy-handle = <&rgmii_phy0>; > > + phy-mode = "rgmii"; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&gmac0_miim > > + &gmac0_tx_bus2 > > + &gmac0_rx_bus2 > > + &gmac0_rgmii_clk > > + &gmac0_rgmii_bus>; > > + > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > + snps,reset-active-low; > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > Is this really a rtl8211f? I don't know and it could indeed be a > rtl8211f, I'm just asking because the comment is copy pasted from > the Quartz64 board. i know thats a RTL8211 phy, but i see no additional letter on the chip, based on shematics it's a RTL8211F-CG > > + snps,reset-delays-us = <0 20000 100000>; > > + > > +&mdio0 { > > + rgmii_phy0: ethernet-phy@0 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <0x0>; > > + }; > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > There should be another address the phy listens on. took this from the 3568-EVB (like the most parts, as the board is mostly the same), and in linux it's the same and working. The switch have also phy-id 0 on mdio bus #1, are you sure this is invalid? regards Frank _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro 2022-01-24 8:55 ` Frank Wunderlich (?) @ 2022-01-24 11:03 ` Sascha Hauer -1 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 11:03 UTC (permalink / raw) To: Frank Wunderlich Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > Hi > > > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > > Von: "Sascha Hauer" <sha@pengutronix.de> > > An: "Frank Wunderlich" <linux@fw-web.de> > > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > > From: Frank Wunderlich <frank-w@public-files.de> > > > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > > Gmac0 is directly connected to wan-port so usable without additional > > > driver. > > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > > driver in mainline. > > > > > > Patch also prepares nodes for GPIO header. > > > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > > --- > > > +&gmac0 { > > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > > + clock_in_out = "input"; > > > + phy-handle = <&rgmii_phy0>; > > > + phy-mode = "rgmii"; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&gmac0_miim > > > + &gmac0_tx_bus2 > > > + &gmac0_rx_bus2 > > > + &gmac0_rgmii_clk > > > + &gmac0_rgmii_bus>; > > > + > > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > > + snps,reset-active-low; > > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > > > Is this really a rtl8211f? I don't know and it could indeed be a > > rtl8211f, I'm just asking because the comment is copy pasted from > > the Quartz64 board. > > i know thats a RTL8211 phy, but i see no additional letter on the > chip, based on shematics it's a RTL8211F-CG Ok. I just wanted to make sure you checked that. > > > > + snps,reset-delays-us = <0 20000 100000>; > > > + > > > +&mdio0 { > > > + rgmii_phy0: ethernet-phy@0 { > > > + compatible = "ethernet-phy-ieee802.3-c22"; > > > + reg = <0x0>; > > > + }; > > > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > > There should be another address the phy listens on. > > took this from the 3568-EVB (like the most parts, as the board is > mostly the same), and in linux it's the same and working. The switch > have also phy-id 0 on mdio bus #1, are you sure this is invalid? It's not invalid, it's just the broadcast address to which other phys might answer as well. Anyway, as long as there's only a single phy on the bus it's probably okay. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 11:03 ` Sascha Hauer 0 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 11:03 UTC (permalink / raw) To: Frank Wunderlich Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > Hi > > > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > > Von: "Sascha Hauer" <sha@pengutronix.de> > > An: "Frank Wunderlich" <linux@fw-web.de> > > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > > From: Frank Wunderlich <frank-w@public-files.de> > > > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > > Gmac0 is directly connected to wan-port so usable without additional > > > driver. > > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > > driver in mainline. > > > > > > Patch also prepares nodes for GPIO header. > > > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > > --- > > > +&gmac0 { > > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > > + clock_in_out = "input"; > > > + phy-handle = <&rgmii_phy0>; > > > + phy-mode = "rgmii"; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&gmac0_miim > > > + &gmac0_tx_bus2 > > > + &gmac0_rx_bus2 > > > + &gmac0_rgmii_clk > > > + &gmac0_rgmii_bus>; > > > + > > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > > + snps,reset-active-low; > > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > > > Is this really a rtl8211f? I don't know and it could indeed be a > > rtl8211f, I'm just asking because the comment is copy pasted from > > the Quartz64 board. > > i know thats a RTL8211 phy, but i see no additional letter on the > chip, based on shematics it's a RTL8211F-CG Ok. I just wanted to make sure you checked that. > > > > + snps,reset-delays-us = <0 20000 100000>; > > > + > > > +&mdio0 { > > > + rgmii_phy0: ethernet-phy@0 { > > > + compatible = "ethernet-phy-ieee802.3-c22"; > > > + reg = <0x0>; > > > + }; > > > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > > There should be another address the phy listens on. > > took this from the 3568-EVB (like the most parts, as the board is > mostly the same), and in linux it's the same and working. The switch > have also phy-id 0 on mdio bus #1, are you sure this is invalid? It's not invalid, it's just the broadcast address to which other phys might answer as well. Anyway, as long as there's only a single phy on the bus it's probably okay. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 11:03 ` Sascha Hauer 0 siblings, 0 replies; 30+ messages in thread From: Sascha Hauer @ 2022-01-24 11:03 UTC (permalink / raw) To: Frank Wunderlich Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > Hi > > > Gesendet: Montag, 24. Januar 2022 um 09:31 Uhr > > Von: "Sascha Hauer" <sha@pengutronix.de> > > An: "Frank Wunderlich" <linux@fw-web.de> > > Cc: linux-rockchip@lists.infradead.org, "Frank Wunderlich" <frank-w@public-files.de>, "Rob Herring" <robh+dt@kernel.org>, "Heiko Stuebner" <heiko@sntech.de>, "Peter Geis" <pgwipeout@gmail.com>, "Johan Jonker" <jbx6244@gmail.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org > > Betreff: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro > > > > On Sun, Jan 23, 2022 at 02:51:16PM +0100, Frank Wunderlich wrote: > > > From: Frank Wunderlich <frank-w@public-files.de> > > > > > > This patch adds Devicetree for Bananapi R2 Pro based on RK3568. > > > Add uart/sd/emmc/i2c/rk809/tsadc nodes for basic function. > > > Gmac0 is directly connected to wan-port so usable without additional > > > driver. > > > On gmac1 there is a switch (rtl8367rb) connected which have not yet a > > > driver in mainline. > > > > > > Patch also prepares nodes for GPIO header. > > > > > > Co-developed-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Peter Geis <pgwipeout@gmail.com> > > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > > --- > > > +&gmac0 { > > > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > > > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > > > + clock_in_out = "input"; > > > + phy-handle = <&rgmii_phy0>; > > > + phy-mode = "rgmii"; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&gmac0_miim > > > + &gmac0_tx_bus2 > > > + &gmac0_rx_bus2 > > > + &gmac0_rgmii_clk > > > + &gmac0_rgmii_bus>; > > > + > > > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > > > + snps,reset-active-low; > > > + /* Reset time is 20ms, 100ms for rtl8211f */ > > > > Is this really a rtl8211f? I don't know and it could indeed be a > > rtl8211f, I'm just asking because the comment is copy pasted from > > the Quartz64 board. > > i know thats a RTL8211 phy, but i see no additional letter on the > chip, based on shematics it's a RTL8211F-CG Ok. I just wanted to make sure you checked that. > > > > + snps,reset-delays-us = <0 20000 100000>; > > > + > > > +&mdio0 { > > > + rgmii_phy0: ethernet-phy@0 { > > > + compatible = "ethernet-phy-ieee802.3-c22"; > > > + reg = <0x0>; > > > + }; > > > > 0 is the broadcast address. I'm not sure if it's a good idea to use it. > > There should be another address the phy listens on. > > took this from the 3568-EVB (like the most parts, as the board is > mostly the same), and in linux it's the same and working. The switch > have also phy-id 0 on mdio bus #1, are you sure this is invalid? It's not invalid, it's just the broadcast address to which other phys might answer as well. Anyway, as long as there's only a single phy on the bus it's probably okay. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro 2022-01-24 11:03 ` Sascha Hauer (?) @ 2022-01-24 11:49 ` Frank Wunderlich -1 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 11:49 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel > Gesendet: Montag, 24. Januar 2022 um 12:03 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > > took this from the 3568-EVB (like the most parts, as the board is > > mostly the same), and in linux it's the same and working. The switch > > have also phy-id 0 on mdio bus #1, are you sure this is invalid? just to clarify: in linux dts only the basics were taken from evb and changed if needed (like iodomain, regulators). mixed this with the barebox submsission where i mainly used the evb dts. should i add a note in head that some parts are taken from EVB and vendors dts? As this is my first new DTS, i want to be sure the legal notice is correct. > It's not invalid, it's just the broadcast address to which other phys > might answer as well. Anyway, as long as there's only a single phy on > the bus it's probably okay. ok, on mdio0 there is the rtl8211 phy and on mdio1 there is the rtl8367rb switch, so only 1 device per bus. I was not aware that 0 is broadcast. regards Frank ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 11:49 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 11:49 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel > Gesendet: Montag, 24. Januar 2022 um 12:03 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > > took this from the 3568-EVB (like the most parts, as the board is > > mostly the same), and in linux it's the same and working. The switch > > have also phy-id 0 on mdio bus #1, are you sure this is invalid? just to clarify: in linux dts only the basics were taken from evb and changed if needed (like iodomain, regulators). mixed this with the barebox submsission where i mainly used the evb dts. should i add a note in head that some parts are taken from EVB and vendors dts? As this is my first new DTS, i want to be sure the legal notice is correct. > It's not invalid, it's just the broadcast address to which other phys > might answer as well. Anyway, as long as there's only a single phy on > the bus it's probably okay. ok, on mdio0 there is the rtl8211 phy and on mdio1 there is the rtl8367rb switch, so only 1 device per bus. I was not aware that 0 is broadcast. regards Frank _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Aw: Re: Re: [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro @ 2022-01-24 11:49 ` Frank Wunderlich 0 siblings, 0 replies; 30+ messages in thread From: Frank Wunderlich @ 2022-01-24 11:49 UTC (permalink / raw) To: Sascha Hauer Cc: Frank Wunderlich, linux-rockchip, Rob Herring, Heiko Stuebner, Peter Geis, Johan Jonker, devicetree, linux-arm-kernel, linux-kernel > Gesendet: Montag, 24. Januar 2022 um 12:03 Uhr > Von: "Sascha Hauer" <sha@pengutronix.de> > On Mon, Jan 24, 2022 at 09:55:05AM +0100, Frank Wunderlich wrote: > > took this from the 3568-EVB (like the most parts, as the board is > > mostly the same), and in linux it's the same and working. The switch > > have also phy-id 0 on mdio bus #1, are you sure this is invalid? just to clarify: in linux dts only the basics were taken from evb and changed if needed (like iodomain, regulators). mixed this with the barebox submsission where i mainly used the evb dts. should i add a note in head that some parts are taken from EVB and vendors dts? As this is my first new DTS, i want to be sure the legal notice is correct. > It's not invalid, it's just the broadcast address to which other phys > might answer as well. Anyway, as long as there's only a single phy on > the bus it's probably okay. ok, on mdio0 there is the rtl8211 phy and on mdio1 there is the rtl8367rb switch, so only 1 device per bus. I was not aware that 0 is broadcast. regards Frank _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 0/2] Add BananaPi R2 Pro board 2022-01-23 13:51 ` Frank Wunderlich (?) @ 2022-02-08 16:59 ` Heiko Stuebner -1 siblings, 0 replies; 30+ messages in thread From: Heiko Stuebner @ 2022-02-08 16:59 UTC (permalink / raw) To: linux-rockchip, Frank Wunderlich Cc: Heiko Stuebner, Rob Herring, Johan Jonker, linux-kernel, Frank Wunderlich, devicetree, Peter Geis, linux-arm-kernel On Sun, 23 Jan 2022 14:51:14 +0100, Frank Wunderlich wrote: > This Series adds RK3568 based Bananapi R2 Board. > > changes in v2: > - rebase on 5.17-rc1 > - dropped patch for fixing dtbs_check (sent separately) > - verified pins on gpio-header (con2) and changed pinctrl where needed > - changed led part > > [...] Applied, thanks! [1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board [2/2] arm64: dts: rockchip: Add Bananapi R2 Pro Best regards, -- Heiko Stuebner <heiko@sntech.de> ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 0/2] Add BananaPi R2 Pro board @ 2022-02-08 16:59 ` Heiko Stuebner 0 siblings, 0 replies; 30+ messages in thread From: Heiko Stuebner @ 2022-02-08 16:59 UTC (permalink / raw) To: linux-rockchip, Frank Wunderlich Cc: Heiko Stuebner, Rob Herring, Johan Jonker, linux-kernel, Frank Wunderlich, devicetree, Peter Geis, linux-arm-kernel On Sun, 23 Jan 2022 14:51:14 +0100, Frank Wunderlich wrote: > This Series adds RK3568 based Bananapi R2 Board. > > changes in v2: > - rebase on 5.17-rc1 > - dropped patch for fixing dtbs_check (sent separately) > - verified pins on gpio-header (con2) and changed pinctrl where needed > - changed led part > > [...] Applied, thanks! [1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board [2/2] arm64: dts: rockchip: Add Bananapi R2 Pro Best regards, -- Heiko Stuebner <heiko@sntech.de> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 0/2] Add BananaPi R2 Pro board @ 2022-02-08 16:59 ` Heiko Stuebner 0 siblings, 0 replies; 30+ messages in thread From: Heiko Stuebner @ 2022-02-08 16:59 UTC (permalink / raw) To: linux-rockchip, Frank Wunderlich Cc: Heiko Stuebner, Rob Herring, Johan Jonker, linux-kernel, Frank Wunderlich, devicetree, Peter Geis, linux-arm-kernel On Sun, 23 Jan 2022 14:51:14 +0100, Frank Wunderlich wrote: > This Series adds RK3568 based Bananapi R2 Board. > > changes in v2: > - rebase on 5.17-rc1 > - dropped patch for fixing dtbs_check (sent separately) > - verified pins on gpio-header (con2) and changed pinctrl where needed > - changed led part > > [...] Applied, thanks! [1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board [2/2] arm64: dts: rockchip: Add Bananapi R2 Pro Best regards, -- Heiko Stuebner <heiko@sntech.de> _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2022-02-08 17:01 UTC | newest] Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-01-23 13:51 [PATCH v2 0/2] Add BananaPi R2 Pro board Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-01-23 13:51 ` [PATCH v2 1/2] dt-bindings: rockchip: Add BananaPi R2 Pro Board Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-02-05 18:59 ` Aw: " Frank Wunderlich 2022-02-05 18:59 ` Frank Wunderlich 2022-02-05 18:59 ` Frank Wunderlich 2022-02-07 22:56 ` Rob Herring 2022-02-07 22:56 ` Rob Herring 2022-02-07 22:56 ` Rob Herring 2022-01-23 13:51 ` [PATCH v2 2/2] arm64: dts: rockchip: Add Bananapi R2 Pro Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-01-23 13:51 ` Frank Wunderlich 2022-01-24 8:31 ` Sascha Hauer 2022-01-24 8:31 ` Sascha Hauer 2022-01-24 8:31 ` Sascha Hauer 2022-01-24 8:55 ` Aw: " Frank Wunderlich 2022-01-24 8:55 ` Frank Wunderlich 2022-01-24 8:55 ` Frank Wunderlich 2022-01-24 11:03 ` Sascha Hauer 2022-01-24 11:03 ` Sascha Hauer 2022-01-24 11:03 ` Sascha Hauer 2022-01-24 11:49 ` Aw: " Frank Wunderlich 2022-01-24 11:49 ` Frank Wunderlich 2022-01-24 11:49 ` Frank Wunderlich 2022-02-08 16:59 ` [PATCH v2 0/2] Add BananaPi R2 Pro board Heiko Stuebner 2022-02-08 16:59 ` Heiko Stuebner 2022-02-08 16:59 ` Heiko Stuebner
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