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* [CXL HDM DECODER PROGRAMMING] - Question: Does Qemu program HDM decoder register of the CXL endpoint?
@ 2022-01-23 16:13 Samarth Saxena
  2022-01-24 10:52 ` Jonathan Cameron via
  0 siblings, 1 reply; 2+ messages in thread
From: Samarth Saxena @ 2022-01-23 16:13 UTC (permalink / raw)
  To: qemu-devel

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Hi All,

I had a question about the CXL HDM Decoder register programming.
Is there any part of Qemu, that automatically programs the enable bit of the HDM decoder register in the Component registers of the CXL endpoint?
The CDR (component registers) are hosted inside the memory of the CXL endpoint.

Regards,
[CadenceLogoRed185Regcopy1583174817new51584636989.png]<https://www.cadence.com/en_US/home.html>
Samarth Saxena
Sr Principal Software Engineer
T: 911204308300
[UIcorrectsize1583179003.png]<https://www.cadence.com/en_US/home.html>
[16066EmailSignatureFortune100Best2021White92x1271617625037.png]<https://www.cadence.com/en_US/home/company/careers.html>





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^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [CXL HDM DECODER PROGRAMMING] - Question: Does Qemu program HDM decoder register of the CXL endpoint?
  2022-01-23 16:13 [CXL HDM DECODER PROGRAMMING] - Question: Does Qemu program HDM decoder register of the CXL endpoint? Samarth Saxena
@ 2022-01-24 10:52 ` Jonathan Cameron via
  0 siblings, 0 replies; 2+ messages in thread
From: Jonathan Cameron via @ 2022-01-24 10:52 UTC (permalink / raw)
  To: Samarth Saxena; +Cc: qemu-devel

On Sun, 23 Jan 2022 16:13:29 +0000
Samarth Saxena <samarths@cadence.com> wrote:

> Hi All,
> 
> I had a question about the CXL HDM Decoder register programming.
> Is there any part of Qemu, that automatically programs the enable bit
> of the HDM decoder register in the Component registers of the CXL
> endpoint? The CDR (component registers) are hosted inside the memory
> of the CXL endpoint.

Hi Samarth,

Given upstream QEMU doesn't support any CXL emulation at all currently
the answer to that is a no :)

I hope to post a v4 patch series for CXL support later this week.

Once that's out perhaps we can pick up this question again.

Thanks,

Jonathan


> 
> Regards,
> [CadenceLogoRed185Regcopy1583174817new51584636989.png]<https://www.cadence.com/en_US/home.html>
> Samarth Saxena
> Sr Principal Software Engineer
> T: 911204308300
> [UIcorrectsize1583179003.png]<https://www.cadence.com/en_US/home.html>
> [16066EmailSignatureFortune100Best2021White92x1271617625037.png]<https://www.cadence.com/en_US/home/company/careers.html>
> 
> 
> 
> 
> 



^ permalink raw reply	[flat|nested] 2+ messages in thread

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