From: Chen-Tsung Hsieh <chentsung@chromium.org> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Chen-Tsung Hsieh <chentsung@chromium.org> Subject: [RESEND PATCH] mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check() Date: Wed, 26 Jan 2022 15:32:26 +0800 [thread overview] Message-ID: <20220126073227.3401275-1-chentsung@chromium.org> (raw) Read back Status Register 1 to ensure that the written byte match the received value and return -EIO if read back test failed. Without this patch, spi_nor_write_16bit_sr_and_check() only check the second half of the 16bit. It causes errors like spi_nor_sr_unlock() return success incorrectly when spi_nor_write_16bit_sr_and_check() doesn't write SR successfully. Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> --- drivers/mtd/spi-nor/core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 04ea180118e3..426bfa9a65f4 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1007,6 +1007,15 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) if (ret) return ret; + ret = spi_nor_read_sr(nor, sr_cr); + if (ret) + return ret; + + if (sr1 != sr_cr[0]) { + dev_dbg(nor->dev, "SR: Read back test failed\n"); + return -EIO; + } + if (nor->flags & SNOR_F_NO_READ_CR) return 0; -- 2.35.0.rc0.227.g00780c9af4-goog Resend patch to move maintainers from 'Cc' to 'To' list.
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Tsung Hsieh <chentsung@chromium.org> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Chen-Tsung Hsieh <chentsung@chromium.org> Subject: [RESEND PATCH] mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check() Date: Wed, 26 Jan 2022 15:32:26 +0800 [thread overview] Message-ID: <20220126073227.3401275-1-chentsung@chromium.org> (raw) Read back Status Register 1 to ensure that the written byte match the received value and return -EIO if read back test failed. Without this patch, spi_nor_write_16bit_sr_and_check() only check the second half of the 16bit. It causes errors like spi_nor_sr_unlock() return success incorrectly when spi_nor_write_16bit_sr_and_check() doesn't write SR successfully. Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> --- drivers/mtd/spi-nor/core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 04ea180118e3..426bfa9a65f4 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1007,6 +1007,15 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) if (ret) return ret; + ret = spi_nor_read_sr(nor, sr_cr); + if (ret) + return ret; + + if (sr1 != sr_cr[0]) { + dev_dbg(nor->dev, "SR: Read back test failed\n"); + return -EIO; + } + if (nor->flags & SNOR_F_NO_READ_CR) return 0; -- 2.35.0.rc0.227.g00780c9af4-goog Resend patch to move maintainers from 'Cc' to 'To' list. ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next reply other threads:[~2022-01-26 7:33 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-26 7:32 Chen-Tsung Hsieh [this message] 2022-01-26 7:32 ` [RESEND PATCH] mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check() Chen-Tsung Hsieh 2022-01-26 22:38 ` Michael Walle 2022-01-26 22:38 ` Michael Walle 2022-01-27 3:31 ` Chen-Tsung Hsieh 2022-01-27 3:31 ` Chen-Tsung Hsieh 2022-01-27 9:18 ` Michael Walle 2022-01-27 9:18 ` Michael Walle 2022-01-27 18:27 ` Chen-Tsung Hsieh 2022-01-27 18:27 ` Chen-Tsung Hsieh 2022-01-31 17:19 ` Pratyush Yadav 2022-01-31 17:19 ` Pratyush Yadav 2022-04-27 7:11 ` Tudor.Ambarus 2022-04-27 7:11 ` Tudor.Ambarus 2022-04-27 7:14 ` Tudor.Ambarus 2022-04-27 7:14 ` Tudor.Ambarus 2022-04-27 8:59 ` Pratyush Yadav 2022-04-27 8:59 ` Pratyush Yadav 2022-04-27 10:51 ` Tudor.Ambarus 2022-04-27 10:51 ` Tudor.Ambarus 2022-04-27 9:31 ` Pratyush Yadav 2022-04-27 9:31 ` Pratyush Yadav
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