* [PATCH v2 0/4] QEMU spike machine support for U-Boot
@ 2022-01-27 6:11 Anup Patel
2022-01-27 6:11 ` [PATCH v2 1/4] serial: Add RISC-V HTIF console driver Anup Patel
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Anup Patel @ 2022-01-27 6:11 UTC (permalink / raw)
To: Rick Chen, Bin Meng
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Anup Patel
We can use same U-Boot binary compiled using qemu-riscv64_smode_defconfig
on QEMU virt machine and QEMU spike machine. To achieve this, we need HTIF
console support for U-Boot QEMU RISC-V board hence this series.
To test this series with latest OpenSBI, we can use the following command:
qemu-system-riscv64 -M spike -m 256M -display none -serial stdio \
-bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel \
./u-boot/u-boot.bin
These patch can be found in qemu_riscv_htif_v2 branch at:
https://github.com/avpatel/u-boot.git
Changes since v1:
- Use ofnode_by_compatible() in PATCH3
- Updated QEMU RISC-V documentation in PATCH4
Anup Patel (4):
serial: Add RISC-V HTIF console driver
riscv: qemu: Enable HTIF console support
riscv: qemu: Implement is_flash_available() for MTD NOR
doc: qemu-riscv: Update documentation for QEMU spike machine
board/emulation/qemu-riscv/Kconfig | 1 +
board/emulation/qemu-riscv/qemu-riscv.c | 12 ++
doc/board/emulation/qemu-riscv.rst | 48 ++++---
drivers/serial/Kconfig | 8 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_htif.c | 178 ++++++++++++++++++++++++
6 files changed, 232 insertions(+), 16 deletions(-)
create mode 100644 drivers/serial/serial_htif.c
--
2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/4] serial: Add RISC-V HTIF console driver
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
@ 2022-01-27 6:11 ` Anup Patel
2022-01-28 14:13 ` Bin Meng
2022-01-27 6:11 ` [PATCH v2 2/4] riscv: qemu: Enable HTIF console support Anup Patel
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Anup Patel @ 2022-01-27 6:11 UTC (permalink / raw)
To: Rick Chen, Bin Meng
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Anup Patel, Philipp Tomsich
Quite a few RISC-V emulators and ISS (including Spike) have host
transfer interface (HTIF) based console. This patch adds HTIF
based console driver for RISC-V platforms which depends totally
on DT node for HTIF register base address.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
---
drivers/serial/Kconfig | 8 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_htif.c | 178 +++++++++++++++++++++++++++++++++++
3 files changed, 187 insertions(+)
create mode 100644 drivers/serial/serial_htif.c
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 6c8fdda9a0..345d1881f5 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -866,6 +866,14 @@ config PXA_SERIAL
If you have a machine based on a Marvell XScale PXA2xx CPU you
can enable its onboard serial ports by enabling this option.
+config HTIF_CONSOLE
+ bool "RISC-V HTIF console support"
+ depends on DM_SERIAL && 64BIT
+ help
+ Select this to enable host transfer interface (HTIF) based serial
+ console. The HTIF device is quite common in RISC-V emulators and
+ RISC-V ISS so this driver allows using U-Boot on such platforms.
+
config SIFIVE_SERIAL
bool "SiFive UART support"
depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8168af640f..52e70aa191 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_OWL_SERIAL) += serial_owl.o
obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
obj-$(CONFIG_MTK_SERIAL) += serial_mtk.o
obj-$(CONFIG_MT7620_SERIAL) += serial_mt7620.o
+obj-$(CONFIG_HTIF_CONSOLE) += serial_htif.o
obj-$(CONFIG_SIFIVE_SERIAL) += serial_sifive.o
obj-$(CONFIG_XEN_SERIAL) += serial_xen.o
diff --git a/drivers/serial/serial_htif.c b/drivers/serial/serial_htif.c
new file mode 100644
index 0000000000..5d2bf0aaeb
--- /dev/null
+++ b/drivers/serial/serial_htif.c
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <log.h>
+#include <watchdog.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <linux/compiler.h>
+#include <serial.h>
+#include <linux/err.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define HTIF_DATA_BITS 48
+#define HTIF_DATA_MASK ((1ULL << HTIF_DATA_BITS) - 1)
+#define HTIF_DATA_SHIFT 0
+#define HTIF_CMD_BITS 8
+#define HTIF_CMD_MASK ((1ULL << HTIF_CMD_BITS) - 1)
+#define HTIF_CMD_SHIFT 48
+#define HTIF_DEV_BITS 8
+#define HTIF_DEV_MASK ((1ULL << HTIF_DEV_BITS) - 1)
+#define HTIF_DEV_SHIFT 56
+
+#define HTIF_DEV_SYSTEM 0
+#define HTIF_DEV_CONSOLE 1
+
+#define HTIF_CONSOLE_CMD_GETC 0
+#define HTIF_CONSOLE_CMD_PUTC 1
+
+#if __riscv_xlen == 64
+# define TOHOST_CMD(dev, cmd, payload) \
+ (((u64)(dev) << HTIF_DEV_SHIFT) | \
+ ((u64)(cmd) << HTIF_CMD_SHIFT) | \
+ (u64)(payload))
+#else
+# define TOHOST_CMD(dev, cmd, payload) ({ \
+ if ((dev) || (cmd)) \
+ __builtin_trap(); \
+ (payload); })
+#endif
+#define FROMHOST_DEV(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_DEV_SHIFT) & HTIF_DEV_MASK)
+#define FROMHOST_CMD(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_CMD_SHIFT) & HTIF_CMD_MASK)
+#define FROMHOST_DATA(fromhost_value) \
+ ((u64)((fromhost_value) >> HTIF_DATA_SHIFT) & HTIF_DATA_MASK)
+
+struct htif_plat {
+ void *fromhost;
+ void *tohost;
+ int console_char;
+};
+
+static void __check_fromhost(struct htif_plat *plat)
+{
+ u64 fh = readq(plat->fromhost);
+
+ if (!fh)
+ return;
+ writeq(0, plat->fromhost);
+
+ /* this should be from the console */
+ if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE)
+ __builtin_trap();
+ switch (FROMHOST_CMD(fh)) {
+ case HTIF_CONSOLE_CMD_GETC:
+ plat->console_char = 1 + (u8)FROMHOST_DATA(fh);
+ break;
+ case HTIF_CONSOLE_CMD_PUTC:
+ break;
+ default:
+ __builtin_trap();
+ }
+}
+
+static void __set_tohost(struct htif_plat *plat,
+ u64 dev, u64 cmd, u64 data)
+{
+ while (readq(plat->tohost))
+ __check_fromhost(plat);
+ writeq(TOHOST_CMD(dev, cmd, data), plat->tohost);
+}
+
+static int htif_serial_putc(struct udevice *dev, const char ch)
+{
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ __set_tohost(plat, HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch);
+ return 0;
+}
+
+static int htif_serial_getc(struct udevice *dev)
+{
+ int ch;
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ if (plat->console_char < 0)
+ __check_fromhost(plat);
+
+ if (plat->console_char >= 0) {
+ ch = plat->console_char;
+ plat->console_char = -1;
+ __set_tohost(plat, HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0);
+ return (ch) ? ch - 1 : -EAGAIN;
+ }
+
+ return -EAGAIN;
+}
+
+static int htif_serial_pending(struct udevice *dev, bool input)
+{
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ if (!input)
+ return 0;
+
+ if (plat->console_char < 0)
+ __check_fromhost(plat);
+
+ return (plat->console_char >= 0) ? 1 : 0;
+}
+
+static int htif_serial_probe(struct udevice *dev)
+{
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ /* Queue first getc request */
+ __set_tohost(plat, HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0);
+
+ return 0;
+}
+
+static int htif_serial_of_to_plat(struct udevice *dev)
+{
+ fdt_addr_t addr;
+ struct htif_plat *plat = dev_get_plat(dev);
+
+ addr = dev_read_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -ENODEV;
+ plat->fromhost = (void *)(uintptr_t)addr;
+ plat->tohost = plat->fromhost + sizeof(u64);
+
+ addr = dev_read_addr_index(dev, 1);
+ if (addr != FDT_ADDR_T_NONE)
+ plat->tohost = (void *)(uintptr_t)addr;
+
+ plat->console_char = -1;
+
+ return 0;
+}
+
+static const struct dm_serial_ops htif_serial_ops = {
+ .putc = htif_serial_putc,
+ .getc = htif_serial_getc,
+ .pending = htif_serial_pending,
+};
+
+static const struct udevice_id htif_serial_ids[] = {
+ { .compatible = "ucb,htif0" },
+ { }
+};
+
+U_BOOT_DRIVER(serial_htif) = {
+ .name = "serial_htif",
+ .id = UCLASS_SERIAL,
+ .of_match = htif_serial_ids,
+ .of_to_plat = htif_serial_of_to_plat,
+ .plat_auto = sizeof(struct htif_plat),
+ .probe = htif_serial_probe,
+ .ops = &htif_serial_ops,
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/4] riscv: qemu: Enable HTIF console support
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
2022-01-27 6:11 ` [PATCH v2 1/4] serial: Add RISC-V HTIF console driver Anup Patel
@ 2022-01-27 6:11 ` Anup Patel
2022-01-28 12:36 ` Bin Meng
2022-01-27 6:11 ` [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR Anup Patel
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Anup Patel @ 2022-01-27 6:11 UTC (permalink / raw)
To: Rick Chen, Bin Meng
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Anup Patel, Philipp Tomsich
Enable support for HTIF console so that we can use QEMU RISC-V U-Boot
on RISC-V emulators and ISS having it.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Rick Chen <rick@andestech.com>
---
board/emulation/qemu-riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 1bbf1bc84a..f7538bc496 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -56,6 +56,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply DM_SCSI
imply SYS_NS16550
imply SIFIVE_SERIAL
+ imply HTIF_CONSOLE if 64BIT
imply SYSRESET
imply SYSRESET_CMD_POWEROFF
imply SYSRESET_SYSCON
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
2022-01-27 6:11 ` [PATCH v2 1/4] serial: Add RISC-V HTIF console driver Anup Patel
2022-01-27 6:11 ` [PATCH v2 2/4] riscv: qemu: Enable HTIF console support Anup Patel
@ 2022-01-27 6:11 ` Anup Patel
2022-01-28 7:31 ` Bin Meng
2022-02-06 10:00 ` Heinrich Schuchardt
2022-01-27 6:11 ` [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine Anup Patel
2022-02-06 8:40 ` [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
4 siblings, 2 replies; 12+ messages in thread
From: Anup Patel @ 2022-01-27 6:11 UTC (permalink / raw)
To: Rick Chen, Bin Meng
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Anup Patel
Currently, if MTD NOR is enabled then U-Boot tries to issue flash
commands even when CFI flash DT node is not present. This causes
access fault on RISC-V emulators or ISS which do not emulate CFI
flash. To handle this issue, we implement is_flash_available() for
qemu-riscv board which will return 1 only if CFI flash DT node is
present.
Fixes: d248627f9d42 ("riscv: qemu: Enable MTD NOR flash support")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
---
board/emulation/qemu-riscv/qemu-riscv.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c
index b0d9dd59b1..ae3b7a3295 100644
--- a/board/emulation/qemu-riscv/qemu-riscv.c
+++ b/board/emulation/qemu-riscv/qemu-riscv.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <dm.h>
+#include <dm/ofnode.h>
#include <env.h>
#include <fdtdec.h>
#include <image.h>
@@ -16,6 +17,17 @@
DECLARE_GLOBAL_DATA_PTR;
+#if IS_ENABLED(CONFIG_MTD_NOR_FLASH)
+int is_flash_available(void)
+{
+ if (!ofnode_equal(ofnode_by_compatible(ofnode_null(), "cfi-flash"),
+ ofnode_null()))
+ return 1;
+
+ return 0;
+}
+#endif
+
int board_init(void)
{
/*
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
` (2 preceding siblings ...)
2022-01-27 6:11 ` [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR Anup Patel
@ 2022-01-27 6:11 ` Anup Patel
2022-01-28 7:18 ` Bin Meng
2022-02-06 8:40 ` [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
4 siblings, 1 reply; 12+ messages in thread
From: Anup Patel @ 2022-01-27 6:11 UTC (permalink / raw)
To: Rick Chen, Bin Meng
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Anup Patel
We can now use same U-Boot images on both QEMU virt machine and QEMU
spike machine so let's update the QEMU RISC-V documentation.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
doc/board/emulation/qemu-riscv.rst | 48 ++++++++++++++++++++----------
1 file changed, 32 insertions(+), 16 deletions(-)
diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst
index 4b8e104a21..0a4b121687 100644
--- a/doc/board/emulation/qemu-riscv.rst
+++ b/doc/board/emulation/qemu-riscv.rst
@@ -4,16 +4,21 @@
QEMU RISC-V
===========
-QEMU for RISC-V supports a special 'virt' machine designed for emulation and
-virtualization purposes. This document describes how to run U-Boot under it.
-Both 32-bit and 64-bit targets are supported, running in either machine or
-supervisor mode.
+QEMU for RISC-V supports a special 'virt' machine and 'spike' machine designed
+for emulation and virtualization purposes. This document describes how to run
+U-Boot under it. Both 32-bit and 64-bit targets are supported, running in
+either machine or supervisor mode.
The QEMU virt machine models a generic RISC-V virtual machine with support for
the VirtIO standard networking and block storage devices. It has CLINT, PLIC,
16550A UART devices in addition to VirtIO and it also uses device-tree to pass
-configuration information to guest software. It implements RISC-V privileged
-architecture spec v1.10.
+configuration information to guest software. It implements the latest RISC-V
+privileged architecture.
+
+The QEMU spike machine models a minimalistic RISC-V virtual machine with
+only CLINT and HTIF devices. It also uses device-tree to pass configuration
+information to guest software and implements the latest RISC-V privileged
+architecture.
Building U-Boot
---------------
@@ -38,13 +43,17 @@ Running U-Boot
--------------
The minimal QEMU command line to get U-Boot up and running is:
-- For 32-bit RISC-V::
+- For 32-bit RISC-V virt machine::
- qemu-system-riscv32 -nographic -machine virt -bios u-boot
+ qemu-system-riscv32 -nographic -machine virt -bios u-boot.bin
-- For 64-bit RISC-V::
+- For 64-bit RISC-V virt machine::
+
+ qemu-system-riscv64 -nographic -machine virt -bios u-boot.bin
+
+- For 64-bit RISC-V spike machine::
- qemu-system-riscv64 -nographic -machine virt -bios u-boot
+ qemu-system-riscv64 -nographic -machine spike -bios u-boot.bin
The commands above create targets with 128MiB memory by default.
A freely configurable amount of RAM can be created via the '-m'
@@ -55,6 +64,7 @@ the new setting.
For instructions on how to run U-Boot in supervisor mode on QEMU
with OpenSBI, see the documentation available with OpenSBI:
https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md
+https://github.com/riscv/opensbi/blob/master/docs/platform/spike.md
These have been tested in QEMU 5.0.0.
@@ -77,8 +87,9 @@ supported by U-Boot. Clone the OpenSBI repository and run the following command.
See the OpenSBI documentation for full details:
https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md
+https://github.com/riscv/opensbi/blob/master/docs/platform/spike.md
-To make the FW_DYNAMIC binary (build/platform/qemu/virt/firmware/fw_dynamic.bin)
+To make the FW_DYNAMIC binary (build/platform/generic/firmware/fw_dynamic.bin)
available to U-Boot, either copy it into the U-Boot root directory or specify
its location with the OPENSBI environment variable. Afterwards, compile U-Boot
with the following commands.
@@ -96,17 +107,22 @@ with the following commands.
The minimal QEMU commands to run U-Boot SPL in both 32-bit and 64-bit
configurations are:
-- For 32-bit RISC-V::
+- For 32-bit RISC-V virt machine::
- qemu-system-riscv32 -nographic -machine virt -bios spl/u-boot-spl \
+ qemu-system-riscv32 -nographic -machine virt -bios spl/u-boot-spl.bin \
-device loader,file=u-boot.itb,addr=0x80200000
-- For 64-bit RISC-V::
+- For 64-bit RISC-V virt machine::
+
+ qemu-system-riscv64 -nographic -machine virt -bios spl/u-boot-spl.bin \
+ -device loader,file=u-boot.itb,addr=0x80200000
+
+- For 64-bit RISC-V spike machine::
- qemu-system-riscv64 -nographic -machine virt -bios spl/u-boot-spl \
+ qemu-system-riscv64 -nographic -machine spike -bios spl/u-boot-spl.bin \
-device loader,file=u-boot.itb,addr=0x80200000
-An attached disk can be emulated by adding::
+An attached disk can be emulated in RISC-V virt machine by adding::
-device ich9-ahci,id=ahci \
-drive if=none,file=riscv64.img,format=raw,id=mydisk \
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine
2022-01-27 6:11 ` [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine Anup Patel
@ 2022-01-28 7:18 ` Bin Meng
0 siblings, 0 replies; 12+ messages in thread
From: Bin Meng @ 2022-01-28 7:18 UTC (permalink / raw)
To: Anup Patel
Cc: Rick Chen, Atish Patra, Alistair Francis, Anup Patel,
U-Boot Mailing List
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> We can now use same U-Boot images on both QEMU virt machine and QEMU
> spike machine so let's update the QEMU RISC-V documentation.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> doc/board/emulation/qemu-riscv.rst | 48 ++++++++++++++++++++----------
> 1 file changed, 32 insertions(+), 16 deletions(-)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR
2022-01-27 6:11 ` [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR Anup Patel
@ 2022-01-28 7:31 ` Bin Meng
2022-02-06 10:00 ` Heinrich Schuchardt
1 sibling, 0 replies; 12+ messages in thread
From: Bin Meng @ 2022-01-28 7:31 UTC (permalink / raw)
To: Anup Patel
Cc: Rick Chen, Atish Patra, Alistair Francis, Anup Patel,
U-Boot Mailing List
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> Currently, if MTD NOR is enabled then U-Boot tries to issue flash
> commands even when CFI flash DT node is not present. This causes
> access fault on RISC-V emulators or ISS which do not emulate CFI
> flash. To handle this issue, we implement is_flash_available() for
> qemu-riscv board which will return 1 only if CFI flash DT node is
> present.
>
> Fixes: d248627f9d42 ("riscv: qemu: Enable MTD NOR flash support")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Rick Chen <rick@andestech.com>
> ---
> board/emulation/qemu-riscv/qemu-riscv.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/4] riscv: qemu: Enable HTIF console support
2022-01-27 6:11 ` [PATCH v2 2/4] riscv: qemu: Enable HTIF console support Anup Patel
@ 2022-01-28 12:36 ` Bin Meng
0 siblings, 0 replies; 12+ messages in thread
From: Bin Meng @ 2022-01-28 12:36 UTC (permalink / raw)
To: Anup Patel
Cc: Rick Chen, Atish Patra, Alistair Francis, Anup Patel,
U-Boot Mailing List, Philipp Tomsich
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> Enable support for HTIF console so that we can use QEMU RISC-V U-Boot
> on RISC-V emulators and ISS having it.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> Reviewed-by: Rick Chen <rick@andestech.com>
> ---
> board/emulation/qemu-riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/4] serial: Add RISC-V HTIF console driver
2022-01-27 6:11 ` [PATCH v2 1/4] serial: Add RISC-V HTIF console driver Anup Patel
@ 2022-01-28 14:13 ` Bin Meng
0 siblings, 0 replies; 12+ messages in thread
From: Bin Meng @ 2022-01-28 14:13 UTC (permalink / raw)
To: Anup Patel
Cc: Rick Chen, Atish Patra, Alistair Francis, Anup Patel,
U-Boot Mailing List, Philipp Tomsich
On Thu, Jan 27, 2022 at 2:11 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> Quite a few RISC-V emulators and ISS (including Spike) have host
> transfer interface (HTIF) based console. This patch adds HTIF
> based console driver for RISC-V platforms which depends totally
> on DT node for HTIF register base address.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> Reviewed-by: Rick Chen <rick@andestech.com>
> ---
> drivers/serial/Kconfig | 8 ++
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_htif.c | 178 +++++++++++++++++++++++++++++++++++
> 3 files changed, 187 insertions(+)
> create mode 100644 drivers/serial/serial_htif.c
>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/4] QEMU spike machine support for U-Boot
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
` (3 preceding siblings ...)
2022-01-27 6:11 ` [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine Anup Patel
@ 2022-02-06 8:40 ` Anup Patel
[not found] ` <HK0PR03MB2994AD37D80D204D94463A57C12C9@HK0PR03MB2994.apcprd03.prod.outlook.com>
4 siblings, 1 reply; 12+ messages in thread
From: Anup Patel @ 2022-02-06 8:40 UTC (permalink / raw)
To: Rick Chen
Cc: Bin Meng, Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List
Hi Rick,
On Thu, Jan 27, 2022 at 11:41 AM Anup Patel <apatel@ventanamicro.com> wrote:
>
> We can use same U-Boot binary compiled using qemu-riscv64_smode_defconfig
> on QEMU virt machine and QEMU spike machine. To achieve this, we need HTIF
> console support for U-Boot QEMU RISC-V board hence this series.
>
> To test this series with latest OpenSBI, we can use the following command:
> qemu-system-riscv64 -M spike -m 256M -display none -serial stdio \
> -bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel \
> ./u-boot/u-boot.bin
>
> These patch can be found in qemu_riscv_htif_v2 branch at:
> https://github.com/avpatel/u-boot.git
>
> Changes since v1:
> - Use ofnode_by_compatible() in PATCH3
> - Updated QEMU RISC-V documentation in PATCH4
>
> Anup Patel (4):
> serial: Add RISC-V HTIF console driver
> riscv: qemu: Enable HTIF console support
> riscv: qemu: Implement is_flash_available() for MTD NOR
> doc: qemu-riscv: Update documentation for QEMU spike machine
Can this series be considered for the upcoming v2022.04 release ?
Best Regards,
Anup
>
> board/emulation/qemu-riscv/Kconfig | 1 +
> board/emulation/qemu-riscv/qemu-riscv.c | 12 ++
> doc/board/emulation/qemu-riscv.rst | 48 ++++---
> drivers/serial/Kconfig | 8 ++
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_htif.c | 178 ++++++++++++++++++++++++
> 6 files changed, 232 insertions(+), 16 deletions(-)
> create mode 100644 drivers/serial/serial_htif.c
>
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR
2022-01-27 6:11 ` [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR Anup Patel
2022-01-28 7:31 ` Bin Meng
@ 2022-02-06 10:00 ` Heinrich Schuchardt
1 sibling, 0 replies; 12+ messages in thread
From: Heinrich Schuchardt @ 2022-02-06 10:00 UTC (permalink / raw)
To: Anup Patel
Cc: Atish Patra, Alistair Francis, Anup Patel, U-Boot Mailing List,
Rick Chen, Bin Meng
On 1/27/22 07:11, Anup Patel wrote:
> Currently, if MTD NOR is enabled then U-Boot tries to issue flash
> commands even when CFI flash DT node is not present. This causes
> access fault on RISC-V emulators or ISS which do not emulate CFI
> flash. To handle this issue, we implement is_flash_available() for
> qemu-riscv board which will return 1 only if CFI flash DT node is
> present.
>
> Fixes: d248627f9d42 ("riscv: qemu: Enable MTD NOR flash support")
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> Reviewed-by: Rick Chen <rick@andestech.com>
> ---
> board/emulation/qemu-riscv/qemu-riscv.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c
> index b0d9dd59b1..ae3b7a3295 100644
> --- a/board/emulation/qemu-riscv/qemu-riscv.c
> +++ b/board/emulation/qemu-riscv/qemu-riscv.c
> @@ -5,6 +5,7 @@
>
> #include <common.h>
> #include <dm.h>
> +#include <dm/ofnode.h>
> #include <env.h>
> #include <fdtdec.h>
> #include <image.h>
> @@ -16,6 +17,17 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#if IS_ENABLED(CONFIG_MTD_NOR_FLASH)
I do not think that we need an #if here. The weak function is only
defined and called if CONFIG_MTD_NOR_FLASH=y (cf. common/board_r.c).
Without the #if the linker will detect that this function is not needed
and will eliminate it if CONFIG_MTD_NOR_FLASH=n.
As this ensures that the function is always compiled this is the
preferred way of implementation.
> +int is_flash_available(void)
Currently there is no include defining the is_flash_available(). This
needs to be fixed.
Best regards
Heinrich
> +{
> + if (!ofnode_equal(ofnode_by_compatible(ofnode_null(), "cfi-flash"),
> + ofnode_null()))
> + return 1;
> +
> + return 0;
> +}
> +#endif
> +
> int board_init(void)
> {
> /*
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 0/4] QEMU spike machine support for U-Boot
[not found] ` <HK0PR03MB2994AD37D80D204D94463A57C12C9@HK0PR03MB2994.apcprd03.prod.outlook.com>
@ 2022-02-07 6:10 ` Rick Chen
0 siblings, 0 replies; 12+ messages in thread
From: Rick Chen @ 2022-02-07 6:10 UTC (permalink / raw)
To: apatel
Cc: U-Boot Mailing List, Bin Meng, Atish Patra, Alistair.Francis,
rick, Leo Liang
HI Anup,
> From: Anup Patel <anup@brainfault.org>
> Sent: Sunday, February 06, 2022 4:41 PM
> To: Rick Jian-Zhi Chen(陳建志) <rick@andestech.com>
> Cc: Bin Meng <bmeng.cn@gmail.com>; Atish Patra <atishp@atishpatra.org>; Alistair Francis <Alistair.Francis@wdc.com>; Anup Patel <apatel@ventanamicro.com>; U-Boot Mailing List <u-boot@lists.denx.de>
> Subject: Re: [PATCH v2 0/4] QEMU spike machine support for U-Boot
>
> Hi Rick,
>
> On Thu, Jan 27, 2022 at 11:41 AM Anup Patel <apatel@ventanamicro.com> wrote:
> >
> > We can use same U-Boot binary compiled using
> > qemu-riscv64_smode_defconfig on QEMU virt machine and QEMU spike
> > machine. To achieve this, we need HTIF console support for U-Boot QEMU RISC-V board hence this series.
> >
> > To test this series with latest OpenSBI, we can use the following command:
> > qemu-system-riscv64 -M spike -m 256M -display none -serial stdio \
> > -bios opensbi/build/platform/generic/firmware/fw_jump.bin -kernel \
> > ./u-boot/u-boot.bin
> >
> > These patch can be found in qemu_riscv_htif_v2 branch at:
> > https://github.com/avpatel/u-boot.git
> >
> > Changes since v1:
> > - Use ofnode_by_compatible() in PATCH3
> > - Updated QEMU RISC-V documentation in PATCH4
> >
> > Anup Patel (4):
> > serial: Add RISC-V HTIF console driver
> > riscv: qemu: Enable HTIF console support
> > riscv: qemu: Implement is_flash_available() for MTD NOR
> > doc: qemu-riscv: Update documentation for QEMU spike machine
>
> Can this series be considered for the upcoming v2022.04 release ?
Yes, cc Leo and he will follow this series and apply ASAP.
Thanks,
Rick
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-02-07 6:10 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-01-27 6:11 [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
2022-01-27 6:11 ` [PATCH v2 1/4] serial: Add RISC-V HTIF console driver Anup Patel
2022-01-28 14:13 ` Bin Meng
2022-01-27 6:11 ` [PATCH v2 2/4] riscv: qemu: Enable HTIF console support Anup Patel
2022-01-28 12:36 ` Bin Meng
2022-01-27 6:11 ` [PATCH v2 3/4] riscv: qemu: Implement is_flash_available() for MTD NOR Anup Patel
2022-01-28 7:31 ` Bin Meng
2022-02-06 10:00 ` Heinrich Schuchardt
2022-01-27 6:11 ` [PATCH v2 4/4] doc: qemu-riscv: Update documentation for QEMU spike machine Anup Patel
2022-01-28 7:18 ` Bin Meng
2022-02-06 8:40 ` [PATCH v2 0/4] QEMU spike machine support for U-Boot Anup Patel
[not found] ` <HK0PR03MB2994AD37D80D204D94463A57C12C9@HK0PR03MB2994.apcprd03.prod.outlook.com>
2022-02-07 6:10 ` Rick Chen
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