* [PATCH v2] drm/panel: simple: Tune timing for ET057090DHU
@ 2022-01-27 11:48 Francesco Dolcini
2022-02-21 14:34 ` Francesco Dolcini
0 siblings, 1 reply; 2+ messages in thread
From: Francesco Dolcini @ 2022-01-27 11:48 UTC (permalink / raw)
To: Thierry Reding, Sam Ravnborg, dri-devel
Cc: Oleksandr Suvorov, Marcel Ziswiler, Oleksandr Suvorov, Francesco Dolcini
From: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
VESA Display Monitor Timing v1.13 has recommendations for the historical
VGA mode 640x480 60Hz. These parameters are compatible with EDT
ET057090DHU recommended timings.
Use VESA DMT timing parameters for EDT ET057090DHU panel.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
v2: removed stale vrefresh field
---
drivers/gpu/drm/panel/panel-simple.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 0c8786ebffd1..52e936dd2d6f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -1598,12 +1598,12 @@ static const struct drm_display_mode edt_et057090dhu_mode = {
.clock = 25175,
.hdisplay = 640,
.hsync_start = 640 + 16,
- .hsync_end = 640 + 16 + 30,
- .htotal = 640 + 16 + 30 + 114,
+ .hsync_end = 640 + 16 + 48,
+ .htotal = 640 + 16 + 48 + 96,
.vdisplay = 480,
.vsync_start = 480 + 10,
- .vsync_end = 480 + 10 + 3,
- .vtotal = 480 + 10 + 3 + 32,
+ .vsync_end = 480 + 10 + 2,
+ .vtotal = 480 + 10 + 2 + 33,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] drm/panel: simple: Tune timing for ET057090DHU
2022-01-27 11:48 [PATCH v2] drm/panel: simple: Tune timing for ET057090DHU Francesco Dolcini
@ 2022-02-21 14:34 ` Francesco Dolcini
0 siblings, 0 replies; 2+ messages in thread
From: Francesco Dolcini @ 2022-02-21 14:34 UTC (permalink / raw)
To: Thierry Reding, Sam Ravnborg, dri-devel
Cc: Marcel Ziswiler, Francesco Dolcini
Hello all,
just a gently ping on this patch.
Any concern? We (Toradex) added this panel long time ago and we are
using this updated timing since a long time now.
Francesco
On Thu, Jan 27, 2022 at 12:48:10PM +0100, Francesco Dolcini wrote:
> From: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
>
> VESA Display Monitor Timing v1.13 has recommendations for the historical
> VGA mode 640x480 60Hz. These parameters are compatible with EDT
> ET057090DHU recommended timings.
>
> Use VESA DMT timing parameters for EDT ET057090DHU panel.
>
> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
> Cc: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
> ---
> v2: removed stale vrefresh field
> ---
> drivers/gpu/drm/panel/panel-simple.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 0c8786ebffd1..52e936dd2d6f 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1598,12 +1598,12 @@ static const struct drm_display_mode edt_et057090dhu_mode = {
> .clock = 25175,
> .hdisplay = 640,
> .hsync_start = 640 + 16,
> - .hsync_end = 640 + 16 + 30,
> - .htotal = 640 + 16 + 30 + 114,
> + .hsync_end = 640 + 16 + 48,
> + .htotal = 640 + 16 + 48 + 96,
> .vdisplay = 480,
> .vsync_start = 480 + 10,
> - .vsync_end = 480 + 10 + 3,
> - .vtotal = 480 + 10 + 3 + 32,
> + .vsync_end = 480 + 10 + 2,
> + .vtotal = 480 + 10 + 2 + 33,
> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
> };
>
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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