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From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	openbmc@lists.ozlabs.org, "Tomer Maimon" <tmaimon77@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	linux-kernel@vger.kernel.org,
	"Andy Shevchenko" <andy.shevchenko@gmail.com>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
Subject: [PATCH v5 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node
Date: Sat, 29 Jan 2022 12:52:22 +0100	[thread overview]
Message-ID: <20220129115228.2257310-4-j.neuschaefer@gmx.net> (raw)
In-Reply-To: <20220129115228.2257310-1-j.neuschaefer@gmx.net>

The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.

This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

---
v3-v5:
- no changes

v2:
- Rename node to syscon@b0000000

v1:
- https://lore.kernel.org/lkml/20210602120329.2444672-4-j.neuschaefer@gmx.net/
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index d7cbeb1874840..a17ee70085dd0 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -33,6 +33,11 @@ soc {
 		interrupt-parent = <&aic>;
 		ranges;

+		gcr: syscon@b0000000 {
+			compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
+			reg = <0xb0000000 0x200>;
+		};
+
 		serial0: serial@b8000000 {
 			compatible = "nuvoton,wpcm450-uart";
 			reg = <0xb8000000 0x20>;
--
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org
Cc: "Tomer Maimon" <tmaimon77@gmail.com>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	linux-kernel@vger.kernel.org,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Andy Shevchenko" <andy.shevchenko@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
	openbmc@lists.ozlabs.org,
	"Benjamin Fair" <benjaminfair@google.com>
Subject: [PATCH v5 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node
Date: Sat, 29 Jan 2022 12:52:22 +0100	[thread overview]
Message-ID: <20220129115228.2257310-4-j.neuschaefer@gmx.net> (raw)
In-Reply-To: <20220129115228.2257310-1-j.neuschaefer@gmx.net>

The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.

This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

---
v3-v5:
- no changes

v2:
- Rename node to syscon@b0000000

v1:
- https://lore.kernel.org/lkml/20210602120329.2444672-4-j.neuschaefer@gmx.net/
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index d7cbeb1874840..a17ee70085dd0 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -33,6 +33,11 @@ soc {
 		interrupt-parent = <&aic>;
 		ranges;

+		gcr: syscon@b0000000 {
+			compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
+			reg = <0xb0000000 0x200>;
+		};
+
 		serial0: serial@b8000000 {
 			compatible = "nuvoton,wpcm450-uart";
 			reg = <0xb8000000 0x20>;
--
2.34.1


  parent reply	other threads:[~2022-01-29 11:57 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-29 11:52 [PATCH v5 0/9] Nuvoton WPCM450 pinctrl and GPIO driver Jonathan Neuschäfer
2022-01-29 11:52 ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 2/9] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` Jonathan Neuschäfer [this message]
2022-01-29 11:52   ` [PATCH v5 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 4/9] dt-bindings: pinctrl: Add Nuvoton WPCM450 Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 5/9] pinctrl: nuvoton: Add driver for WPCM450 Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 13:48   ` kernel test robot
2022-01-29 13:48     ` kernel test robot
2022-01-29 13:48     ` kernel test robot
2022-01-29 14:09   ` kernel test robot
2022-01-29 14:09     ` kernel test robot
2022-01-29 14:09     ` kernel test robot
2022-01-30 18:47     ` Andy Shevchenko
2022-01-30 18:47       ` Andy Shevchenko
2022-01-30 18:47       ` Andy Shevchenko
2022-01-30 20:17       ` Jonathan Neuschäfer
2022-01-30 20:17         ` Jonathan Neuschäfer
2022-01-30 20:17         ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 6/9] ARM: dts: wpcm450: Add pinctrl and GPIO nodes Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 7/9] ARM: dts: wpcm450: Add pin functions Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 8/9] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-29 11:52 ` [PATCH v5 9/9] ARM: dts: wpcm450: Add pinmux information to UART0 Jonathan Neuschäfer
2022-01-29 11:52   ` Jonathan Neuschäfer
2022-01-30  1:50 ` [PATCH v5 0/9] Nuvoton WPCM450 pinctrl and GPIO driver Linus Walleij
2022-01-30  1:50   ` Linus Walleij
2022-01-30 10:12   ` Jonathan Neuschäfer
2022-01-30 10:12     ` Jonathan Neuschäfer
2022-02-01 23:42     ` Joel Stanley
2022-02-01 23:42       ` Joel Stanley
2022-02-02 12:01       ` Jonathan Neuschäfer
2022-02-02 12:01         ` Jonathan Neuschäfer
2022-02-02 12:10         ` Andy Shevchenko
2022-02-02 12:10           ` Andy Shevchenko
2022-02-02 12:40           ` Jonathan Neuschäfer
2022-02-02 12:40             ` Jonathan Neuschäfer
2022-02-12  8:40           ` Jonathan Neuschäfer
2022-02-12  8:40             ` Jonathan Neuschäfer
2022-02-15  5:56             ` Joel Stanley
2022-02-15  5:56               ` Joel Stanley
2022-02-15 17:19               ` Jonathan Neuschäfer
2022-02-15 17:19                 ` Jonathan Neuschäfer
2022-03-15  0:17 ` Linus Walleij
2022-03-15  0:17   ` Linus Walleij
2022-03-15  1:13   ` Joel Stanley
2022-03-15  1:13     ` Joel Stanley

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