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* [RFC 0/5] Add data flow metering support for HDMI2.1
@ 2022-02-03  5:50 ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, Vandita Kulkarni, intel-gfx, laurent.pinchart

The below patches add support for data flow metering
as mentioned in the section 6.5.6 FRL data flow metering
of HDMI 2.1 specification.

Add functions to calclulate the DFM parameters
for the given frl config, which is further used to evaluate the
data flow metering requirement as specified in the spec.

As per the spec the below patches implement the frl capacity computation
functions for both compressed and uncompressed video.
Finally exposing 1 function each for compressed and uncompressed video
to figure out if the data flow metering requirement is met or not.

Ankit Nautiyal (1):
  drm/hdmi21: Add support for DFM calculation with DSC

Vandita Kulkarni (4):
  drm/hdmi21: Define frl_dfm structure
  drm/hdmi21: Add non dsc frl capacity computation helpers
  drm/hdmi21: Add helpers to verify non-dsc DFM requirements
  drm/hdmi21: Add frl_dfm_helper to Makefile

 drivers/gpu/drm/Makefile             |   2 +-
 drivers/gpu/drm/drm_frl_dfm_helper.c | 855 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     | 131 ++++
 3 files changed, 987 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c
 create mode 100644 include/drm/drm_frl_dfm_helper.h

-- 
2.32.0


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 0/5] Add data flow metering support for HDMI2.1
@ 2022-02-03  5:50 ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

The below patches add support for data flow metering
as mentioned in the section 6.5.6 FRL data flow metering
of HDMI 2.1 specification.

Add functions to calclulate the DFM parameters
for the given frl config, which is further used to evaluate the
data flow metering requirement as specified in the spec.

As per the spec the below patches implement the frl capacity computation
functions for both compressed and uncompressed video.
Finally exposing 1 function each for compressed and uncompressed video
to figure out if the data flow metering requirement is met or not.

Ankit Nautiyal (1):
  drm/hdmi21: Add support for DFM calculation with DSC

Vandita Kulkarni (4):
  drm/hdmi21: Define frl_dfm structure
  drm/hdmi21: Add non dsc frl capacity computation helpers
  drm/hdmi21: Add helpers to verify non-dsc DFM requirements
  drm/hdmi21: Add frl_dfm_helper to Makefile

 drivers/gpu/drm/Makefile             |   2 +-
 drivers/gpu/drm/drm_frl_dfm_helper.c | 855 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     | 131 ++++
 3 files changed, 987 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c
 create mode 100644 include/drm/drm_frl_dfm_helper.h

-- 
2.32.0


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [RFC 1/5] drm/hdmi21: Define frl_dfm structure
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
@ 2022-02-03  5:50   ` Vandita Kulkarni
  -1 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, Vandita Kulkarni, intel-gfx, laurent.pinchart

Define frl_dfm structure to hold frl characteristics
needed for frl capacity computation in order to
meet the data flow metering requirement.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 include/drm/drm_frl_dfm_helper.h | 126 +++++++++++++++++++++++++++++++
 1 file changed, 126 insertions(+)
 create mode 100644 include/drm/drm_frl_dfm_helper.h

diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
new file mode 100644
index 000000000000..16b8fcc7cbcc
--- /dev/null
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -0,0 +1,126 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright © 2022 Intel Corp
+ */
+
+#ifndef DRM_FRL_DFM_H_
+#define DRM_FRL_DFM_H_
+
+/* DFM constraints and tolerance values from HDMI2.1 spec */
+#define TB_BORROWED_MAX			400
+#define FRL_CHAR_PER_CHAR_BLK		510
+/* Tolerance pixel clock unit is in  mHz */
+#define TOLERANCE_PIXEL_CLOCK		5
+#define TOLERANCE_FRL_BIT_RATE		300
+#define TOLERANCE_AUDIO_CLOCK		1000
+#define ACR_RATE_MAX			1500
+#define EFFICIENCY_MULTIPLIER		1000
+#define OVERHEAD_M			(3 * EFFICIENCY_MULTIPLIER / 1000)
+#define BPP_MULTIPLIER			16
+#define FRL_TIMING_NS_MULTIPLIER	1000000000
+
+/* ALl the input config needed to compute DFM requirements */
+struct drm_frl_dfm_input_config {
+
+	/*
+	 * Pixel clock rate kHz, when FVA is
+	 * enabled this rate is the rate after adjustment
+	 */
+	u32 pixel_clock_nominal_khz;
+
+	/* active pixels per line */
+	u32 hactive;
+
+	/* Blanking pixels per line */
+	u32 hblank;
+
+	/* Bits per component */
+	u32 bpc;
+
+	/* Pixel encoding */
+	u32 color_format;
+
+	/* FRL bit rate in kbps */
+	u32 bit_rate_kbps;
+
+	/* FRL lanes */
+	u32 lanes;
+
+	/* Number of audio channels */
+	u32 audio_channels;
+
+	/* Audio rate in Hz */
+	u32 audio_hz;
+
+	/* Selected bpp target value */
+	u32 target_bpp_16;
+
+	/*
+	 * Number of horizontal pixels in a slice.
+	 * Equivalent to PPS parameter slice_width
+	 */
+	u32 slice_width;
+};
+
+/* Computed dfm parameters as per the HDMI2.1 spec */
+struct drm_frl_dfm_params {
+
+	/*
+	 * Link overhead in percentage
+	 * multiplied by 1000 (efficiency multiplier)
+	 */
+	u32 overhead_max;
+
+	/* Maximum pixel rate in kHz */
+	u32 pixel_clock_max_khz;
+
+	/* Minimum video line period in nano sec */
+	u32 line_time_ns;
+
+	/* worst case slow frl character rate in kbps */
+	u32 char_rate_min_kbps;
+
+	/* minimum total frl charecters per line perios */
+	u32 cfrl_line;
+
+	/* Average tribyte rate in khz */
+	u32 ftb_avg_k;
+
+	/* Audio characteristics */
+
+	/*  number of audio packets needed during hblank */
+	u32 num_audio_pkts_line;
+
+	/*
+	 *  Minimum required hblank assuming no control preiod
+	 *  RC compression
+	 */
+	u32 hblank_audio_min;
+
+	/* Number of tribytes required to carry active video */
+	u32 tb_active;
+
+	/* Total available tribytes during the blanking period */
+	u32 tb_blank;
+
+	/*
+	 * Number of tribytes required to be transmitted during
+	 * the hblank period
+	 */
+	u32 tb_borrowed;
+
+	/* DSC frl characteristics */
+
+	/* Tribytes required to carry the target bpp */
+	u32 hcactive_target;
+
+	/* tribytes available during blanking with target bpp */
+	u32 hcblank_target;
+};
+
+/* FRL DFM structure to hold involved in DFM computation */
+struct drm_hdmi_frl_dfm {
+	struct drm_frl_dfm_input_config config;
+	struct drm_frl_dfm_params params;
+};
+
+#endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 1/5] drm/hdmi21: Define frl_dfm structure
@ 2022-02-03  5:50   ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

Define frl_dfm structure to hold frl characteristics
needed for frl capacity computation in order to
meet the data flow metering requirement.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 include/drm/drm_frl_dfm_helper.h | 126 +++++++++++++++++++++++++++++++
 1 file changed, 126 insertions(+)
 create mode 100644 include/drm/drm_frl_dfm_helper.h

diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
new file mode 100644
index 000000000000..16b8fcc7cbcc
--- /dev/null
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -0,0 +1,126 @@
+/* SPDX-License-Identifier: MIT
+ * Copyright © 2022 Intel Corp
+ */
+
+#ifndef DRM_FRL_DFM_H_
+#define DRM_FRL_DFM_H_
+
+/* DFM constraints and tolerance values from HDMI2.1 spec */
+#define TB_BORROWED_MAX			400
+#define FRL_CHAR_PER_CHAR_BLK		510
+/* Tolerance pixel clock unit is in  mHz */
+#define TOLERANCE_PIXEL_CLOCK		5
+#define TOLERANCE_FRL_BIT_RATE		300
+#define TOLERANCE_AUDIO_CLOCK		1000
+#define ACR_RATE_MAX			1500
+#define EFFICIENCY_MULTIPLIER		1000
+#define OVERHEAD_M			(3 * EFFICIENCY_MULTIPLIER / 1000)
+#define BPP_MULTIPLIER			16
+#define FRL_TIMING_NS_MULTIPLIER	1000000000
+
+/* ALl the input config needed to compute DFM requirements */
+struct drm_frl_dfm_input_config {
+
+	/*
+	 * Pixel clock rate kHz, when FVA is
+	 * enabled this rate is the rate after adjustment
+	 */
+	u32 pixel_clock_nominal_khz;
+
+	/* active pixels per line */
+	u32 hactive;
+
+	/* Blanking pixels per line */
+	u32 hblank;
+
+	/* Bits per component */
+	u32 bpc;
+
+	/* Pixel encoding */
+	u32 color_format;
+
+	/* FRL bit rate in kbps */
+	u32 bit_rate_kbps;
+
+	/* FRL lanes */
+	u32 lanes;
+
+	/* Number of audio channels */
+	u32 audio_channels;
+
+	/* Audio rate in Hz */
+	u32 audio_hz;
+
+	/* Selected bpp target value */
+	u32 target_bpp_16;
+
+	/*
+	 * Number of horizontal pixels in a slice.
+	 * Equivalent to PPS parameter slice_width
+	 */
+	u32 slice_width;
+};
+
+/* Computed dfm parameters as per the HDMI2.1 spec */
+struct drm_frl_dfm_params {
+
+	/*
+	 * Link overhead in percentage
+	 * multiplied by 1000 (efficiency multiplier)
+	 */
+	u32 overhead_max;
+
+	/* Maximum pixel rate in kHz */
+	u32 pixel_clock_max_khz;
+
+	/* Minimum video line period in nano sec */
+	u32 line_time_ns;
+
+	/* worst case slow frl character rate in kbps */
+	u32 char_rate_min_kbps;
+
+	/* minimum total frl charecters per line perios */
+	u32 cfrl_line;
+
+	/* Average tribyte rate in khz */
+	u32 ftb_avg_k;
+
+	/* Audio characteristics */
+
+	/*  number of audio packets needed during hblank */
+	u32 num_audio_pkts_line;
+
+	/*
+	 *  Minimum required hblank assuming no control preiod
+	 *  RC compression
+	 */
+	u32 hblank_audio_min;
+
+	/* Number of tribytes required to carry active video */
+	u32 tb_active;
+
+	/* Total available tribytes during the blanking period */
+	u32 tb_blank;
+
+	/*
+	 * Number of tribytes required to be transmitted during
+	 * the hblank period
+	 */
+	u32 tb_borrowed;
+
+	/* DSC frl characteristics */
+
+	/* Tribytes required to carry the target bpp */
+	u32 hcactive_target;
+
+	/* tribytes available during blanking with target bpp */
+	u32 hcblank_target;
+};
+
+/* FRL DFM structure to hold involved in DFM computation */
+struct drm_hdmi_frl_dfm {
+	struct drm_frl_dfm_input_config config;
+	struct drm_frl_dfm_params params;
+};
+
+#endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [RFC 2/5] drm/hdmi21: Add non dsc frl capacity computation helpers
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
@ 2022-02-03  5:50   ` Vandita Kulkarni
  -1 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, Vandita Kulkarni, intel-gfx, laurent.pinchart

Add helper functions for computing non dsc frl
link characteristics

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 396 +++++++++++++++++++++++++++
 1 file changed, 396 insertions(+)
 create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
new file mode 100644
index 000000000000..8498083adf72
--- /dev/null
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -0,0 +1,396 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2022 Intel Corp
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <drm/drm_frl_dfm_helper.h>
+#include <drm/drm_connector.h>
+
+/* Total frl charecters per super block */
+static u32 drm_get_frl_char_per_super_blk(u32 lanes)
+{
+	u32 frl_char_per_sb;
+
+	frl_char_per_sb = (4 * FRL_CHAR_PER_CHAR_BLK) + lanes;
+	return frl_char_per_sb;
+}
+
+/*
+ * Determine the overhead due to the inclusion of
+ * the SR and SSB FRL charecters used for
+ * super block framing
+ */
+static u32 drm_get_overhead_super_blk(u32 lanes)
+{
+	return (lanes * EFFICIENCY_MULTIPLIER) / drm_get_frl_char_per_super_blk(lanes);
+}
+
+/*
+ * Determine the overhead due to the inclusion of RS FEC pairity
+ * symbols. Each charecter block uses 8 FRL charecters for RS Pairity
+ * and there are 4 charecter blocks per super block
+ */
+static u32 drm_get_overhead_rs(u32 lanes)
+{
+	return (8 * 4 * EFFICIENCY_MULTIPLIER) /  drm_get_frl_char_per_super_blk(lanes);
+}
+
+/* Determine the overhead due to FRL Map charecters.
+ * In a bandwidth constrained application, the FRL packets will be long,
+ * there will typically be two FRL Map Charecters per Super Block most of the time.
+ * When a tracnsition occurs between Hactive and Hblank (uncomperssed video) or
+ * HCactive and HCblank (compressed video transport), there may be a
+ * third FRL Map Charected. Therefore this spec assumes 2.5 FRL Map Charecters
+ * per Super Block.
+ */
+static u32 drm_get_overhead_frl_map_char(u32 lanes)
+{
+	return (25  * EFFICIENCY_MULTIPLIER) / (10 * drm_get_frl_char_per_super_blk(lanes));
+}
+
+/* Total minimum overhead multiplied by EFFICIENCY_MULIPLIER */
+static u32 drm_get_total_minimum_overhead(u32 lanes)
+{
+	u32 total_overhead_min;
+	u32 overhead_sb = drm_get_overhead_super_blk(lanes);
+	u32 overhead_rs = drm_get_overhead_rs(lanes);
+	u32 overhead_map = drm_get_overhead_frl_map_char(lanes);
+
+	total_overhead_min = overhead_sb + overhead_rs + overhead_map;
+
+	return total_overhead_min;
+}
+
+/*
+ * Additional margin to the overhead is provided to account for the possibility
+ * of more Map Charecters, zero padding at the end of HCactive, and other minor
+ * items
+ */
+static u32 drm_get_max_overhead(u32 total_overhead_min)
+{
+	u32 total_overhead_max;
+
+	total_overhead_max = total_overhead_min + OVERHEAD_M;
+	return total_overhead_max;
+}
+
+/* Collect the link charecteristics */
+
+/* Determine the maximum legal pixel rate */
+static u32 drm_get_max_legal_pixel_rate(u32 fpixel_clock_nominal_k)
+{
+	u32 fpixel_clock_max_k = (fpixel_clock_nominal_k *
+				  (1000 + TOLERANCE_PIXEL_CLOCK)) / 1000;
+	return fpixel_clock_max_k;
+}
+
+/* Determine the minimum Video Line period */
+static u32 drm_get_min_video_line_period(u32 hactive, u32 hblank,
+					 u32 fpixel_clock_max_k)
+{
+	u32 line_time_ns;
+
+	line_time_ns = ((hactive + hblank) * FRL_TIMING_NS_MULTIPLIER) /
+		       fpixel_clock_max_k;
+	return line_time_ns;
+}
+
+/* Determine the worst-case slow FRL Bit Rate in kbps*/
+static u32 drm_get_min_frl_bit_rate(u32 frl_bit_rate_nominal_k)
+{
+	u32 frl_bit_rate_min_k;
+
+	frl_bit_rate_min_k = (frl_bit_rate_nominal_k / 1000000) *
+			     (1000000 - TOLERANCE_FRL_BIT_RATE);
+	return frl_bit_rate_min_k;
+}
+
+/* Determine the worst-case slow FRL Charecter Rate */
+static u32 drm_get_min_frl_char_rate(u32 frl_bit_rate_min_k)
+{
+	u32 frl_char_rate_min_k;
+
+	frl_char_rate_min_k = frl_bit_rate_min_k / 18;
+	return frl_char_rate_min_k;
+}
+
+/* Determine the Minimum Total FRL charecters per line period */
+static u32
+drm_get_total_frl_char_per_line_period(u32 line_time_ns, u32 frl_char_rate_min_k,
+				      u32 lanes)
+{
+	u32 frl_char_per_line_period;
+
+	frl_char_per_line_period = (line_time_ns * frl_char_rate_min_k * lanes *
+				    1000) / FRL_TIMING_NS_MULTIPLIER;
+	return frl_char_per_line_period;
+}
+
+/* Audio Support Verification Computations */
+
+/*
+ * Determine Audio Related Packet Rate considering the audio clock
+ * increased to maximim rate permitted by Tolerance Audio clock
+ */
+static u32
+drm_get_audio_pkt_rate(u32 f_audio, u32 num_audio_pkt)
+{
+	u32 audio_pkt_rate;
+
+	audio_pkt_rate = ((f_audio *  num_audio_pkt + (2 * ACR_RATE_MAX)) *
+			 (1000000 + TOLERANCE_AUDIO_CLOCK)) / 1000000;
+	return audio_pkt_rate;
+}
+
+/*
+ * Average required packets per line is
+ * Number of audio packets needed during Hblank
+ */
+static u32
+drm_get_audio_pkts_hblank(u32 audio_pkt_rate, u32 line_time_ns)
+{
+	u32 avg_audio_pkts_per_line;
+
+	avg_audio_pkts_per_line = DIV_ROUND_UP(audio_pkt_rate * line_time_ns,
+					       FRL_TIMING_NS_MULTIPLIER);
+	return avg_audio_pkts_per_line;
+}
+
+/*
+ * Minimum required Hblank assuming no Control Period RC Compression
+ * This includes Video Guard band, Two Island Guard bands, two 12 character
+ * Control Periods and 32 * AudioPackets_Line.
+ * In addition, 32 character periods are allocated for the transmission of an
+ * ACR packet
+ */
+static u32
+drm_get_audio_hblank_min(u32 audio_pkts_line)
+{
+	u32  hblank_audio_min;
+
+	hblank_audio_min = 32 + 32 * audio_pkts_line;
+	return hblank_audio_min;
+}
+
+/*
+ * During the Hblank period, Audio packets (32 frl characters each),
+ * ACR packets (32 frl characters each), Island guard band (4 total frl characters)
+ * and Video guard band (3 frl characters) do not benefit from RC compression
+ * Therefore start by determining the number of Control Characters that maybe
+ * RC compressible
+ */
+static u32
+drm_get_num_char_rc_compressible(u32 color_format,
+				 u32 bpc, u32 audio_packets_line, u32 hblank)
+{
+	u32 cfrl_free;
+	u32 kcd, k420;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc/8;
+
+	cfrl_free = max(((hblank * kcd) / k420 - 32 * audio_packets_line - 7),
+			 U32_MIN);
+	return cfrl_free;
+}
+
+/*
+ * Determine the actual number of characters made available by
+ * RC compression
+ */
+static u32
+drm_get_num_char_compression_savings(u32 cfrl_free)
+{
+	/*In order to be conservative, situations are considered where
+	 * maximum RC compression may not be possible.
+	 * Add one character each for RC break caused by:
+	 * • Island Preamble not aligned to the RC Compression
+	 * • Video Preamble not aligned to the RC Compression
+	 * • HSYNC lead edge not aligned to the RC Compression
+	 * • HSYNC trail edge not aligned to the RC Compression
+	 */
+	const u32 cfrl_margin = 4;
+	u32 cfrl_savings = max(((7 * cfrl_free) / 8) - cfrl_margin, U32_MIN);
+	return cfrl_savings;
+}
+
+static u32
+drm_get_frl_bits_per_pixel(u32 color_format, u32 bpc)
+{
+	u32 kcd, k420, bpp;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc / 8;
+
+	bpp = (24 * kcd) / k420;
+	return bpp;
+}
+
+static u32
+drm_get_video_bytes_per_line(u32 bpp, u32 hactive)
+{
+	u32 bytes_per_line;
+
+	bytes_per_line = (bpp * hactive) / 8;
+	return bytes_per_line;
+}
+
+/*
+ * Determine the required number of tribytes to carry active video
+ * per line
+ */
+static u32
+drm_get_active_video_tribytes_reqd(u32 bytes_per_line)
+{
+	u32 tribyte_active;
+
+	tribyte_active = DIV_ROUND_UP(bytes_per_line, 3);
+	return tribyte_active;
+}
+
+/* Determine the total available tribytes during the blanking period */
+static u32
+drm_get_blanking_tribytes_avail(u32 color_format,
+				u32 hblank, u32 bpc)
+{
+	u32 tribytes_blank;
+	u32 kcd, k420;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc / 8;
+
+	tribytes_blank = (hblank * kcd) / k420;
+	return tribytes_blank;
+}
+
+/* Determine the average tribyte rate in kilo tribytes per sec */
+static u32
+drm_get_avg_tribyte_rate(u32 pixel_clk_max_khz, u32 tb_active, u32 tb_blank,
+			 u32 hactive, u32 hblank)
+{
+	u32 ftb_avg_k;
+
+	ftb_avg_k = (pixel_clk_max_khz * (tb_active + tb_blank)) / (hactive + hblank);
+	return ftb_avg_k;
+}
+
+/*
+ * Determine the time required to transmit the active portion of the
+ * minimum possible active line period in the base timing
+ */
+static u32
+drm_get_tactive_ref(u32 line_time_ns, u32 hblank, u32 hactive)
+{
+	u32 tactive_ref_ns;
+
+	tactive_ref_ns = (line_time_ns * hactive) / (hblank + hactive);
+	return tactive_ref_ns;
+}
+
+/*
+ * Determine the time required to transmit the Video blanking portion
+ * of the minimum possible active line period in the base timing
+ */
+static u32
+drm_get_tblank_ref(u32 line_time_ns, u32 hblank, u32 hactive)
+{
+	u32 tblank_ref_ns;
+
+	tblank_ref_ns = (line_time_ns * hactive) / (hblank + hactive);
+	return tblank_ref_ns;
+}
+
+/*
+ * Determine the minimum time necessary to transmit the active tribytes
+ * considering frl bandwidth limitation.
+ * Given the available bandwidth (i.e after overhead is considered),
+ * tactive_min represents the amount of time needed to transmit all the
+ * active data
+ */
+static u32
+drm_get_tactive_min(u32 num_lanes, u32 tribyte_active,
+		    u32 overhead_max_k, u32 frl_char_min_rate_k)
+{
+	u32 tactive_min_ns, nr, dr;
+
+	nr = 3/2 * tribyte_active * FRL_TIMING_NS_MULTIPLIER;
+	dr = (num_lanes * frl_char_min_rate_k * 1000 *
+	      (EFFICIENCY_MULTIPLIER - overhead_max_k)) / EFFICIENCY_MULTIPLIER;
+	tactive_min_ns = nr / dr;
+
+	return tactive_min_ns;
+}
+
+/*
+ * Determine the minimum time necessary to transmit the video blanking
+ * tribytes considering frl bandwidth limitations
+ */
+static u32
+drm_get_tblank_min(u32 num_lanes, u32 tribyte_blank,
+		    u32 overhead_max_k, u32 frl_char_min_rate_k)
+{
+	u32 tblank_min_ns, nr, dr;
+
+	nr = tribyte_blank * FRL_TIMING_NS_MULTIPLIER;
+	dr = (num_lanes * frl_char_min_rate_k * 1000 *
+	      (EFFICIENCY_MULTIPLIER - overhead_max_k)) / EFFICIENCY_MULTIPLIER;
+	tblank_min_ns = nr / dr;
+	return tblank_min_ns;
+}
+
+/* Determine the disparity in tribytes */
+static u32
+drm_get_tribytes_borrowed(u32 tborrowed_ns, u32 ftb_avg_k)
+{
+	u32 tribytes_borrowed;
+
+	tribytes_borrowed = DIV_ROUND_UP((tborrowed_ns * ftb_avg_k * 1000),
+					 FRL_TIMING_NS_MULTIPLIER);
+	return tribytes_borrowed;
+}
+
+/*
+ * Determine the actual number of payload FRL characters required to carry each
+ * video line
+ */
+static u32
+drm_get_frl_char_payload_actual(u32 tribytes_active, u32 tribytes_blank, u32 cfrl_savings)
+{
+	u32 frl_char_payload_actual;
+
+	frl_char_payload_actual = DIV_ROUND_UP(3 * tribytes_active, 2) + tribytes_blank - cfrl_savings;
+	return frl_char_payload_actual;
+}
+
+/* Determine the payload utilization of the total number of FRL characters */
+static u32
+drm_compute_payload_utilization(u32 frl_char_payload_actual, u32 frl_char_per_line_period)
+{
+	u32 utilization;
+
+	utilization = (frl_char_payload_actual * EFFICIENCY_MULTIPLIER) / frl_char_per_line_period;
+	return utilization;
+}
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 2/5] drm/hdmi21: Add non dsc frl capacity computation helpers
@ 2022-02-03  5:50   ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

Add helper functions for computing non dsc frl
link characteristics

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 396 +++++++++++++++++++++++++++
 1 file changed, 396 insertions(+)
 create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
new file mode 100644
index 000000000000..8498083adf72
--- /dev/null
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -0,0 +1,396 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2022 Intel Corp
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <drm/drm_frl_dfm_helper.h>
+#include <drm/drm_connector.h>
+
+/* Total frl charecters per super block */
+static u32 drm_get_frl_char_per_super_blk(u32 lanes)
+{
+	u32 frl_char_per_sb;
+
+	frl_char_per_sb = (4 * FRL_CHAR_PER_CHAR_BLK) + lanes;
+	return frl_char_per_sb;
+}
+
+/*
+ * Determine the overhead due to the inclusion of
+ * the SR and SSB FRL charecters used for
+ * super block framing
+ */
+static u32 drm_get_overhead_super_blk(u32 lanes)
+{
+	return (lanes * EFFICIENCY_MULTIPLIER) / drm_get_frl_char_per_super_blk(lanes);
+}
+
+/*
+ * Determine the overhead due to the inclusion of RS FEC pairity
+ * symbols. Each charecter block uses 8 FRL charecters for RS Pairity
+ * and there are 4 charecter blocks per super block
+ */
+static u32 drm_get_overhead_rs(u32 lanes)
+{
+	return (8 * 4 * EFFICIENCY_MULTIPLIER) /  drm_get_frl_char_per_super_blk(lanes);
+}
+
+/* Determine the overhead due to FRL Map charecters.
+ * In a bandwidth constrained application, the FRL packets will be long,
+ * there will typically be two FRL Map Charecters per Super Block most of the time.
+ * When a tracnsition occurs between Hactive and Hblank (uncomperssed video) or
+ * HCactive and HCblank (compressed video transport), there may be a
+ * third FRL Map Charected. Therefore this spec assumes 2.5 FRL Map Charecters
+ * per Super Block.
+ */
+static u32 drm_get_overhead_frl_map_char(u32 lanes)
+{
+	return (25  * EFFICIENCY_MULTIPLIER) / (10 * drm_get_frl_char_per_super_blk(lanes));
+}
+
+/* Total minimum overhead multiplied by EFFICIENCY_MULIPLIER */
+static u32 drm_get_total_minimum_overhead(u32 lanes)
+{
+	u32 total_overhead_min;
+	u32 overhead_sb = drm_get_overhead_super_blk(lanes);
+	u32 overhead_rs = drm_get_overhead_rs(lanes);
+	u32 overhead_map = drm_get_overhead_frl_map_char(lanes);
+
+	total_overhead_min = overhead_sb + overhead_rs + overhead_map;
+
+	return total_overhead_min;
+}
+
+/*
+ * Additional margin to the overhead is provided to account for the possibility
+ * of more Map Charecters, zero padding at the end of HCactive, and other minor
+ * items
+ */
+static u32 drm_get_max_overhead(u32 total_overhead_min)
+{
+	u32 total_overhead_max;
+
+	total_overhead_max = total_overhead_min + OVERHEAD_M;
+	return total_overhead_max;
+}
+
+/* Collect the link charecteristics */
+
+/* Determine the maximum legal pixel rate */
+static u32 drm_get_max_legal_pixel_rate(u32 fpixel_clock_nominal_k)
+{
+	u32 fpixel_clock_max_k = (fpixel_clock_nominal_k *
+				  (1000 + TOLERANCE_PIXEL_CLOCK)) / 1000;
+	return fpixel_clock_max_k;
+}
+
+/* Determine the minimum Video Line period */
+static u32 drm_get_min_video_line_period(u32 hactive, u32 hblank,
+					 u32 fpixel_clock_max_k)
+{
+	u32 line_time_ns;
+
+	line_time_ns = ((hactive + hblank) * FRL_TIMING_NS_MULTIPLIER) /
+		       fpixel_clock_max_k;
+	return line_time_ns;
+}
+
+/* Determine the worst-case slow FRL Bit Rate in kbps*/
+static u32 drm_get_min_frl_bit_rate(u32 frl_bit_rate_nominal_k)
+{
+	u32 frl_bit_rate_min_k;
+
+	frl_bit_rate_min_k = (frl_bit_rate_nominal_k / 1000000) *
+			     (1000000 - TOLERANCE_FRL_BIT_RATE);
+	return frl_bit_rate_min_k;
+}
+
+/* Determine the worst-case slow FRL Charecter Rate */
+static u32 drm_get_min_frl_char_rate(u32 frl_bit_rate_min_k)
+{
+	u32 frl_char_rate_min_k;
+
+	frl_char_rate_min_k = frl_bit_rate_min_k / 18;
+	return frl_char_rate_min_k;
+}
+
+/* Determine the Minimum Total FRL charecters per line period */
+static u32
+drm_get_total_frl_char_per_line_period(u32 line_time_ns, u32 frl_char_rate_min_k,
+				      u32 lanes)
+{
+	u32 frl_char_per_line_period;
+
+	frl_char_per_line_period = (line_time_ns * frl_char_rate_min_k * lanes *
+				    1000) / FRL_TIMING_NS_MULTIPLIER;
+	return frl_char_per_line_period;
+}
+
+/* Audio Support Verification Computations */
+
+/*
+ * Determine Audio Related Packet Rate considering the audio clock
+ * increased to maximim rate permitted by Tolerance Audio clock
+ */
+static u32
+drm_get_audio_pkt_rate(u32 f_audio, u32 num_audio_pkt)
+{
+	u32 audio_pkt_rate;
+
+	audio_pkt_rate = ((f_audio *  num_audio_pkt + (2 * ACR_RATE_MAX)) *
+			 (1000000 + TOLERANCE_AUDIO_CLOCK)) / 1000000;
+	return audio_pkt_rate;
+}
+
+/*
+ * Average required packets per line is
+ * Number of audio packets needed during Hblank
+ */
+static u32
+drm_get_audio_pkts_hblank(u32 audio_pkt_rate, u32 line_time_ns)
+{
+	u32 avg_audio_pkts_per_line;
+
+	avg_audio_pkts_per_line = DIV_ROUND_UP(audio_pkt_rate * line_time_ns,
+					       FRL_TIMING_NS_MULTIPLIER);
+	return avg_audio_pkts_per_line;
+}
+
+/*
+ * Minimum required Hblank assuming no Control Period RC Compression
+ * This includes Video Guard band, Two Island Guard bands, two 12 character
+ * Control Periods and 32 * AudioPackets_Line.
+ * In addition, 32 character periods are allocated for the transmission of an
+ * ACR packet
+ */
+static u32
+drm_get_audio_hblank_min(u32 audio_pkts_line)
+{
+	u32  hblank_audio_min;
+
+	hblank_audio_min = 32 + 32 * audio_pkts_line;
+	return hblank_audio_min;
+}
+
+/*
+ * During the Hblank period, Audio packets (32 frl characters each),
+ * ACR packets (32 frl characters each), Island guard band (4 total frl characters)
+ * and Video guard band (3 frl characters) do not benefit from RC compression
+ * Therefore start by determining the number of Control Characters that maybe
+ * RC compressible
+ */
+static u32
+drm_get_num_char_rc_compressible(u32 color_format,
+				 u32 bpc, u32 audio_packets_line, u32 hblank)
+{
+	u32 cfrl_free;
+	u32 kcd, k420;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc/8;
+
+	cfrl_free = max(((hblank * kcd) / k420 - 32 * audio_packets_line - 7),
+			 U32_MIN);
+	return cfrl_free;
+}
+
+/*
+ * Determine the actual number of characters made available by
+ * RC compression
+ */
+static u32
+drm_get_num_char_compression_savings(u32 cfrl_free)
+{
+	/*In order to be conservative, situations are considered where
+	 * maximum RC compression may not be possible.
+	 * Add one character each for RC break caused by:
+	 * • Island Preamble not aligned to the RC Compression
+	 * • Video Preamble not aligned to the RC Compression
+	 * • HSYNC lead edge not aligned to the RC Compression
+	 * • HSYNC trail edge not aligned to the RC Compression
+	 */
+	const u32 cfrl_margin = 4;
+	u32 cfrl_savings = max(((7 * cfrl_free) / 8) - cfrl_margin, U32_MIN);
+	return cfrl_savings;
+}
+
+static u32
+drm_get_frl_bits_per_pixel(u32 color_format, u32 bpc)
+{
+	u32 kcd, k420, bpp;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc / 8;
+
+	bpp = (24 * kcd) / k420;
+	return bpp;
+}
+
+static u32
+drm_get_video_bytes_per_line(u32 bpp, u32 hactive)
+{
+	u32 bytes_per_line;
+
+	bytes_per_line = (bpp * hactive) / 8;
+	return bytes_per_line;
+}
+
+/*
+ * Determine the required number of tribytes to carry active video
+ * per line
+ */
+static u32
+drm_get_active_video_tribytes_reqd(u32 bytes_per_line)
+{
+	u32 tribyte_active;
+
+	tribyte_active = DIV_ROUND_UP(bytes_per_line, 3);
+	return tribyte_active;
+}
+
+/* Determine the total available tribytes during the blanking period */
+static u32
+drm_get_blanking_tribytes_avail(u32 color_format,
+				u32 hblank, u32 bpc)
+{
+	u32 tribytes_blank;
+	u32 kcd, k420;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR420)
+		k420 = 2;
+	else
+		k420 = 1;
+
+	if (color_format == DRM_COLOR_FORMAT_YCBCR422)
+		kcd = 1;
+	else
+		kcd = bpc / 8;
+
+	tribytes_blank = (hblank * kcd) / k420;
+	return tribytes_blank;
+}
+
+/* Determine the average tribyte rate in kilo tribytes per sec */
+static u32
+drm_get_avg_tribyte_rate(u32 pixel_clk_max_khz, u32 tb_active, u32 tb_blank,
+			 u32 hactive, u32 hblank)
+{
+	u32 ftb_avg_k;
+
+	ftb_avg_k = (pixel_clk_max_khz * (tb_active + tb_blank)) / (hactive + hblank);
+	return ftb_avg_k;
+}
+
+/*
+ * Determine the time required to transmit the active portion of the
+ * minimum possible active line period in the base timing
+ */
+static u32
+drm_get_tactive_ref(u32 line_time_ns, u32 hblank, u32 hactive)
+{
+	u32 tactive_ref_ns;
+
+	tactive_ref_ns = (line_time_ns * hactive) / (hblank + hactive);
+	return tactive_ref_ns;
+}
+
+/*
+ * Determine the time required to transmit the Video blanking portion
+ * of the minimum possible active line period in the base timing
+ */
+static u32
+drm_get_tblank_ref(u32 line_time_ns, u32 hblank, u32 hactive)
+{
+	u32 tblank_ref_ns;
+
+	tblank_ref_ns = (line_time_ns * hactive) / (hblank + hactive);
+	return tblank_ref_ns;
+}
+
+/*
+ * Determine the minimum time necessary to transmit the active tribytes
+ * considering frl bandwidth limitation.
+ * Given the available bandwidth (i.e after overhead is considered),
+ * tactive_min represents the amount of time needed to transmit all the
+ * active data
+ */
+static u32
+drm_get_tactive_min(u32 num_lanes, u32 tribyte_active,
+		    u32 overhead_max_k, u32 frl_char_min_rate_k)
+{
+	u32 tactive_min_ns, nr, dr;
+
+	nr = 3/2 * tribyte_active * FRL_TIMING_NS_MULTIPLIER;
+	dr = (num_lanes * frl_char_min_rate_k * 1000 *
+	      (EFFICIENCY_MULTIPLIER - overhead_max_k)) / EFFICIENCY_MULTIPLIER;
+	tactive_min_ns = nr / dr;
+
+	return tactive_min_ns;
+}
+
+/*
+ * Determine the minimum time necessary to transmit the video blanking
+ * tribytes considering frl bandwidth limitations
+ */
+static u32
+drm_get_tblank_min(u32 num_lanes, u32 tribyte_blank,
+		    u32 overhead_max_k, u32 frl_char_min_rate_k)
+{
+	u32 tblank_min_ns, nr, dr;
+
+	nr = tribyte_blank * FRL_TIMING_NS_MULTIPLIER;
+	dr = (num_lanes * frl_char_min_rate_k * 1000 *
+	      (EFFICIENCY_MULTIPLIER - overhead_max_k)) / EFFICIENCY_MULTIPLIER;
+	tblank_min_ns = nr / dr;
+	return tblank_min_ns;
+}
+
+/* Determine the disparity in tribytes */
+static u32
+drm_get_tribytes_borrowed(u32 tborrowed_ns, u32 ftb_avg_k)
+{
+	u32 tribytes_borrowed;
+
+	tribytes_borrowed = DIV_ROUND_UP((tborrowed_ns * ftb_avg_k * 1000),
+					 FRL_TIMING_NS_MULTIPLIER);
+	return tribytes_borrowed;
+}
+
+/*
+ * Determine the actual number of payload FRL characters required to carry each
+ * video line
+ */
+static u32
+drm_get_frl_char_payload_actual(u32 tribytes_active, u32 tribytes_blank, u32 cfrl_savings)
+{
+	u32 frl_char_payload_actual;
+
+	frl_char_payload_actual = DIV_ROUND_UP(3 * tribytes_active, 2) + tribytes_blank - cfrl_savings;
+	return frl_char_payload_actual;
+}
+
+/* Determine the payload utilization of the total number of FRL characters */
+static u32
+drm_compute_payload_utilization(u32 frl_char_payload_actual, u32 frl_char_per_line_period)
+{
+	u32 utilization;
+
+	utilization = (frl_char_payload_actual * EFFICIENCY_MULTIPLIER) / frl_char_per_line_period;
+	return utilization;
+}
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [RFC 3/5] drm/hdmi21: Add helpers to verify non-dsc DFM requirements
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
@ 2022-02-03  5:50   ` Vandita Kulkarni
  -1 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, Vandita Kulkarni, intel-gfx, laurent.pinchart

Add helpers to compute DFM variables and to verify if the
DFM requirements are met or not in non dsc cases.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 161 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     |   2 +
 2 files changed, 163 insertions(+)

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
index 8498083adf72..087905ed630a 100644
--- a/drivers/gpu/drm/drm_frl_dfm_helper.c
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -394,3 +394,164 @@ drm_compute_payload_utilization(u32 frl_char_payload_actual, u32 frl_char_per_li
 	utilization = (frl_char_payload_actual * EFFICIENCY_MULTIPLIER) / frl_char_per_line_period;
 	return utilization;
 }
+
+/* Collect link characteristics */
+static void
+drm_frl_dfm_compute_link_characteristics(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 frl_bit_rate_min_kbps;
+
+	frl_dfm->params.pixel_clock_max_khz =
+		drm_get_max_legal_pixel_rate(frl_dfm->config.pixel_clock_nominal_khz);
+	frl_dfm->params.line_time_ns =
+			drm_get_min_video_line_period(frl_dfm->config.hblank,
+						      frl_dfm->config.hactive,
+						      frl_dfm->params.pixel_clock_max_khz);
+	frl_bit_rate_min_kbps = drm_get_min_frl_bit_rate(frl_dfm->config.bit_rate_kbps);
+	frl_dfm->params.char_rate_min_kbps = drm_get_min_frl_char_rate(frl_bit_rate_min_kbps);
+	frl_dfm->params.cfrl_line =
+		drm_get_total_frl_char_per_line_period(frl_dfm->params.line_time_ns,
+						       frl_dfm->params.char_rate_min_kbps,
+						       frl_dfm->config.lanes);
+}
+
+/* Determine FRL link overhead */
+static void drm_frl_dfm_compute_max_frl_link_overhead(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 overhead_min;
+
+	overhead_min = drm_get_total_minimum_overhead(frl_dfm->config.lanes);
+	frl_dfm->params.overhead_max = drm_get_max_overhead(overhead_min);
+}
+
+/* Audio support Verification computations */
+static void
+drm_frl_dfm_compute_audio_hblank_min(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 num_audio_pkt, audio_pkt_rate;
+
+	/*
+	 * TBD: get the actual audio pkt type as described in
+	 * table 6.44 of HDMI2.1 spec to find the num_audio_pkt,
+	 * for now assume audio sample packet and audio packet
+	 * layout as 1, resulting in number of audio packets
+	 * required to carry each audio sample or audio frame
+	 * as 1
+	 */
+	num_audio_pkt = 1;
+	audio_pkt_rate = drm_get_audio_pkt_rate(frl_dfm->config.audio_hz, num_audio_pkt);
+	frl_dfm->params.num_audio_pkts_line =
+		 drm_get_audio_pkts_hblank(audio_pkt_rate, frl_dfm->params.line_time_ns);
+	frl_dfm->params.hblank_audio_min =
+		    drm_get_audio_hblank_min(frl_dfm->params.num_audio_pkts_line);
+}
+
+/*
+ * Determine the number of tribytes required for active video , blanking period
+ * with the pixel configuration
+ */
+static void
+drm_frl_dfm_compute_tbactive_tbblank(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 bpp, bytes_per_line;
+
+	bpp = drm_get_frl_bits_per_pixel(frl_dfm->config.color_format, frl_dfm->config.bpc);
+	bytes_per_line = drm_get_video_bytes_per_line(bpp, frl_dfm->config.hactive);
+
+	frl_dfm->params.tb_active = drm_get_active_video_tribytes_reqd(bytes_per_line);
+	frl_dfm->params.tb_blank =
+		drm_get_blanking_tribytes_avail(frl_dfm->config.color_format,
+						frl_dfm->config.hblank,
+						frl_dfm->config.bpc);
+}
+
+/* Verify the configuration meets the capacity requirements for the FRL configuration*/
+static bool
+drm_frl_dfm_verify_frl_capacity_requirement(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 tactive_ref_ns, tblank_ref_ns, tactive_min_ns, tblank_min_ns;
+	u32 tborrowed_ns;
+
+	frl_dfm->params.ftb_avg_k =
+			drm_get_avg_tribyte_rate(frl_dfm->params.pixel_clock_max_khz,
+						 frl_dfm->params.tb_active, frl_dfm->params.tb_blank,
+						 frl_dfm->config.hactive, frl_dfm->config.hblank);
+	tactive_ref_ns = drm_get_tactive_ref(frl_dfm->params.line_time_ns,
+					     frl_dfm->config.hblank,
+					     frl_dfm->config.hactive);
+	tblank_ref_ns = drm_get_tblank_ref(frl_dfm->params.line_time_ns,
+					   frl_dfm->config.hblank,
+					   frl_dfm->config.hactive);
+	tactive_min_ns = drm_get_tactive_min(frl_dfm->config.lanes,
+					     frl_dfm->params.tb_active,
+					     frl_dfm->params.overhead_max,
+					     frl_dfm->params.char_rate_min_kbps);
+	tblank_min_ns = drm_get_tblank_min(frl_dfm->config.lanes,
+					     frl_dfm->params.tb_blank,
+					     frl_dfm->params.overhead_max,
+					     frl_dfm->params.char_rate_min_kbps);
+
+	if ((tactive_ref_ns >= tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {
+		tborrowed_ns = 0;
+		frl_dfm->params.tb_borrowed = 0;
+		return true;
+	}
+
+	if ((tactive_ref_ns < tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {
+		tborrowed_ns = tactive_min_ns - tactive_ref_ns;
+		frl_dfm->params.tb_borrowed = drm_get_tribytes_borrowed(tborrowed_ns,
+								 frl_dfm->params.ftb_avg_k);
+		if (frl_dfm->params.tb_borrowed <= TB_BORROWED_MAX)
+			return true;
+	}
+
+	return false;
+}
+
+/* Verify utilization does not exceed capacity */
+static bool
+drm_frl_dfm_verify_utilization_possible(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 cfrl_free, cfrl_savings, frl_char_payload_actual;
+	u32 utilization, margin;
+
+	cfrl_free = drm_get_num_char_rc_compressible(frl_dfm->config.color_format,
+						     frl_dfm->config.bpc,
+						     frl_dfm->params.num_audio_pkts_line,
+						     frl_dfm->config.hblank);
+	cfrl_savings = drm_get_num_char_compression_savings(cfrl_free);
+	frl_char_payload_actual = drm_get_frl_char_payload_actual(frl_dfm->params.tb_active,
+								  frl_dfm->params.tb_blank,
+								  cfrl_savings);
+	utilization = drm_compute_payload_utilization(frl_char_payload_actual,
+							frl_dfm->params.cfrl_line);
+
+	margin = 1000 - (utilization + frl_dfm->params.overhead_max);
+
+	if (margin > 0)
+		return true;
+
+	return false;
+}
+
+/* Check if DFM requirement is met */
+bool
+drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	bool frl_capacity_req_met;
+
+	drm_frl_dfm_compute_max_frl_link_overhead(frl_dfm);
+	drm_frl_dfm_compute_link_characteristics(frl_dfm);
+	drm_frl_dfm_compute_audio_hblank_min(frl_dfm);
+	drm_frl_dfm_compute_tbactive_tbblank(frl_dfm);
+
+	frl_capacity_req_met = drm_frl_dfm_verify_frl_capacity_requirement(frl_dfm);
+
+	if (frl_capacity_req_met)
+		return drm_frl_dfm_verify_utilization_possible(frl_dfm);
+
+	return false;
+}
+EXPORT_SYMBOL(drm_frl_dfm_nondsc_requirement_met);
diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
index 16b8fcc7cbcc..f36b6898e9dd 100644
--- a/include/drm/drm_frl_dfm_helper.h
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -123,4 +123,6 @@ struct drm_hdmi_frl_dfm {
 	struct drm_frl_dfm_params params;
 };
 
+bool drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
+
 #endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 3/5] drm/hdmi21: Add helpers to verify non-dsc DFM requirements
@ 2022-02-03  5:50   ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

Add helpers to compute DFM variables and to verify if the
DFM requirements are met or not in non dsc cases.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 161 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     |   2 +
 2 files changed, 163 insertions(+)

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
index 8498083adf72..087905ed630a 100644
--- a/drivers/gpu/drm/drm_frl_dfm_helper.c
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -394,3 +394,164 @@ drm_compute_payload_utilization(u32 frl_char_payload_actual, u32 frl_char_per_li
 	utilization = (frl_char_payload_actual * EFFICIENCY_MULTIPLIER) / frl_char_per_line_period;
 	return utilization;
 }
+
+/* Collect link characteristics */
+static void
+drm_frl_dfm_compute_link_characteristics(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 frl_bit_rate_min_kbps;
+
+	frl_dfm->params.pixel_clock_max_khz =
+		drm_get_max_legal_pixel_rate(frl_dfm->config.pixel_clock_nominal_khz);
+	frl_dfm->params.line_time_ns =
+			drm_get_min_video_line_period(frl_dfm->config.hblank,
+						      frl_dfm->config.hactive,
+						      frl_dfm->params.pixel_clock_max_khz);
+	frl_bit_rate_min_kbps = drm_get_min_frl_bit_rate(frl_dfm->config.bit_rate_kbps);
+	frl_dfm->params.char_rate_min_kbps = drm_get_min_frl_char_rate(frl_bit_rate_min_kbps);
+	frl_dfm->params.cfrl_line =
+		drm_get_total_frl_char_per_line_period(frl_dfm->params.line_time_ns,
+						       frl_dfm->params.char_rate_min_kbps,
+						       frl_dfm->config.lanes);
+}
+
+/* Determine FRL link overhead */
+static void drm_frl_dfm_compute_max_frl_link_overhead(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 overhead_min;
+
+	overhead_min = drm_get_total_minimum_overhead(frl_dfm->config.lanes);
+	frl_dfm->params.overhead_max = drm_get_max_overhead(overhead_min);
+}
+
+/* Audio support Verification computations */
+static void
+drm_frl_dfm_compute_audio_hblank_min(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 num_audio_pkt, audio_pkt_rate;
+
+	/*
+	 * TBD: get the actual audio pkt type as described in
+	 * table 6.44 of HDMI2.1 spec to find the num_audio_pkt,
+	 * for now assume audio sample packet and audio packet
+	 * layout as 1, resulting in number of audio packets
+	 * required to carry each audio sample or audio frame
+	 * as 1
+	 */
+	num_audio_pkt = 1;
+	audio_pkt_rate = drm_get_audio_pkt_rate(frl_dfm->config.audio_hz, num_audio_pkt);
+	frl_dfm->params.num_audio_pkts_line =
+		 drm_get_audio_pkts_hblank(audio_pkt_rate, frl_dfm->params.line_time_ns);
+	frl_dfm->params.hblank_audio_min =
+		    drm_get_audio_hblank_min(frl_dfm->params.num_audio_pkts_line);
+}
+
+/*
+ * Determine the number of tribytes required for active video , blanking period
+ * with the pixel configuration
+ */
+static void
+drm_frl_dfm_compute_tbactive_tbblank(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 bpp, bytes_per_line;
+
+	bpp = drm_get_frl_bits_per_pixel(frl_dfm->config.color_format, frl_dfm->config.bpc);
+	bytes_per_line = drm_get_video_bytes_per_line(bpp, frl_dfm->config.hactive);
+
+	frl_dfm->params.tb_active = drm_get_active_video_tribytes_reqd(bytes_per_line);
+	frl_dfm->params.tb_blank =
+		drm_get_blanking_tribytes_avail(frl_dfm->config.color_format,
+						frl_dfm->config.hblank,
+						frl_dfm->config.bpc);
+}
+
+/* Verify the configuration meets the capacity requirements for the FRL configuration*/
+static bool
+drm_frl_dfm_verify_frl_capacity_requirement(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 tactive_ref_ns, tblank_ref_ns, tactive_min_ns, tblank_min_ns;
+	u32 tborrowed_ns;
+
+	frl_dfm->params.ftb_avg_k =
+			drm_get_avg_tribyte_rate(frl_dfm->params.pixel_clock_max_khz,
+						 frl_dfm->params.tb_active, frl_dfm->params.tb_blank,
+						 frl_dfm->config.hactive, frl_dfm->config.hblank);
+	tactive_ref_ns = drm_get_tactive_ref(frl_dfm->params.line_time_ns,
+					     frl_dfm->config.hblank,
+					     frl_dfm->config.hactive);
+	tblank_ref_ns = drm_get_tblank_ref(frl_dfm->params.line_time_ns,
+					   frl_dfm->config.hblank,
+					   frl_dfm->config.hactive);
+	tactive_min_ns = drm_get_tactive_min(frl_dfm->config.lanes,
+					     frl_dfm->params.tb_active,
+					     frl_dfm->params.overhead_max,
+					     frl_dfm->params.char_rate_min_kbps);
+	tblank_min_ns = drm_get_tblank_min(frl_dfm->config.lanes,
+					     frl_dfm->params.tb_blank,
+					     frl_dfm->params.overhead_max,
+					     frl_dfm->params.char_rate_min_kbps);
+
+	if ((tactive_ref_ns >= tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {
+		tborrowed_ns = 0;
+		frl_dfm->params.tb_borrowed = 0;
+		return true;
+	}
+
+	if ((tactive_ref_ns < tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {
+		tborrowed_ns = tactive_min_ns - tactive_ref_ns;
+		frl_dfm->params.tb_borrowed = drm_get_tribytes_borrowed(tborrowed_ns,
+								 frl_dfm->params.ftb_avg_k);
+		if (frl_dfm->params.tb_borrowed <= TB_BORROWED_MAX)
+			return true;
+	}
+
+	return false;
+}
+
+/* Verify utilization does not exceed capacity */
+static bool
+drm_frl_dfm_verify_utilization_possible(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 cfrl_free, cfrl_savings, frl_char_payload_actual;
+	u32 utilization, margin;
+
+	cfrl_free = drm_get_num_char_rc_compressible(frl_dfm->config.color_format,
+						     frl_dfm->config.bpc,
+						     frl_dfm->params.num_audio_pkts_line,
+						     frl_dfm->config.hblank);
+	cfrl_savings = drm_get_num_char_compression_savings(cfrl_free);
+	frl_char_payload_actual = drm_get_frl_char_payload_actual(frl_dfm->params.tb_active,
+								  frl_dfm->params.tb_blank,
+								  cfrl_savings);
+	utilization = drm_compute_payload_utilization(frl_char_payload_actual,
+							frl_dfm->params.cfrl_line);
+
+	margin = 1000 - (utilization + frl_dfm->params.overhead_max);
+
+	if (margin > 0)
+		return true;
+
+	return false;
+}
+
+/* Check if DFM requirement is met */
+bool
+drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	bool frl_capacity_req_met;
+
+	drm_frl_dfm_compute_max_frl_link_overhead(frl_dfm);
+	drm_frl_dfm_compute_link_characteristics(frl_dfm);
+	drm_frl_dfm_compute_audio_hblank_min(frl_dfm);
+	drm_frl_dfm_compute_tbactive_tbblank(frl_dfm);
+
+	frl_capacity_req_met = drm_frl_dfm_verify_frl_capacity_requirement(frl_dfm);
+
+	if (frl_capacity_req_met)
+		return drm_frl_dfm_verify_utilization_possible(frl_dfm);
+
+	return false;
+}
+EXPORT_SYMBOL(drm_frl_dfm_nondsc_requirement_met);
diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
index 16b8fcc7cbcc..f36b6898e9dd 100644
--- a/include/drm/drm_frl_dfm_helper.h
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -123,4 +123,6 @@ struct drm_hdmi_frl_dfm {
 	struct drm_frl_dfm_params params;
 };
 
+bool drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
+
 #endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [RFC 4/5] drm/hdmi21: Add support for DFM calculation with DSC
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
@ 2022-02-03  5:50   ` Vandita Kulkarni
  -1 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel
  Cc: jani.nikula, intel-gfx, Vandita Kulkarni, laurent.pinchart,
	Ankit Nautiyal

From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Add helper functions for calculating FRL capacity and DFM
requirements with given compressed bpp.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 298 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     |   3 +
 2 files changed, 301 insertions(+)

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
index 087905ed630a..dbdcc509f791 100644
--- a/drivers/gpu/drm/drm_frl_dfm_helper.c
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -555,3 +555,301 @@ drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
 	return false;
 }
 EXPORT_SYMBOL(drm_frl_dfm_nondsc_requirement_met);
+
+/* DSC DFM functions */
+/* Get FRL Available characters */
+static u32
+drm_get_frl_available_chars(u32 overhead_max, u32 cfrl_line)
+{
+	u32 frl_char_avlb = ((EFFICIENCY_MULTIPLIER - overhead_max) * cfrl_line);
+
+	return frl_char_avlb / EFFICIENCY_MULTIPLIER;
+}
+
+/* Get required no. of tribytes during HCActive */
+static u32
+drm_get_frl_hcactive_tb_target(u32 dsc_bpp_x16, u32 slice_width, u32 num_slices)
+{
+	u32 bytes_target;
+
+	bytes_target = num_slices * DIV_ROUND_UP(dsc_bpp_x16 * slice_width,
+						 8 * BPP_MULTIPLIER);
+
+	return DIV_ROUND_UP(bytes_target, 3);
+}
+
+/* Get required no. of tribytes (estimate1) during HCBlank */
+static u32
+drm_get_frl_hcblank_tb_est1_target(u32 hcactive_target_tb,
+				   u32 hactive, u32 hblank)
+{
+	return DIV_ROUND_UP(hcactive_target_tb * hblank, hactive);
+}
+
+/* Get required no. of tribytes during HCBlank */
+static u32
+drm_get_frl_hcblank_tb_target(u32 hcactive_target_tb, u32 hactive, u32 hblank,
+			      u32 hcblank_audio_min, u32 cfrl_available)
+{
+	u32 hcblank_target_tb1 = drm_get_frl_hcblank_tb_est1_target(hcactive_target_tb,
+								    hactive, hblank);
+	u32 hcblank_target_tb2 = max(hcblank_target_tb1, hcblank_audio_min);
+
+	return 4 * (min(hcblank_target_tb2,
+			(2 * cfrl_available - 3 * hcactive_target_tb) / 2) / 4);
+}
+
+/* Get the avg no of tribytes sent per sec (Kbps) */
+static u64
+drm_frl_dsc_get_ftb_avg(u32 hcactive_target_tb, u32 hcblank_target_tb,
+			u32 hactive, u32 hblank,
+			u64 fpixelclock_max_khz)
+{
+	return (hcactive_target_tb + hcblank_target_tb) * (fpixelclock_max_khz / (hactive + hblank));
+}
+
+/* Time to send Active tribytes in nanoseconds */
+static u32
+drm_frl_dsc_get_tactive_ref_ns(u32 line_time_ns, u32 hactive, u32 hblank)
+{
+	return (line_time_ns * hactive) / (hactive + hblank);
+}
+
+/* Time to send Blanking tribytes in nanoseconds  */
+static u32
+drm_frl_dsc_get_tblank_ref_ns(u32 line_time_ns, u32 hactive, u32 hblank)
+{
+	return (line_time_ns * hblank) / (hactive + hblank);
+}
+
+/* Get time to send all tribytes in hcactive region in nsec*/
+static u32
+drm_frl_dsc_tactive_target_ns(u32 frl_lanes, u32 hcactive_target_tb, u64 ftb_avg_k,
+			      u32 min_frl_char_rate_k, u32 overhead_max)
+{
+	u32 avg_tribyte_time_ns, tribyte_time_ns;
+	u32 num_chars_hcactive;
+	u32 frl_char_rate_k;
+
+	/* Avg time to transmit all active region tribytes */
+	avg_tribyte_time_ns = (hcactive_target_tb * FRL_TIMING_NS_MULTIPLIER) /
+			      (ftb_avg_k * 1000);
+
+	/*
+	 * 2 bytes in active region = 1 FRL characters
+	 * 1 Tribyte in active region = 3/2 FRL characters
+	 */
+
+	num_chars_hcactive = (hcactive_target_tb * 3) / 2;
+
+	/*
+	 * FRL rate = lanes * frl character rate
+	 * But actual bandwidth wil be less, due to FRL limitations so account
+	 * for the overhead involved.
+	 * FRL rate with overhead = FRL rate * (100 - overhead %) / 100
+	 */
+	frl_char_rate_k = frl_lanes * min_frl_char_rate_k;
+	frl_char_rate_k = (frl_char_rate_k * (EFFICIENCY_MULTIPLIER - overhead_max)) /
+			  EFFICIENCY_MULTIPLIER;
+
+	/* Time to transmit all characters with FRL limitations */
+	tribyte_time_ns = (num_chars_hcactive * FRL_TIMING_NS_MULTIPLIER) /
+			  frl_char_rate_k * 1000;
+
+	return max(avg_tribyte_time_ns, tribyte_time_ns);
+}
+
+/* Get no. of tri bytes borrowed with DSC enabled */
+static u32
+drm_frl_get_dsc_tri_bytes_borrowed(u32 tactive_target_ns, u32 ftb_avg_k,
+				   u32 hcactive_target_tb)
+{
+	return (tactive_target_ns * FRL_TIMING_NS_MULTIPLIER * ftb_avg_k * 1000) -
+		hcactive_target_tb;
+}
+
+/* Get TBdelta */
+static u32
+drm_frl_get_dsc_tri_bytes_delta(u32 tactive_target_ns, u32 tactive_ref_ns,
+				u32 hcactive_target_tb, u32 ftb_avg_k,
+				u32 hactive, u32 hblank, u32 line_time_ns)
+{
+	u32 tb_delta_limit;
+	u32 tblank_target_ns = line_time_ns - tactive_target_ns;
+	u32 tblank_ref_ns = line_time_ns - tactive_ref_ns;
+	u32 hcblank_target_tb1 = drm_get_frl_hcblank_tb_est1_target(hcactive_target_tb,
+								    hactive, hblank);
+
+	if (tblank_ref_ns < tblank_target_ns) {
+		tb_delta_limit = (((tactive_ref_ns * FRL_TIMING_NS_MULTIPLIER) - (hcactive_target_tb/(ftb_avg_k * 1000))) *
+				 (hcactive_target_tb + hcblank_target_tb1)) /
+				 (line_time_ns * FRL_TIMING_NS_MULTIPLIER);
+	} else {
+		u32 _tb_delta_ns;
+
+		if (tactive_target_ns > tactive_ref_ns)
+			_tb_delta_ns = tactive_target_ns - tactive_ref_ns;
+		else
+			_tb_delta_ns = tactive_ref_ns - tactive_target_ns;
+		tb_delta_limit = (_tb_delta_ns * (hcactive_target_tb + hcblank_target_tb1)) / line_time_ns;
+	}
+
+	return tb_delta_limit;
+}
+
+/* Compute hcactive and hcblank tribytes for given dsc bpp setting */
+static void
+drm_frl_dfm_dsc_compute_tribytes(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+
+	u32 hcactive_target_tb;
+	u32 hcblank_target_tb;
+	u32 cfrl_available;
+	u32 num_slices;
+
+	/* Assert for slice width ?*/
+	if (!frl_dfm->config.slice_width)
+		return;
+
+	num_slices = DIV_ROUND_UP(frl_dfm->config.hactive, frl_dfm->config.slice_width);
+
+	hcactive_target_tb = drm_get_frl_hcactive_tb_target(frl_dfm->config.target_bpp_16,
+							    frl_dfm->config.slice_width,
+							    num_slices);
+
+	cfrl_available =
+		drm_get_frl_available_chars(frl_dfm->params.overhead_max,
+					    frl_dfm->params.cfrl_line);
+
+	hcblank_target_tb =
+		drm_get_frl_hcblank_tb_target(hcactive_target_tb,
+					      frl_dfm->config.hactive,
+					      frl_dfm->config.hblank,
+					      frl_dfm->params.hblank_audio_min,
+					      cfrl_available);
+
+	frl_dfm->params.hcactive_target = hcactive_target_tb;
+	frl_dfm->params.hcblank_target = hcblank_target_tb;
+}
+
+/* Check if audio supported with given dsc bpp and frl bandwidth */
+static bool
+drm_frl_dfm_dsc_audio_supported(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	return frl_dfm->params.hcblank_target < frl_dfm->params.hblank_audio_min;
+}
+
+/* Is DFM timing requirement is met with DSC */
+static
+bool drm_frl_dfm_dsc_is_timing_req_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 ftb_avg_k;
+	u32 tactive_ref_ns, tblank_ref_ns, tactive_target_ns, tblank_target_ns;
+	u32 tb_borrowed, tb_delta, tb_worst;
+
+	ftb_avg_k = drm_frl_dsc_get_ftb_avg(frl_dfm->params.hcactive_target,
+					    frl_dfm->params.hcblank_target,
+					    frl_dfm->config.hactive,
+					    frl_dfm->config.hblank,
+					    frl_dfm->params.pixel_clock_max_khz);
+
+	tactive_ref_ns = drm_frl_dsc_get_tactive_ref_ns(frl_dfm->params.line_time_ns,
+							frl_dfm->config.hactive,
+							frl_dfm->config.hblank);
+
+	tblank_ref_ns = drm_frl_dsc_get_tblank_ref_ns(frl_dfm->params.line_time_ns,
+						      frl_dfm->config.hactive,
+						      frl_dfm->config.hblank);
+
+	tactive_target_ns = drm_frl_dsc_tactive_target_ns(frl_dfm->config.lanes,
+							  frl_dfm->params.hcactive_target,
+							  ftb_avg_k,
+							  frl_dfm->params.char_rate_min_kbps,
+							  frl_dfm->params.overhead_max);
+
+	tblank_target_ns = frl_dfm->params.line_time_ns - tactive_target_ns;
+
+	tb_borrowed = drm_frl_get_dsc_tri_bytes_borrowed(tactive_target_ns,
+							 ftb_avg_k,
+							 frl_dfm->params.hcactive_target);
+
+	tb_delta = drm_frl_get_dsc_tri_bytes_delta(tactive_target_ns,
+						   tactive_ref_ns,
+						   frl_dfm->params.hcactive_target,
+						   ftb_avg_k,
+						   frl_dfm->config.hactive,
+						   frl_dfm->config.hblank,
+						   frl_dfm->params.line_time_ns);
+
+	tb_worst = max(tb_borrowed, tb_delta);
+	if (tb_worst > TB_BORROWED_MAX)
+		return false;
+
+	frl_dfm->params.ftb_avg_k = ftb_avg_k;
+	frl_dfm->params.tb_borrowed = tb_borrowed;
+
+	return true;
+}
+
+/* Check Utilization constraint with DSC */
+static bool
+drm_frl_dsc_check_utilization(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 hcactive_target_tb = frl_dfm->params.hcactive_target;
+	u32 hcblank_target_tb = frl_dfm->params.hcblank_target;
+	u32 frl_char_per_line = frl_dfm->params.cfrl_line;
+	u32 overhead_max = frl_dfm->params.overhead_max;
+	u32 actual_frl_char_payload;
+	u32 utilization;
+	u32 utilization_with_overhead;
+
+	/* Note:
+	 * 1 FRL characters per 2 bytes in active period
+	 * 1 FRL char per byte in Blanking period
+	 */
+	actual_frl_char_payload = DIV_ROUND_UP(3 * hcactive_target_tb, 2) +
+				  hcblank_target_tb;
+
+	utilization = (actual_frl_char_payload * EFFICIENCY_MULTIPLIER) /
+		      frl_char_per_line;
+
+	/*
+	 * Utilization with overhead = utlization% +overhead %
+	 * should be less than 100%
+	 */
+	utilization_with_overhead = utilization + overhead_max;
+	if (utilization_with_overhead  > EFFICIENCY_MULTIPLIER)
+		return false;
+
+	return false;
+}
+
+/*
+ * drm_frl_fm_dsc_requirement_met : Check if FRL DFM requirements are met with
+ * the given bpp.
+ * @frl_dfm: dfm structure
+ *
+ * Returns true if the frl dfm requirements are met, else returns false.
+ */
+bool drm_frl_dfm_dsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	if (!frl_dfm->config.slice_width || !frl_dfm->config.target_bpp_16)
+		return false;
+
+	drm_frl_dfm_compute_max_frl_link_overhead(frl_dfm);
+	drm_frl_dfm_compute_link_characteristics(frl_dfm);
+	drm_frl_dfm_compute_audio_hblank_min(frl_dfm);
+	drm_frl_dfm_dsc_compute_tribytes(frl_dfm);
+
+	if (!drm_frl_dfm_dsc_audio_supported(frl_dfm))
+		return false;
+
+	if (!drm_frl_dfm_dsc_is_timing_req_met(frl_dfm))
+		return false;
+
+	if (!drm_frl_dsc_check_utilization(frl_dfm))
+		return false;
+
+	return true;
+}
+EXPORT_SYMBOL(drm_frl_dfm_dsc_requirement_met);
diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
index f36b6898e9dd..5430b9044d63 100644
--- a/include/drm/drm_frl_dfm_helper.h
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -125,4 +125,7 @@ struct drm_hdmi_frl_dfm {
 
 bool drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
 
+bool
+drm_frl_dfm_dsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
+
 #endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 4/5] drm/hdmi21: Add support for DFM calculation with DSC
@ 2022-02-03  5:50   ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Add helper functions for calculating FRL capacity and DFM
requirements with given compressed bpp.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/drm_frl_dfm_helper.c | 298 +++++++++++++++++++++++++++
 include/drm/drm_frl_dfm_helper.h     |   3 +
 2 files changed, 301 insertions(+)

diff --git a/drivers/gpu/drm/drm_frl_dfm_helper.c b/drivers/gpu/drm/drm_frl_dfm_helper.c
index 087905ed630a..dbdcc509f791 100644
--- a/drivers/gpu/drm/drm_frl_dfm_helper.c
+++ b/drivers/gpu/drm/drm_frl_dfm_helper.c
@@ -555,3 +555,301 @@ drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
 	return false;
 }
 EXPORT_SYMBOL(drm_frl_dfm_nondsc_requirement_met);
+
+/* DSC DFM functions */
+/* Get FRL Available characters */
+static u32
+drm_get_frl_available_chars(u32 overhead_max, u32 cfrl_line)
+{
+	u32 frl_char_avlb = ((EFFICIENCY_MULTIPLIER - overhead_max) * cfrl_line);
+
+	return frl_char_avlb / EFFICIENCY_MULTIPLIER;
+}
+
+/* Get required no. of tribytes during HCActive */
+static u32
+drm_get_frl_hcactive_tb_target(u32 dsc_bpp_x16, u32 slice_width, u32 num_slices)
+{
+	u32 bytes_target;
+
+	bytes_target = num_slices * DIV_ROUND_UP(dsc_bpp_x16 * slice_width,
+						 8 * BPP_MULTIPLIER);
+
+	return DIV_ROUND_UP(bytes_target, 3);
+}
+
+/* Get required no. of tribytes (estimate1) during HCBlank */
+static u32
+drm_get_frl_hcblank_tb_est1_target(u32 hcactive_target_tb,
+				   u32 hactive, u32 hblank)
+{
+	return DIV_ROUND_UP(hcactive_target_tb * hblank, hactive);
+}
+
+/* Get required no. of tribytes during HCBlank */
+static u32
+drm_get_frl_hcblank_tb_target(u32 hcactive_target_tb, u32 hactive, u32 hblank,
+			      u32 hcblank_audio_min, u32 cfrl_available)
+{
+	u32 hcblank_target_tb1 = drm_get_frl_hcblank_tb_est1_target(hcactive_target_tb,
+								    hactive, hblank);
+	u32 hcblank_target_tb2 = max(hcblank_target_tb1, hcblank_audio_min);
+
+	return 4 * (min(hcblank_target_tb2,
+			(2 * cfrl_available - 3 * hcactive_target_tb) / 2) / 4);
+}
+
+/* Get the avg no of tribytes sent per sec (Kbps) */
+static u64
+drm_frl_dsc_get_ftb_avg(u32 hcactive_target_tb, u32 hcblank_target_tb,
+			u32 hactive, u32 hblank,
+			u64 fpixelclock_max_khz)
+{
+	return (hcactive_target_tb + hcblank_target_tb) * (fpixelclock_max_khz / (hactive + hblank));
+}
+
+/* Time to send Active tribytes in nanoseconds */
+static u32
+drm_frl_dsc_get_tactive_ref_ns(u32 line_time_ns, u32 hactive, u32 hblank)
+{
+	return (line_time_ns * hactive) / (hactive + hblank);
+}
+
+/* Time to send Blanking tribytes in nanoseconds  */
+static u32
+drm_frl_dsc_get_tblank_ref_ns(u32 line_time_ns, u32 hactive, u32 hblank)
+{
+	return (line_time_ns * hblank) / (hactive + hblank);
+}
+
+/* Get time to send all tribytes in hcactive region in nsec*/
+static u32
+drm_frl_dsc_tactive_target_ns(u32 frl_lanes, u32 hcactive_target_tb, u64 ftb_avg_k,
+			      u32 min_frl_char_rate_k, u32 overhead_max)
+{
+	u32 avg_tribyte_time_ns, tribyte_time_ns;
+	u32 num_chars_hcactive;
+	u32 frl_char_rate_k;
+
+	/* Avg time to transmit all active region tribytes */
+	avg_tribyte_time_ns = (hcactive_target_tb * FRL_TIMING_NS_MULTIPLIER) /
+			      (ftb_avg_k * 1000);
+
+	/*
+	 * 2 bytes in active region = 1 FRL characters
+	 * 1 Tribyte in active region = 3/2 FRL characters
+	 */
+
+	num_chars_hcactive = (hcactive_target_tb * 3) / 2;
+
+	/*
+	 * FRL rate = lanes * frl character rate
+	 * But actual bandwidth wil be less, due to FRL limitations so account
+	 * for the overhead involved.
+	 * FRL rate with overhead = FRL rate * (100 - overhead %) / 100
+	 */
+	frl_char_rate_k = frl_lanes * min_frl_char_rate_k;
+	frl_char_rate_k = (frl_char_rate_k * (EFFICIENCY_MULTIPLIER - overhead_max)) /
+			  EFFICIENCY_MULTIPLIER;
+
+	/* Time to transmit all characters with FRL limitations */
+	tribyte_time_ns = (num_chars_hcactive * FRL_TIMING_NS_MULTIPLIER) /
+			  frl_char_rate_k * 1000;
+
+	return max(avg_tribyte_time_ns, tribyte_time_ns);
+}
+
+/* Get no. of tri bytes borrowed with DSC enabled */
+static u32
+drm_frl_get_dsc_tri_bytes_borrowed(u32 tactive_target_ns, u32 ftb_avg_k,
+				   u32 hcactive_target_tb)
+{
+	return (tactive_target_ns * FRL_TIMING_NS_MULTIPLIER * ftb_avg_k * 1000) -
+		hcactive_target_tb;
+}
+
+/* Get TBdelta */
+static u32
+drm_frl_get_dsc_tri_bytes_delta(u32 tactive_target_ns, u32 tactive_ref_ns,
+				u32 hcactive_target_tb, u32 ftb_avg_k,
+				u32 hactive, u32 hblank, u32 line_time_ns)
+{
+	u32 tb_delta_limit;
+	u32 tblank_target_ns = line_time_ns - tactive_target_ns;
+	u32 tblank_ref_ns = line_time_ns - tactive_ref_ns;
+	u32 hcblank_target_tb1 = drm_get_frl_hcblank_tb_est1_target(hcactive_target_tb,
+								    hactive, hblank);
+
+	if (tblank_ref_ns < tblank_target_ns) {
+		tb_delta_limit = (((tactive_ref_ns * FRL_TIMING_NS_MULTIPLIER) - (hcactive_target_tb/(ftb_avg_k * 1000))) *
+				 (hcactive_target_tb + hcblank_target_tb1)) /
+				 (line_time_ns * FRL_TIMING_NS_MULTIPLIER);
+	} else {
+		u32 _tb_delta_ns;
+
+		if (tactive_target_ns > tactive_ref_ns)
+			_tb_delta_ns = tactive_target_ns - tactive_ref_ns;
+		else
+			_tb_delta_ns = tactive_ref_ns - tactive_target_ns;
+		tb_delta_limit = (_tb_delta_ns * (hcactive_target_tb + hcblank_target_tb1)) / line_time_ns;
+	}
+
+	return tb_delta_limit;
+}
+
+/* Compute hcactive and hcblank tribytes for given dsc bpp setting */
+static void
+drm_frl_dfm_dsc_compute_tribytes(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+
+	u32 hcactive_target_tb;
+	u32 hcblank_target_tb;
+	u32 cfrl_available;
+	u32 num_slices;
+
+	/* Assert for slice width ?*/
+	if (!frl_dfm->config.slice_width)
+		return;
+
+	num_slices = DIV_ROUND_UP(frl_dfm->config.hactive, frl_dfm->config.slice_width);
+
+	hcactive_target_tb = drm_get_frl_hcactive_tb_target(frl_dfm->config.target_bpp_16,
+							    frl_dfm->config.slice_width,
+							    num_slices);
+
+	cfrl_available =
+		drm_get_frl_available_chars(frl_dfm->params.overhead_max,
+					    frl_dfm->params.cfrl_line);
+
+	hcblank_target_tb =
+		drm_get_frl_hcblank_tb_target(hcactive_target_tb,
+					      frl_dfm->config.hactive,
+					      frl_dfm->config.hblank,
+					      frl_dfm->params.hblank_audio_min,
+					      cfrl_available);
+
+	frl_dfm->params.hcactive_target = hcactive_target_tb;
+	frl_dfm->params.hcblank_target = hcblank_target_tb;
+}
+
+/* Check if audio supported with given dsc bpp and frl bandwidth */
+static bool
+drm_frl_dfm_dsc_audio_supported(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	return frl_dfm->params.hcblank_target < frl_dfm->params.hblank_audio_min;
+}
+
+/* Is DFM timing requirement is met with DSC */
+static
+bool drm_frl_dfm_dsc_is_timing_req_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 ftb_avg_k;
+	u32 tactive_ref_ns, tblank_ref_ns, tactive_target_ns, tblank_target_ns;
+	u32 tb_borrowed, tb_delta, tb_worst;
+
+	ftb_avg_k = drm_frl_dsc_get_ftb_avg(frl_dfm->params.hcactive_target,
+					    frl_dfm->params.hcblank_target,
+					    frl_dfm->config.hactive,
+					    frl_dfm->config.hblank,
+					    frl_dfm->params.pixel_clock_max_khz);
+
+	tactive_ref_ns = drm_frl_dsc_get_tactive_ref_ns(frl_dfm->params.line_time_ns,
+							frl_dfm->config.hactive,
+							frl_dfm->config.hblank);
+
+	tblank_ref_ns = drm_frl_dsc_get_tblank_ref_ns(frl_dfm->params.line_time_ns,
+						      frl_dfm->config.hactive,
+						      frl_dfm->config.hblank);
+
+	tactive_target_ns = drm_frl_dsc_tactive_target_ns(frl_dfm->config.lanes,
+							  frl_dfm->params.hcactive_target,
+							  ftb_avg_k,
+							  frl_dfm->params.char_rate_min_kbps,
+							  frl_dfm->params.overhead_max);
+
+	tblank_target_ns = frl_dfm->params.line_time_ns - tactive_target_ns;
+
+	tb_borrowed = drm_frl_get_dsc_tri_bytes_borrowed(tactive_target_ns,
+							 ftb_avg_k,
+							 frl_dfm->params.hcactive_target);
+
+	tb_delta = drm_frl_get_dsc_tri_bytes_delta(tactive_target_ns,
+						   tactive_ref_ns,
+						   frl_dfm->params.hcactive_target,
+						   ftb_avg_k,
+						   frl_dfm->config.hactive,
+						   frl_dfm->config.hblank,
+						   frl_dfm->params.line_time_ns);
+
+	tb_worst = max(tb_borrowed, tb_delta);
+	if (tb_worst > TB_BORROWED_MAX)
+		return false;
+
+	frl_dfm->params.ftb_avg_k = ftb_avg_k;
+	frl_dfm->params.tb_borrowed = tb_borrowed;
+
+	return true;
+}
+
+/* Check Utilization constraint with DSC */
+static bool
+drm_frl_dsc_check_utilization(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	u32 hcactive_target_tb = frl_dfm->params.hcactive_target;
+	u32 hcblank_target_tb = frl_dfm->params.hcblank_target;
+	u32 frl_char_per_line = frl_dfm->params.cfrl_line;
+	u32 overhead_max = frl_dfm->params.overhead_max;
+	u32 actual_frl_char_payload;
+	u32 utilization;
+	u32 utilization_with_overhead;
+
+	/* Note:
+	 * 1 FRL characters per 2 bytes in active period
+	 * 1 FRL char per byte in Blanking period
+	 */
+	actual_frl_char_payload = DIV_ROUND_UP(3 * hcactive_target_tb, 2) +
+				  hcblank_target_tb;
+
+	utilization = (actual_frl_char_payload * EFFICIENCY_MULTIPLIER) /
+		      frl_char_per_line;
+
+	/*
+	 * Utilization with overhead = utlization% +overhead %
+	 * should be less than 100%
+	 */
+	utilization_with_overhead = utilization + overhead_max;
+	if (utilization_with_overhead  > EFFICIENCY_MULTIPLIER)
+		return false;
+
+	return false;
+}
+
+/*
+ * drm_frl_fm_dsc_requirement_met : Check if FRL DFM requirements are met with
+ * the given bpp.
+ * @frl_dfm: dfm structure
+ *
+ * Returns true if the frl dfm requirements are met, else returns false.
+ */
+bool drm_frl_dfm_dsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm)
+{
+	if (!frl_dfm->config.slice_width || !frl_dfm->config.target_bpp_16)
+		return false;
+
+	drm_frl_dfm_compute_max_frl_link_overhead(frl_dfm);
+	drm_frl_dfm_compute_link_characteristics(frl_dfm);
+	drm_frl_dfm_compute_audio_hblank_min(frl_dfm);
+	drm_frl_dfm_dsc_compute_tribytes(frl_dfm);
+
+	if (!drm_frl_dfm_dsc_audio_supported(frl_dfm))
+		return false;
+
+	if (!drm_frl_dfm_dsc_is_timing_req_met(frl_dfm))
+		return false;
+
+	if (!drm_frl_dsc_check_utilization(frl_dfm))
+		return false;
+
+	return true;
+}
+EXPORT_SYMBOL(drm_frl_dfm_dsc_requirement_met);
diff --git a/include/drm/drm_frl_dfm_helper.h b/include/drm/drm_frl_dfm_helper.h
index f36b6898e9dd..5430b9044d63 100644
--- a/include/drm/drm_frl_dfm_helper.h
+++ b/include/drm/drm_frl_dfm_helper.h
@@ -125,4 +125,7 @@ struct drm_hdmi_frl_dfm {
 
 bool drm_frl_dfm_nondsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
 
+bool
+drm_frl_dfm_dsc_requirement_met(struct drm_hdmi_frl_dfm *frl_dfm);
+
 #endif
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [RFC 5/5] drm/hdmi21: Add frl_dfm_helper to Makefile
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
@ 2022-02-03  5:50   ` Vandita Kulkarni
  -1 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, Vandita Kulkarni, intel-gfx, laurent.pinchart

Add the new frl_dfm_helper file to drm Makefile

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 8675c2af7ae1..4fa9b48995c8 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -17,7 +17,7 @@ drm-y       :=	drm_aperture.o drm_auth.o drm_cache.o \
 		drm_dumb_buffers.o drm_mode_config.o drm_vblank.o \
 		drm_syncobj.o drm_lease.o drm_writeback.o drm_client.o \
 		drm_client_modeset.o drm_atomic_uapi.o \
-		drm_managed.o drm_vblank_work.o
+		drm_managed.o drm_vblank_work.o drm_frl_dfm_helper.o
 
 drm-$(CONFIG_DRM_LEGACY) += drm_agpsupport.o drm_bufs.o drm_context.o drm_dma.o \
 			    drm_hashtab.o drm_irq.o drm_legacy_misc.o drm_lock.o \
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [RFC 5/5] drm/hdmi21: Add frl_dfm_helper to Makefile
@ 2022-02-03  5:50   ` Vandita Kulkarni
  0 siblings, 0 replies; 16+ messages in thread
From: Vandita Kulkarni @ 2022-02-03  5:50 UTC (permalink / raw)
  To: dri-devel; +Cc: jani.nikula, intel-gfx, laurent.pinchart

Add the new frl_dfm_helper file to drm Makefile

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 8675c2af7ae1..4fa9b48995c8 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -17,7 +17,7 @@ drm-y       :=	drm_aperture.o drm_auth.o drm_cache.o \
 		drm_dumb_buffers.o drm_mode_config.o drm_vblank.o \
 		drm_syncobj.o drm_lease.o drm_writeback.o drm_client.o \
 		drm_client_modeset.o drm_atomic_uapi.o \
-		drm_managed.o drm_vblank_work.o
+		drm_managed.o drm_vblank_work.o drm_frl_dfm_helper.o
 
 drm-$(CONFIG_DRM_LEGACY) += drm_agpsupport.o drm_bufs.o drm_context.o drm_dma.o \
 			    drm_hashtab.o drm_irq.o drm_legacy_misc.o drm_lock.o \
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add data flow metering support for HDMI2.1
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
                   ` (5 preceding siblings ...)
  (?)
@ 2022-02-03 14:20 ` Patchwork
  -1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-02-03 14:20 UTC (permalink / raw)
  To: Vandita Kulkarni; +Cc: intel-gfx

== Series Details ==

Series: Add data flow metering support for HDMI2.1
URL   : https://patchwork.freedesktop.org/series/99668/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
84a5cb52aee6 drm/hdmi21: Define frl_dfm structure
-:13: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#13: 
new file mode 100644

-:40: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#40: FILE: include/drm/drm_frl_dfm_helper.h:23:
+struct drm_frl_dfm_input_config {
+

-:83: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#83: FILE: include/drm/drm_frl_dfm_helper.h:66:
+struct drm_frl_dfm_params {
+

total: 0 errors, 1 warnings, 2 checks, 126 lines checked
ef52becbce64 drm/hdmi21: Add non dsc frl capacity computation helpers
-:12: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#12: 
new file mode 100644

-:138: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#138: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:122:
+drm_get_total_frl_char_per_line_period(u32 line_time_ns, u32 frl_char_rate_min_k,
+				      u32 lanes)

-:215: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#215: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:199:
+		kcd = bpc/8;
 		         ^

-:218: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#218: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:202:
+	cfrl_free = max(((hblank * kcd) / k420 - 32 * audio_packets_line - 7),
+			 U32_MIN);

-:355: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#355: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:339:
+	nr = 3/2 * tribyte_active * FRL_TIMING_NS_MULTIPLIER;
 	      ^

-:369: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#369: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:353:
+drm_get_tblank_min(u32 num_lanes, u32 tribyte_blank,
+		    u32 overhead_max_k, u32 frl_char_min_rate_k)

-:400: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#400: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:384:
+	frl_char_payload_actual = DIV_ROUND_UP(3 * tribytes_active, 2) + tribytes_blank - cfrl_savings;

total: 0 errors, 2 warnings, 5 checks, 396 lines checked
cfe4d1abfbda drm/hdmi21: Add helpers to verify non-dsc DFM requirements
-:99: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#99: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:477:
+						 frl_dfm->params.tb_active, frl_dfm->params.tb_blank,

-:112: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#112: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:490:
+	tblank_min_ns = drm_get_tblank_min(frl_dfm->config.lanes,
+					     frl_dfm->params.tb_blank,

-:116: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'tactive_ref_ns >= tactive_min_ns'
#116: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:494:
+	if ((tactive_ref_ns >= tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {

-:116: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'tblank_ref_ns >= tblank_min_ns'
#116: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:494:
+	if ((tactive_ref_ns >= tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {

-:123: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'tactive_ref_ns < tactive_min_ns'
#123: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:501:
+	if ((tactive_ref_ns < tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {

-:123: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'tblank_ref_ns >= tblank_min_ns'
#123: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:501:
+	if ((tactive_ref_ns < tactive_min_ns) &&
+	    (tblank_ref_ns >= tblank_min_ns)) {

-:127: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#127: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:505:
+		frl_dfm->params.tb_borrowed = drm_get_tribytes_borrowed(tborrowed_ns,
+								 frl_dfm->params.ftb_avg_k);

-:151: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:529:
+	utilization = drm_compute_payload_utilization(frl_char_payload_actual,
+							frl_dfm->params.cfrl_line);

total: 0 errors, 1 warnings, 7 checks, 170 lines checked
d7bca9952da4 drm/hdmi21: Add support for DFM calculation with DSC
-:70: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#70: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:608:
+	return (hcactive_target_tb + hcblank_target_tb) * (fpixelclock_max_khz / (hactive + hblank));

-:146: WARNING:LONG_LINE: line length of 123 exceeds 100 columns
#146: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:684:
+		tb_delta_limit = (((tactive_ref_ns * FRL_TIMING_NS_MULTIPLIER) - (hcactive_target_tb/(ftb_avg_k * 1000))) *

-:146: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#146: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:684:
+		tb_delta_limit = (((tactive_ref_ns * FRL_TIMING_NS_MULTIPLIER) - (hcactive_target_tb/(ftb_avg_k * 1000))) *
 		                                                                                    ^

-:156: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#156: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:694:
+		tb_delta_limit = (_tb_delta_ns * (hcactive_target_tb + hcblank_target_tb1)) / line_time_ns;

-:166: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#166: FILE: drivers/gpu/drm/drm_frl_dfm_helper.c:704:
+{
+

total: 0 errors, 3 warnings, 2 checks, 308 lines checked
18e9986cd944 drm/hdmi21: Add frl_dfm_helper to Makefile



^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for Add data flow metering support for HDMI2.1
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
                   ` (6 preceding siblings ...)
  (?)
@ 2022-02-03 14:55 ` Patchwork
  -1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-02-03 14:55 UTC (permalink / raw)
  To: Vandita Kulkarni; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 16370 bytes --]

== Series Details ==

Series: Add data flow metering support for HDMI2.1
URL   : https://patchwork.freedesktop.org/series/99668/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11184 -> Patchwork_22167
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_22167 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22167, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/index.html

Participating hosts (41 -> 45)
------------------------------

  Additional (9): bat-dg1-6 bat-dg1-5 fi-adl-ddr4 fi-apl-guc bat-adlp-6 bat-rpls-1 bat-rpls-2 bat-jsl-2 bat-jsl-1 
  Missing    (5): shard-tglu fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22167:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@workarounds:
    - fi-rkl-guc:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-rkl-guc/igt@i915_selftest@live@workarounds.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-rkl-guc/igt@i915_selftest@live@workarounds.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s3@smem:
    - {fi-adl-ddr4}:      NOTRUN -> [INCOMPLETE][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-adl-ddr4/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@hangcheck:
    - {fi-ehl-2}:         [PASS][4] -> [INCOMPLETE][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-ehl-2/igt@i915_selftest@live@hangcheck.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-ehl-2/igt@i915_selftest@live@hangcheck.html

  
Known issues
------------

  Here are the changes found in Patchwork_22167 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@read_all_entries:
    - fi-apl-guc:         NOTRUN -> [DMESG-WARN][6] ([i915#1610])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-apl-guc/igt@debugfs_test@read_all_entries.html

  * igt@fbdev@nullptr:
    - bat-dg1-6:          NOTRUN -> [SKIP][7] ([i915#2582]) +4 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@fbdev@nullptr.html

  * igt@gem_exec_gttfill@basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][8] ([i915#4086])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@gem_exec_gttfill@basic.html
    - bat-dg1-5:          NOTRUN -> [SKIP][9] ([i915#4086])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - fi-bdw-5557u:       [PASS][10] -> [INCOMPLETE][11] ([i915#146])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_mmap@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][12] ([i915#4083])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@gem_mmap@basic.html
    - bat-dg1-6:          NOTRUN -> [SKIP][13] ([i915#4083])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@gem_mmap@basic.html

  * igt@gem_mmap_gtt@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][14] ([i915#4077]) +2 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@gem_mmap_gtt@basic.html

  * igt@gem_tiled_blits@basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][15] ([i915#4077]) +2 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@gem_tiled_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][16] ([i915#4079]) +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@gem_tiled_pread_basic.html
    - bat-dg1-5:          NOTRUN -> [SKIP][17] ([i915#4079]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
    - bat-dg1-5:          NOTRUN -> [SKIP][18] ([i915#1155])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@i915_pm_backlight@basic-brightness.html
    - bat-dg1-6:          NOTRUN -> [SKIP][19] ([i915#1155])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-6:          NOTRUN -> [DMESG-FAIL][20] ([i915#4494] / [i915#4957])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
    - bat-dg1-5:          NOTRUN -> [DMESG-FAIL][21] ([i915#4494] / [i915#4957])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
    - fi-hsw-4770:        [PASS][22] -> [INCOMPLETE][23] ([i915#4785])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@requests:
    - fi-blb-e6850:       [PASS][24] -> [DMESG-FAIL][25] ([i915#5026])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-blb-e6850/igt@i915_selftest@live@requests.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-blb-e6850/igt@i915_selftest@live@requests.html

  * igt@kms_addfb_basic@addfb25-x-tiled-legacy:
    - bat-dg1-6:          NOTRUN -> [SKIP][26] ([i915#4212]) +7 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][27] ([i915#4215])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html
    - bat-dg1-6:          NOTRUN -> [SKIP][28] ([i915#4215])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
    - bat-dg1-5:          NOTRUN -> [SKIP][29] ([i915#4212]) +7 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_addfb_basic@tile-pitch-mismatch.html

  * igt@kms_busy@basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][30] ([i915#4303])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_busy@basic.html

  * igt@kms_chamelium@dp-hpd-fast:
    - bat-dg1-5:          NOTRUN -> [SKIP][31] ([fdo#111827]) +8 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_chamelium@hdmi-edid-read:
    - bat-dg1-6:          NOTRUN -> [SKIP][32] ([fdo#111827]) +8 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - bat-dg1-5:          NOTRUN -> [SKIP][33] ([i915#4103] / [i915#4213]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - bat-dg1-6:          NOTRUN -> [SKIP][34] ([i915#4103] / [i915#4213]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-dg1-6:          NOTRUN -> [SKIP][35] ([i915#4078]) +24 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg1-6:          NOTRUN -> [SKIP][36] ([fdo#109285])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_force_connector_basic@force-load-detect.html
    - bat-dg1-5:          NOTRUN -> [SKIP][37] ([fdo#109285])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_psr@cursor_plane_move:
    - bat-dg1-6:          NOTRUN -> [SKIP][38] ([i915#1072] / [i915#4078]) +3 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@kms_psr@cursor_plane_move.html

  * igt@kms_psr@primary_page_flip:
    - bat-dg1-5:          NOTRUN -> [SKIP][39] ([i915#1072] / [i915#4078]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@kms_psr@primary_page_flip.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg1-5:          NOTRUN -> [SKIP][40] ([i915#3708]) +3 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@prime_vgem@basic-fence-flip.html
    - bat-dg1-6:          NOTRUN -> [SKIP][41] ([i915#3708]) +3 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
    - bat-dg1-5:          NOTRUN -> [SKIP][42] ([i915#3708] / [i915#4077]) +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg1-6:          NOTRUN -> [SKIP][43] ([i915#3708] / [i915#4077]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@basic-userptr:
    - fi-skl-6600u:       NOTRUN -> [SKIP][44] ([fdo#109271]) +18 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-skl-6600u/igt@prime_vgem@basic-userptr.html
    - bat-dg1-6:          NOTRUN -> [SKIP][45] ([i915#3708] / [i915#4873])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-6/igt@prime_vgem@basic-userptr.html
    - bat-dg1-5:          NOTRUN -> [SKIP][46] ([i915#3708] / [i915#4873])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/bat-dg1-5/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-hsw-4770:        NOTRUN -> [FAIL][47] ([fdo#109271] / [i915#1436] / [i915#4312])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-hsw-4770/igt@runner@aborted.html
    - fi-blb-e6850:       NOTRUN -> [FAIL][48] ([fdo#109271] / [i915#2403] / [i915#2426] / [i915#4312])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-blb-e6850/igt@runner@aborted.html
    - fi-apl-guc:         NOTRUN -> [FAIL][49] ([i915#2426] / [i915#4312])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-apl-guc/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@kms_psr@primary_page_flip:
    - fi-skl-6600u:       [INCOMPLETE][50] ([i915#4547] / [i915#4838]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11184/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4086]: https://gitlab.freedesktop.org/drm/intel/issues/4086
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4303]: https://gitlab.freedesktop.org/drm/intel/issues/4303
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4838]: https://gitlab.freedesktop.org/drm/intel/issues/4838
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4898]: https://gitlab.freedesktop.org/drm/intel/issues/4898
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5026]: https://gitlab.freedesktop.org/drm/intel/issues/5026
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * Linux: CI_DRM_11184 -> Patchwork_22167

  CI-20190529: 20190529
  CI_DRM_11184: 04d657f075e9162f0d622c5a91115395cbd7dd98 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6339: 9cd99d763440ae75d9981ce4e361d3deb5edb4e4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22167: 18e9986cd9445cf9397ba269cf3beb0326e98318 @ git://anongit.freedesktop.org/gfx-ci/linux


== Kernel 32bit build ==

Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_22167/build_32bit.log

  CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
  GEN     .version
  CHK     include/generated/compile.h
  UPD     include/generated/compile.h
  CC      init/version.o
  AR      init/built-in.a
  LD      vmlinux.o
  MODPOST vmlinux.symvers
  MODINFO modules.builtin.modinfo
  GEN     modules.builtin
  LD      .tmp_vmlinux.kallsyms1
drivers/gpu/drm/drm_frl_dfm_helper.o: In function `drm_frl_dsc_get_ftb_avg':
/home/cidrm/kernel/drivers/gpu/drm/drm_frl_dfm_helper.c:608: undefined reference to `__udivdi3'
drivers/gpu/drm/drm_frl_dfm_helper.o: In function `drm_frl_dsc_tactive_target_ns':
/home/cidrm/kernel/drivers/gpu/drm/drm_frl_dfm_helper.c:635: undefined reference to `__udivdi3'
Makefile:1155: recipe for target 'vmlinux' failed
make: *** [vmlinux] Error 1


== Linux commits ==

18e9986cd944 drm/hdmi21: Add frl_dfm_helper to Makefile
d7bca9952da4 drm/hdmi21: Add support for DFM calculation with DSC
cfe4d1abfbda drm/hdmi21: Add helpers to verify non-dsc DFM requirements
ef52becbce64 drm/hdmi21: Add non dsc frl capacity computation helpers
84a5cb52aee6 drm/hdmi21: Define frl_dfm structure

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/index.html

[-- Attachment #2: Type: text/html, Size: 19595 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: warning for Add data flow metering support for HDMI2.1
  2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
                   ` (7 preceding siblings ...)
  (?)
@ 2022-02-03 14:55 ` Patchwork
  -1 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-02-03 14:55 UTC (permalink / raw)
  To: Vandita Kulkarni; +Cc: intel-gfx

== Series Details ==

Series: Add data flow metering support for HDMI2.1
URL   : https://patchwork.freedesktop.org/series/99668/
State : warning

== Summary ==

CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
  GEN     .version
  CHK     include/generated/compile.h
  UPD     include/generated/compile.h
  CC      init/version.o
  AR      init/built-in.a
  LD      vmlinux.o
  MODPOST vmlinux.symvers
  MODINFO modules.builtin.modinfo
  GEN     modules.builtin
  LD      .tmp_vmlinux.kallsyms1
drivers/gpu/drm/drm_frl_dfm_helper.o: In function `drm_frl_dsc_get_ftb_avg':
/home/cidrm/kernel/drivers/gpu/drm/drm_frl_dfm_helper.c:608: undefined reference to `__udivdi3'
drivers/gpu/drm/drm_frl_dfm_helper.o: In function `drm_frl_dsc_tactive_target_ns':
/home/cidrm/kernel/drivers/gpu/drm/drm_frl_dfm_helper.c:635: undefined reference to `__udivdi3'
Makefile:1155: recipe for target 'vmlinux' failed
make: *** [vmlinux] Error 1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22167/build_32bit.log

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [RFC 5/5] drm/hdmi21: Add frl_dfm_helper to Makefile
  2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
  (?)
@ 2022-02-03 16:19   ` kernel test robot
  -1 siblings, 0 replies; 16+ messages in thread
From: kernel test robot @ 2022-02-03 16:19 UTC (permalink / raw)
  To: kbuild-all

[-- Attachment #1: Type: text/plain, Size: 6690 bytes --]

Hi Vandita,

[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on drm/drm-next]
[also build test WARNING on drm-intel/for-linux-next drm-tip/drm-tip v5.17-rc2 next-20220203]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Add-data-flow-metering-support-for-HDMI2-1/20220203-214922
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: arc-allyesconfig (https://download.01.org/0day-ci/archive/20220204/202202040012.bB3Ih29J-lkp(a)intel.com/config)
compiler: arceb-elf-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/d6f76f7f3bc7b26c1dd6ebc11ef0cff7deb82058
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Vandita-Kulkarni/Add-data-flow-metering-support-for-HDMI2-1/20220203-214922
        git checkout d6f76f7f3bc7b26c1dd6ebc11ef0cff7deb82058
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arc SHELL=/bin/bash drivers/gpu/drm/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/drm_frl_dfm_helper.c: In function 'drm_frl_dfm_dsc_is_timing_req_met':
>> drivers/gpu/drm/drm_frl_dfm_helper.c:747:63: warning: variable 'tblank_target_ns' set but not used [-Wunused-but-set-variable]
     747 |         u32 tactive_ref_ns, tblank_ref_ns, tactive_target_ns, tblank_target_ns;
         |                                                               ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/drm_frl_dfm_helper.c:747:29: warning: variable 'tblank_ref_ns' set but not used [-Wunused-but-set-variable]
     747 |         u32 tactive_ref_ns, tblank_ref_ns, tactive_target_ns, tblank_target_ns;
         |                             ^~~~~~~~~~~~~


vim +/tblank_target_ns +747 drivers/gpu/drm/drm_frl_dfm_helper.c

f1aa2e4af1607a Ankit Nautiyal 2022-02-03  741  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  742  /* Is DFM timing requirement is met with DSC */
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  743  static
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  744  bool drm_frl_dfm_dsc_is_timing_req_met(struct drm_hdmi_frl_dfm *frl_dfm)
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  745  {
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  746  	u32 ftb_avg_k;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03 @747  	u32 tactive_ref_ns, tblank_ref_ns, tactive_target_ns, tblank_target_ns;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  748  	u32 tb_borrowed, tb_delta, tb_worst;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  749  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  750  	ftb_avg_k = drm_frl_dsc_get_ftb_avg(frl_dfm->params.hcactive_target,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  751  					    frl_dfm->params.hcblank_target,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  752  					    frl_dfm->config.hactive,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  753  					    frl_dfm->config.hblank,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  754  					    frl_dfm->params.pixel_clock_max_khz);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  755  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  756  	tactive_ref_ns = drm_frl_dsc_get_tactive_ref_ns(frl_dfm->params.line_time_ns,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  757  							frl_dfm->config.hactive,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  758  							frl_dfm->config.hblank);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  759  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  760  	tblank_ref_ns = drm_frl_dsc_get_tblank_ref_ns(frl_dfm->params.line_time_ns,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  761  						      frl_dfm->config.hactive,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  762  						      frl_dfm->config.hblank);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  763  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  764  	tactive_target_ns = drm_frl_dsc_tactive_target_ns(frl_dfm->config.lanes,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  765  							  frl_dfm->params.hcactive_target,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  766  							  ftb_avg_k,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  767  							  frl_dfm->params.char_rate_min_kbps,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  768  							  frl_dfm->params.overhead_max);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  769  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  770  	tblank_target_ns = frl_dfm->params.line_time_ns - tactive_target_ns;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  771  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  772  	tb_borrowed = drm_frl_get_dsc_tri_bytes_borrowed(tactive_target_ns,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  773  							 ftb_avg_k,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  774  							 frl_dfm->params.hcactive_target);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  775  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  776  	tb_delta = drm_frl_get_dsc_tri_bytes_delta(tactive_target_ns,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  777  						   tactive_ref_ns,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  778  						   frl_dfm->params.hcactive_target,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  779  						   ftb_avg_k,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  780  						   frl_dfm->config.hactive,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  781  						   frl_dfm->config.hblank,
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  782  						   frl_dfm->params.line_time_ns);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  783  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  784  	tb_worst = max(tb_borrowed, tb_delta);
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  785  	if (tb_worst > TB_BORROWED_MAX)
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  786  		return false;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  787  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  788  	frl_dfm->params.ftb_avg_k = ftb_avg_k;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  789  	frl_dfm->params.tb_borrowed = tb_borrowed;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  790  
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  791  	return true;
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  792  }
f1aa2e4af1607a Ankit Nautiyal 2022-02-03  793  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2022-02-03 16:19 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-03  5:50 [RFC 0/5] Add data flow metering support for HDMI2.1 Vandita Kulkarni
2022-02-03  5:50 ` [Intel-gfx] " Vandita Kulkarni
2022-02-03  5:50 ` [RFC 1/5] drm/hdmi21: Define frl_dfm structure Vandita Kulkarni
2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
2022-02-03  5:50 ` [RFC 2/5] drm/hdmi21: Add non dsc frl capacity computation helpers Vandita Kulkarni
2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
2022-02-03  5:50 ` [RFC 3/5] drm/hdmi21: Add helpers to verify non-dsc DFM requirements Vandita Kulkarni
2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
2022-02-03  5:50 ` [RFC 4/5] drm/hdmi21: Add support for DFM calculation with DSC Vandita Kulkarni
2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
2022-02-03  5:50 ` [RFC 5/5] drm/hdmi21: Add frl_dfm_helper to Makefile Vandita Kulkarni
2022-02-03  5:50   ` [Intel-gfx] " Vandita Kulkarni
2022-02-03 16:19   ` kernel test robot
2022-02-03 14:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add data flow metering support for HDMI2.1 Patchwork
2022-02-03 14:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-03 14:55 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork

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