* Re: [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries
@ 2022-02-04 10:19 kernel test robot
0 siblings, 0 replies; 3+ messages in thread
From: kernel test robot @ 2022-02-04 10:19 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 8161 bytes --]
CC: kbuild-all(a)lists.01.org
In-Reply-To: <20220203200403.378958-3-michael.cheng@intel.com>
References: <20220203200403.378958-3-michael.cheng@intel.com>
TO: Michael Cheng <michael.cheng@intel.com>
TO: intel-gfx(a)lists.freedesktop.org
CC: tvrtko.ursulin(a)linux.intel.com
CC: michael.cheng(a)intel.com
CC: wayne.boyer(a)intel.com
CC: casey.g.bowman(a)intel.com
CC: lucas.demarchi(a)intel.com
CC: dri-devel(a)lists.freedesktop.org
Hi Michael,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next drm/drm-next tegra-drm/drm/tegra/for-next v5.17-rc2 next-20220203]
[cannot apply to airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Michael-Cheng/Use-drm_clflush-instead-of-clflush/20220204-040643
base: git://anongit.freedesktop.org/drm-intel for-linux-next
:::::: branch date: 14 hours ago
:::::: commit date: 14 hours ago
config: i386-randconfig-m021-20220131 (https://download.01.org/0day-ci/archive/20220204/202202041817.Nkp2C2e2-lkp(a)intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/gpu/drm/i915/gt/intel_execlists_submission.c:2743 reset_csb_pointers() warn: taking sizeof binop
Old smatch warnings:
drivers/gpu/drm/i915/gt/intel_execlists_submission.c:391 __unwind_incomplete_requests() error: uninitialized symbol 'pl'.
drivers/gpu/drm/i915/gt/intel_execlists_submission.c:3837 execlists_create_virtual() warn: assigning (-2) to unsigned variable 've->base.instance'
drivers/gpu/drm/i915/gt/intel_execlists_submission.c:3838 execlists_create_virtual() warn: assigning (-2) to unsigned variable 've->base.uabi_instance'
vim +2743 drivers/gpu/drm/i915/gt/intel_execlists_submission.c
ef11c01db405b4 drivers/gpu/drm/i915/intel_lrc.c Chris Wilson 2016-12-18 2711
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2712 static void reset_csb_pointers(struct intel_engine_cs *engine)
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2713 {
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2714 struct intel_engine_execlists * const execlists = &engine->execlists;
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2715 const unsigned int reset_value = execlists->csb_size - 1;
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2716
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2717 ring_set_paused(engine, 0);
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2718
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2719 /*
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2720 * Sometimes Icelake forgets to reset its pointers on a GPU reset.
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2721 * Bludgeon them with a mmio update to be sure.
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2722 */
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2723 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2724 0xffff << 16 | reset_value << 8 | reset_value);
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2725 ENGINE_POSTING_READ(engine, RING_CONTEXT_STATUS_PTR);
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2726
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2727 /*
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2728 * After a reset, the HW starts writing into CSB entry [0]. We
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2729 * therefore have to set our HEAD pointer back one entry so that
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2730 * the *first* entry we check is entry 0. To complicate this further,
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2731 * as we don't wait for the first interrupt after reset, we have to
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2732 * fake the HW write to point back to the last entry so that our
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2733 * inline comparison of our cached head position against the last HW
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2734 * write works even before the first interrupt.
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2735 */
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2736 execlists->csb_head = reset_value;
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2737 WRITE_ONCE(*execlists->csb_write, reset_value);
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2738 wmb(); /* Make sure this is visible to HW (paranoia?) */
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2739
233c1ae3c83f21 drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-09-15 2740 /* Check that the GPU does indeed update the CSB entries! */
233c1ae3c83f21 drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-09-15 2741 memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64));
394d677552381d drivers/gpu/drm/i915/gt/intel_execlists_submission.c Michael Cheng 2022-02-03 2742 drm_clflush_virt_range(&execlists->csb_status[0],
394d677552381d drivers/gpu/drm/i915/gt/intel_execlists_submission.c Michael Cheng 2022-02-03 @2743 sizeof(&execlists->csb_status[reset_value]));
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2744
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2745 /* Once more for luck and our trusty paranoia */
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2746 ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2747 0xffff << 16 | reset_value << 8 | reset_value);
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2748 ENGINE_POSTING_READ(engine, RING_CONTEXT_STATUS_PTR);
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2749
b428d57006663d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-05-13 2750 GEM_BUG_ON(READ_ONCE(*execlists->csb_write) != reset_value);
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2751 }
23122a4d992b5d drivers/gpu/drm/i915/gt/intel_lrc.c Chris Wilson 2020-04-16 2752
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries
2022-02-03 20:03 [PATCH v4 0/4] Use drm_clflush* instead of clflush Michael Cheng
@ 2022-02-03 20:04 ` Michael Cheng
0 siblings, 0 replies; 3+ messages in thread
From: Michael Cheng @ 2022-02-03 20:04 UTC (permalink / raw)
To: intel-gfx
Cc: tvrtko.ursulin, michael.cheng, wayne.boyer, casey.g.bowman,
lucas.demarchi, dri-devel
Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.
v2(Michael Cheng): Drop invalidate_csb_entries function and directly
invoke drm_clflush_virt_range. Thanks to Tvrtko for the
sugguestion.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 9bb7c863172f..7500c06562da 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
return inactive;
}
-static void invalidate_csb_entries(const u64 *first, const u64 *last)
-{
- clflush((void *)first);
- clflush((void *)last);
-}
-
/*
* Starting with Gen12, the status has a new format:
*
@@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
* the wash as hardware, working or not, will need to do the
* invalidation before.
*/
- invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
+ drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0]));
/*
* We assume that any event reflects a change in context flow
@@ -2783,8 +2777,8 @@ static void reset_csb_pointers(struct intel_engine_cs *engine)
/* Check that the GPU does indeed update the CSB entries! */
memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64));
- invalidate_csb_entries(&execlists->csb_status[0],
- &execlists->csb_status[reset_value]);
+ drm_clflush_virt_range(&execlists->csb_status[0],
+ sizeof(&execlists->csb_status[reset_value]));
/* Once more for luck and our trusty paranoia */
ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries
2022-02-03 17:29 [PATCH v4 0/4] Use drm_clflush* instead of clflush Michael Cheng
@ 2022-02-03 17:29 ` Michael Cheng
0 siblings, 0 replies; 3+ messages in thread
From: Michael Cheng @ 2022-02-03 17:29 UTC (permalink / raw)
To: gfx-internal-devel
Cc: tvrtko.ursulin, michael.cheng, wayne.boyer, casey.g.bowman,
lucas.demarchi, dri-devel
Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.
v2(Michael Cheng): Drop invalidate_csb_entries function and directly
invoke drm_clflush_virt_range. Thanks to Tvrtko for the
sugguestion.
Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 9bb7c863172f..7500c06562da 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
return inactive;
}
-static void invalidate_csb_entries(const u64 *first, const u64 *last)
-{
- clflush((void *)first);
- clflush((void *)last);
-}
-
/*
* Starting with Gen12, the status has a new format:
*
@@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
* the wash as hardware, working or not, will need to do the
* invalidation before.
*/
- invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
+ drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0]));
/*
* We assume that any event reflects a change in context flow
@@ -2783,8 +2777,8 @@ static void reset_csb_pointers(struct intel_engine_cs *engine)
/* Check that the GPU does indeed update the CSB entries! */
memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64));
- invalidate_csb_entries(&execlists->csb_status[0],
- &execlists->csb_status[reset_value]);
+ drm_clflush_virt_range(&execlists->csb_status[0],
+ sizeof(&execlists->csb_status[reset_value]));
/* Once more for luck and our trusty paranoia */
ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-02-04 10:19 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-02-04 10:19 [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries kernel test robot
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2022-02-03 20:03 [PATCH v4 0/4] Use drm_clflush* instead of clflush Michael Cheng
2022-02-03 20:04 ` [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng
2022-02-03 17:29 [PATCH v4 0/4] Use drm_clflush* instead of clflush Michael Cheng
2022-02-03 17:29 ` [PATCH v4 2/4] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng
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