Re: [RFC PATCH 4/6] drm: mxc-epdc: Add update management

[kernel test robot <lkp@intel.com>]

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Hi Andreas,

[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on drm/drm-next]
[also build test WARNING on robh/for-next v5.17-rc2 next-20220204]
[cannot apply to pza/reset/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Andreas-Kemnade/drm-EPDC-driver-for-i-MX6/20220206-162244
base:   git://anongit.freedesktop.org/drm/drm drm-next
config: arc-allyesconfig (https://download.01.org/0day-ci/archive/20220206/202202061935.pxyST7Cb-lkp(a)intel.com/config)
compiler: arceb-elf-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/eb5c0a854ad92babcd34da63230029077f3e35a3
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Andreas-Kemnade/drm-EPDC-driver-for-i-MX6/20220206-162244
        git checkout eb5c0a854ad92babcd34da63230029077f3e35a3
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arc SHELL=/bin/bash drivers/gpu/drm/mxc-epdc/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/mxc-epdc/epdc_update.c: In function 'epdc_submit_work_func':
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:516:13: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
     516 |         int ret;
         |             ^~~
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:515:18: warning: variable 'update_addr_virt' set but not used [-Wunused-but-set-variable]
     515 |         uint8_t *update_addr_virt;
         |                  ^~~~~~~~~~~~~~~~
   drivers/gpu/drm/mxc-epdc/epdc_update.c: At top level:
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:739:6: warning: no previous prototype for 'mxc_epdc_flush_updates' [-Wmissing-prototypes]
     739 | void mxc_epdc_flush_updates(struct mxc_epdc *priv)
         |      ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:778:6: warning: no previous prototype for 'mxc_epdc_draw_mode0' [-Wmissing-prototypes]
     778 | void mxc_epdc_draw_mode0(struct mxc_epdc *priv)
         |      ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/mxc-epdc/epdc_update.c: In function 'mxc_epdc_draw_mode0':
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:780:14: warning: variable 'upd_buf_ptr' set but not used [-Wunused-but-set-variable]
     780 |         u32 *upd_buf_ptr;
         |              ^~~~~~~~~~~
   drivers/gpu/drm/mxc-epdc/epdc_update.c: At top level:
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:814:5: warning: no previous prototype for 'mxc_epdc_send_single_update' [-Wmissing-prototypes]
     814 | int mxc_epdc_send_single_update(struct drm_rect *clip, int pitch, void *vaddr,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/mxc-epdc/epdc_update.c: In function 'epdc_intr_work_func':
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:884:45: warning: variable 'epdc_luts_avail' set but not used [-Wunused-but-set-variable]
     884 |         u32 epdc_luts_active, epdc_wb_busy, epdc_luts_avail, epdc_lut_cancelled;
         |                                             ^~~~~~~~~~~~~~~
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:882:14: warning: variable 'wb_lut_done' set but not used [-Wunused-but-set-variable]
     882 |         bool wb_lut_done = false;
         |              ^~~~~~~~~~~
   drivers/gpu/drm/mxc-epdc/epdc_update.c: At top level:
>> drivers/gpu/drm/mxc-epdc/epdc_update.c:1134:5: warning: no previous prototype for 'mxc_epdc_init_update' [-Wmissing-prototypes]
    1134 | int mxc_epdc_init_update(struct mxc_epdc *priv)
         |     ^~~~~~~~~~~~~~~~~~~~


vim +/ret +516 drivers/gpu/drm/mxc-epdc/epdc_update.c

   501	
   502	
   503	
   504	
   505	static void epdc_submit_work_func(struct work_struct *work)
   506	{
   507		struct update_data_list *next_update, *temp_update;
   508		struct update_desc_list *next_desc, *temp_desc;
   509		struct mxc_epdc *priv =
   510			container_of(work, struct mxc_epdc, epdc_submit_work);
   511		struct update_data_list *upd_data_list = NULL;
   512		struct drm_rect adj_update_region, *upd_region;
   513		bool end_merge = false;
   514		u32 update_addr;
 > 515		uint8_t *update_addr_virt;
 > 516		int ret;
   517	
   518		/* Protect access to buffer queues and to update HW */
   519		mutex_lock(&priv->queue_mutex);
   520	
   521		/*
   522		 * Are any of our collision updates able to go now?
   523		 * Go through all updates in the collision list and check to see
   524		 * if the collision mask has been fully cleared
   525		 */
   526		list_for_each_entry_safe(next_update, temp_update,
   527					&priv->upd_buf_collision_list, list) {
   528	
   529			if (next_update->collision_mask != 0)
   530				continue;
   531	
   532			dev_dbg(priv->drm.dev, "A collision update is ready to go!\n");
   533	
   534			/* Force waveform mode to auto for resubmitted collisions */
   535			next_update->update_desc->upd_data.waveform_mode =
   536				WAVEFORM_MODE_AUTO;
   537	
   538			/*
   539			 * We have a collision cleared, so select it for resubmission.
   540			 * If an update is already selected, attempt to merge.
   541			 */
   542			if (!upd_data_list) {
   543				upd_data_list = next_update;
   544				list_del_init(&next_update->list);
   545			} else {
   546				switch (epdc_submit_merge(upd_data_list->update_desc,
   547							  next_update->update_desc,
   548							  priv)) {
   549				case MERGE_OK:
   550					dev_dbg(priv->drm.dev,
   551						"Update merged [collision]\n");
   552					list_del_init(&next_update->update_desc->list);
   553					kfree(next_update->update_desc);
   554					next_update->update_desc = NULL;
   555					list_del_init(&next_update->list);
   556					/* Add to free buffer list */
   557					list_add_tail(&next_update->list,
   558						 &priv->upd_buf_free_list);
   559					break;
   560				case MERGE_FAIL:
   561					dev_dbg(priv->drm.dev,
   562						"Update not merged [collision]\n");
   563					break;
   564				case MERGE_BLOCK:
   565					dev_dbg(priv->drm.dev,
   566						"Merge blocked [collision]\n");
   567					end_merge = true;
   568					break;
   569				}
   570	
   571				if (end_merge) {
   572					end_merge = false;
   573					break;
   574				}
   575			}
   576		}
   577	
   578		/*
   579		 * If we didn't find a collision update ready to go, we
   580		 * need to get a free buffer and match it to a pending update.
   581		 */
   582	
   583		/*
   584		 * Can't proceed if there are no free buffers (and we don't
   585		 * already have a collision update selected)
   586		 */
   587		if (!upd_data_list &&
   588			list_empty(&priv->upd_buf_free_list)) {
   589			mutex_unlock(&priv->queue_mutex);
   590			return;
   591		}
   592	
   593		list_for_each_entry_safe(next_desc, temp_desc,
   594				&priv->upd_pending_list, list) {
   595	
   596			dev_dbg(priv->drm.dev, "Found a pending update!\n");
   597	
   598			if (!upd_data_list) {
   599				if (list_empty(&priv->upd_buf_free_list))
   600					break;
   601				upd_data_list =
   602					list_entry(priv->upd_buf_free_list.next,
   603						struct update_data_list, list);
   604				list_del_init(&upd_data_list->list);
   605				upd_data_list->update_desc = next_desc;
   606				list_del_init(&next_desc->list);
   607			} else {
   608				switch (epdc_submit_merge(upd_data_list->update_desc,
   609						next_desc, priv)) {
   610				case MERGE_OK:
   611					dev_dbg(priv->drm.dev,
   612						"Update merged [queue]\n");
   613					list_del_init(&next_desc->list);
   614					kfree(next_desc);
   615					break;
   616				case MERGE_FAIL:
   617					dev_dbg(priv->drm.dev,
   618						"Update not merged [queue]\n");
   619					break;
   620				case MERGE_BLOCK:
   621					dev_dbg(priv->drm.dev,
   622						"Merge blocked [collision]\n");
   623					end_merge = true;
   624					break;
   625				}
   626	
   627				if (end_merge)
   628					break;
   629			}
   630		}
   631	
   632		/* Is update list empty? */
   633		if (!upd_data_list) {
   634			mutex_unlock(&priv->queue_mutex);
   635			return;
   636		}
   637	
   638		if ((!priv->powered)
   639			|| priv->powering_down)
   640			mxc_epdc_powerup(priv);
   641	
   642		/*
   643		 * Set update buffer pointer to the start of
   644		 * the update region in the frame buffer.
   645		 */
   646		upd_region = &upd_data_list->update_desc->upd_data.update_region;
   647		update_addr = priv->epdc_mem_phys +
   648			((upd_region->y1 * priv->epdc_mem_width) +
   649			upd_region->x1);
   650		update_addr_virt = (u8 *)(priv->epdc_mem_virt) +
   651			((upd_region->y1 * priv->epdc_mem_width) +
   652			upd_region->x1);
   653	
   654		adj_update_region = upd_data_list->update_desc->upd_data.update_region;
   655		/*
   656		 * Is the working buffer idle?
   657		 * If the working buffer is busy, we must wait for the resource
   658		 * to become free. The IST will signal this event.
   659		 */
   660		if (priv->cur_update != NULL) {
   661			dev_dbg(priv->drm.dev, "working buf busy!\n");
   662	
   663			/* Initialize event signalling an update resource is free */
   664			init_completion(&priv->update_res_free);
   665	
   666			priv->waiting_for_wb = true;
   667	
   668			/* Leave spinlock while waiting for WB to complete */
   669			mutex_unlock(&priv->queue_mutex);
   670			wait_for_completion(&priv->update_res_free);
   671			mutex_lock(&priv->queue_mutex);
   672		}
   673	
   674		/*
   675		 * If there are no LUTs available,
   676		 * then we must wait for the resource to become free.
   677		 * The IST will signal this event.
   678		 */
   679		if (!epdc_any_luts_available(priv)) {
   680			dev_dbg(priv->drm.dev, "no luts available!\n");
   681	
   682			/* Initialize event signalling an update resource is free */
   683			init_completion(&priv->update_res_free);
   684	
   685			priv->waiting_for_lut = true;
   686	
   687			/* Leave spinlock while waiting for LUT to free up */
   688			mutex_unlock(&priv->queue_mutex);
   689			wait_for_completion(&priv->update_res_free);
   690			mutex_lock(&priv->queue_mutex);
   691		}
   692	
   693		ret = epdc_choose_next_lut(priv, &upd_data_list->lut_num);
   694	
   695		/* LUTs are available, so we get one here */
   696		priv->cur_update = upd_data_list;
   697	
   698		/* Reset mask for LUTS that have completed during WB processing */
   699		priv->luts_complete_wb = 0;
   700	
   701		/* Mark LUT with order */
   702		priv->lut_update_order[upd_data_list->lut_num] =
   703				upd_data_list->update_desc->update_order;
   704	
   705		epdc_lut_complete_intr(priv, upd_data_list->lut_num,
   706					       true);
   707	
   708		/* Enable Collision and WB complete IRQs */
   709		epdc_working_buf_intr(priv, true);
   710	
   711		epdc_write(priv, EPDC_TEMP,
   712			   mxc_epdc_fb_get_temp_index(priv, TEMP_USE_AMBIENT));
   713	
   714		/* Program EPDC update to process buffer */
   715	
   716		epdc_set_update_area(priv, update_addr,
   717				     adj_update_region.x1, adj_update_region.y1,
   718				     drm_rect_width(&adj_update_region),
   719				     drm_rect_height(&adj_update_region),
   720				     priv->epdc_mem_width);
   721	
   722		if (priv->wv_modes_update &&
   723			(upd_data_list->update_desc->upd_data.waveform_mode
   724				== WAVEFORM_MODE_AUTO)) {
   725			mxc_epdc_set_update_waveform(priv, &priv->wv_modes);
   726			priv->wv_modes_update = false;
   727		}
   728	
   729		epdc_submit_update(priv, upd_data_list->lut_num,
   730				   upd_data_list->update_desc->upd_data.waveform_mode,
   731				   upd_data_list->update_desc->upd_data.update_mode,
   732				   false,
   733				   false, 0);
   734	
   735		/* Release buffer queues */
   736		mutex_unlock(&priv->queue_mutex);
   737	}
   738	

---
0-DAY CI Kernel Test Service, Intel Corporation
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