* [PATCH v2] arm64: dts: imx8mq-evk: Add second PCIe port support
@ 2022-02-09 2:06 ` Richard Zhu
0 siblings, 0 replies; 4+ messages in thread
From: Richard Zhu @ 2022-02-09 2:06 UTC (permalink / raw)
To: bhelgaas, shawnguo, l.stach
Cc: hongxing.zhu, linux-pci, linux-arm-kernel, linux-kernel, kernel,
linux-imx
Enable the second PCIe port support on i.MX8MQ EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index a1b7582f3ecf..06f6e44da4d4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -27,6 +27,17 @@ pcie0_refclk: pcie0-refclk {
clock-frequency = <100000000>;
};
+ reg_pcie1: regulator-pcie {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1_reg>;
+ regulator-name = "MPCIE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_usdhc2_vmmc: regulator-vsd-3v3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usdhc2>;
@@ -327,6 +338,20 @@ &pcie0 {
status = "okay";
};
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ vpcie-supply = <®_pcie1>;
+ vph-supply = <&vgen5_reg>;
+ status = "okay";
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
@@ -482,6 +507,19 @@ MX8MQ_IOMUXC_UART4_RXD_GPIO5_IO28 0x16
>;
};
+ pinctrl_pcie1: pcie1grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C4_SDA_PCIE2_CLKREQ_B 0x76
+ MX8MQ_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x16
+ >;
+ };
+
+ pinctrl_pcie1_reg: pcie1reggrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x16
+ >;
+ };
+
pinctrl_qspi: qspigrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2] arm64: dts: imx8mq-evk: Add second PCIe port support
@ 2022-02-09 2:06 ` Richard Zhu
0 siblings, 0 replies; 4+ messages in thread
From: Richard Zhu @ 2022-02-09 2:06 UTC (permalink / raw)
To: bhelgaas, shawnguo, l.stach
Cc: hongxing.zhu, linux-pci, linux-arm-kernel, linux-kernel, kernel,
linux-imx
Enable the second PCIe port support on i.MX8MQ EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index a1b7582f3ecf..06f6e44da4d4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -27,6 +27,17 @@ pcie0_refclk: pcie0-refclk {
clock-frequency = <100000000>;
};
+ reg_pcie1: regulator-pcie {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1_reg>;
+ regulator-name = "MPCIE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_usdhc2_vmmc: regulator-vsd-3v3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usdhc2>;
@@ -327,6 +338,20 @@ &pcie0 {
status = "okay";
};
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ vpcie-supply = <®_pcie1>;
+ vph-supply = <&vgen5_reg>;
+ status = "okay";
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
@@ -482,6 +507,19 @@ MX8MQ_IOMUXC_UART4_RXD_GPIO5_IO28 0x16
>;
};
+ pinctrl_pcie1: pcie1grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C4_SDA_PCIE2_CLKREQ_B 0x76
+ MX8MQ_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x16
+ >;
+ };
+
+ pinctrl_pcie1_reg: pcie1reggrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x16
+ >;
+ };
+
pinctrl_qspi: qspigrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x82
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mq-evk: Add second PCIe port support
2022-02-09 2:06 ` Richard Zhu
@ 2022-02-13 3:14 ` Shawn Guo
-1 siblings, 0 replies; 4+ messages in thread
From: Shawn Guo @ 2022-02-13 3:14 UTC (permalink / raw)
To: Richard Zhu
Cc: bhelgaas, l.stach, linux-pci, linux-arm-kernel, linux-kernel,
kernel, linux-imx
On Wed, Feb 09, 2022 at 10:06:48AM +0800, Richard Zhu wrote:
> Enable the second PCIe port support on i.MX8MQ EVK board.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Applied, thanks!
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mq-evk: Add second PCIe port support
@ 2022-02-13 3:14 ` Shawn Guo
0 siblings, 0 replies; 4+ messages in thread
From: Shawn Guo @ 2022-02-13 3:14 UTC (permalink / raw)
To: Richard Zhu
Cc: bhelgaas, l.stach, linux-pci, linux-arm-kernel, linux-kernel,
kernel, linux-imx
On Wed, Feb 09, 2022 at 10:06:48AM +0800, Richard Zhu wrote:
> Enable the second PCIe port support on i.MX8MQ EVK board.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Applied, thanks!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-02-13 3:16 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-02-09 2:06 [PATCH v2] arm64: dts: imx8mq-evk: Add second PCIe port support Richard Zhu
2022-02-09 2:06 ` Richard Zhu
2022-02-13 3:14 ` Shawn Guo
2022-02-13 3:14 ` Shawn Guo
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