[PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Richard Zhu]

In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
is used as the PCIe reference clock source by the endpoint device.

If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
has to be in bypass mode, and ENET clocks would be messed up.

To keep things simple, let RC use the internal PLL as reference clock
and always enable the external oscillator for endpoint device on
i.MX6QP sabresd board.

NOTE: This reference clock setup is used to pass the GEN2 TX compliance
tests, and isn't recommended as a setup in the end-user design.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 480e73183f6b..083cf90bcab5 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
 	};
 };
 
+&vgen3_reg {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-always-on;
+};
+
 &pcie {
-	status = "disabled";
+	status = "okay";
 };
 
 &sata {
-- 
2.25.1

[PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Richard Zhu]

In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
is used as the PCIe reference clock source by the endpoint device.

If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
has to be in bypass mode, and ENET clocks would be messed up.

To keep things simple, let RC use the internal PLL as reference clock
and always enable the external oscillator for endpoint device on
i.MX6QP sabresd board.

NOTE: This reference clock setup is used to pass the GEN2 TX compliance
tests, and isn't recommended as a setup in the end-user design.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 480e73183f6b..083cf90bcab5 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
 	};
 };
 
+&vgen3_reg {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-always-on;
+};
+
 &pcie {
-	status = "disabled";
+	status = "okay";
 };
 
 &sata {
-- 
2.25.1


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[PATCH v2 2/2] PCI: imx6: Enable i.MX6QP PCIe power management support

[Richard Zhu]

i.MX6QP PCIe supports the reset logic, thus it can reset itself to the
initialized state when exit from L2 or L3 states.

Enable the i.MX6QP PCIe suspend/resume operations support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 784801f2f9e6..62262483470a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -995,6 +995,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	/* Others poke directly at IOMUXC registers */
 	switch (imx6_pcie->drvdata->variant) {
 	case IMX6SX:
+	case IMX6QP:
 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
 				IMX6SX_GPR12_PCIE_PM_TURN_OFF,
 				IMX6SX_GPR12_PCIE_PM_TURN_OFF);
@@ -1307,7 +1308,8 @@ static const struct imx6_pcie_drvdata drvdata[] = {
 	[IMX6QP] = {
 		.variant = IMX6QP,
 		.flags = IMX6_PCIE_FLAG_IMX6_PHY |
-			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE,
+			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE |
+			 IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
 		.dbi_length = 0x200,
 	},
 	[IMX7D] = {
-- 
2.25.1

[PATCH v2 2/2] PCI: imx6: Enable i.MX6QP PCIe power management support

[Richard Zhu]

i.MX6QP PCIe supports the reset logic, thus it can reset itself to the
initialized state when exit from L2 or L3 states.

Enable the i.MX6QP PCIe suspend/resume operations support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 784801f2f9e6..62262483470a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -995,6 +995,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
 	/* Others poke directly at IOMUXC registers */
 	switch (imx6_pcie->drvdata->variant) {
 	case IMX6SX:
+	case IMX6QP:
 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
 				IMX6SX_GPR12_PCIE_PM_TURN_OFF,
 				IMX6SX_GPR12_PCIE_PM_TURN_OFF);
@@ -1307,7 +1308,8 @@ static const struct imx6_pcie_drvdata drvdata[] = {
 	[IMX6QP] = {
 		.variant = IMX6QP,
 		.flags = IMX6_PCIE_FLAG_IMX6_PHY |
-			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE,
+			 IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE |
+			 IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
 		.dbi_length = 0x200,
 	},
 	[IMX7D] = {
-- 
2.25.1


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Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Shawn Guo]

On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
> is used as the PCIe reference clock source by the endpoint device.
> 
> If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
> has to be in bypass mode, and ENET clocks would be messed up.
> 
> To keep things simple, let RC use the internal PLL as reference clock
> and always enable the external oscillator for endpoint device on
> i.MX6QP sabresd board.
> 
> NOTE: This reference clock setup is used to pass the GEN2 TX compliance
> tests, and isn't recommended as a setup in the end-user design.

I do not quite follow.  The commit log is all talking about external
oscillator reference clock, while code is playing 'vgen3' regulator.

Shawn

> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
> index 480e73183f6b..083cf90bcab5 100644
> --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
>  	};
>  };
>  
> +&vgen3_reg {
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-always-on;
> +};
> +
>  &pcie {
> -	status = "disabled";
> +	status = "okay";
>  };
>  
>  &sata {
> -- 
> 2.25.1
> 

Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Shawn Guo]

On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
> is used as the PCIe reference clock source by the endpoint device.
> 
> If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
> has to be in bypass mode, and ENET clocks would be messed up.
> 
> To keep things simple, let RC use the internal PLL as reference clock
> and always enable the external oscillator for endpoint device on
> i.MX6QP sabresd board.
> 
> NOTE: This reference clock setup is used to pass the GEN2 TX compliance
> tests, and isn't recommended as a setup in the end-user design.

I do not quite follow.  The commit log is all talking about external
oscillator reference clock, while code is playing 'vgen3' regulator.

Shawn

> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
> index 480e73183f6b..083cf90bcab5 100644
> --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
>  	};
>  };
>  
> +&vgen3_reg {
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-always-on;
> +};
> +
>  &pcie {
> -	status = "disabled";
> +	status = "okay";
>  };
>  
>  &sata {
> -- 
> 2.25.1
> 

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RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Hongxing Zhu]

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2022年2月13日 12:32
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
> 
> On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> > In the i.MX6QP sabresd board(sch-28857) design, one external
> > oscillator is used as the PCIe reference clock source by the endpoint device.
> >
> > If RC uses this oscillator as reference clock too, PLL6(ENET PLL)
> > would has to be in bypass mode, and ENET clocks would be messed up.
> >
> > To keep things simple, let RC use the internal PLL as reference clock
> > and always enable the external oscillator for endpoint device on
> > i.MX6QP sabresd board.
> >
> > NOTE: This reference clock setup is used to pass the GEN2 TX
> > compliance tests, and isn't recommended as a setup in the end-user design.
> 
> I do not quite follow.  The commit log is all talking about external oscillator
> reference clock, while code is playing 'vgen3' regulator.
Hi Shawn:
The vgen3 is the power-supply used to power up the external OSC circuit on
 the board.
Set vgen2 always on to toggle the external OSC and provide the REF clock
 for EP device once the board is powered up.

Thanks.
Best Regards
Richard
> 
> Shawn
> 
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > index 480e73183f6b..083cf90bcab5 100644
> > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> 	0x17059
> >  	};
> >  };
> >
> > +&vgen3_reg {
> > +	regulator-min-microvolt = <1800000>;
> > +	regulator-max-microvolt = <3300000>;
> > +	regulator-always-on;
> > +};
> > +
> >  &pcie {
> > -	status = "disabled";
> > +	status = "okay";
> >  };
> >
> >  &sata {
> > --
> > 2.25.1
> >

RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Hongxing Zhu]

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2022年2月13日 12:32
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
> 
> On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> > In the i.MX6QP sabresd board(sch-28857) design, one external
> > oscillator is used as the PCIe reference clock source by the endpoint device.
> >
> > If RC uses this oscillator as reference clock too, PLL6(ENET PLL)
> > would has to be in bypass mode, and ENET clocks would be messed up.
> >
> > To keep things simple, let RC use the internal PLL as reference clock
> > and always enable the external oscillator for endpoint device on
> > i.MX6QP sabresd board.
> >
> > NOTE: This reference clock setup is used to pass the GEN2 TX
> > compliance tests, and isn't recommended as a setup in the end-user design.
> 
> I do not quite follow.  The commit log is all talking about external oscillator
> reference clock, while code is playing 'vgen3' regulator.
Hi Shawn:
The vgen3 is the power-supply used to power up the external OSC circuit on
 the board.
Set vgen2 always on to toggle the external OSC and provide the REF clock
 for EP device once the board is powered up.

Thanks.
Best Regards
Richard
> 
> Shawn
> 
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > index 480e73183f6b..083cf90bcab5 100644
> > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> 	0x17059
> >  	};
> >  };
> >
> > +&vgen3_reg {
> > +	regulator-min-microvolt = <1800000>;
> > +	regulator-max-microvolt = <3300000>;
> > +	regulator-always-on;
> > +};
> > +
> >  &pcie {
> > -	status = "disabled";
> > +	status = "okay";
> >  };
> >
> >  &sata {
> > --
> > 2.25.1
> >
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RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Hongxing Zhu]

> -----Original Message-----
> From: Hongxing Zhu
> Sent: 2022年2月14日 9:19
> To: Shawn Guo <shawnguo@kernel.org>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
> 
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: 2022年2月13日 12:32
> > To: Hongxing Zhu <hongxing.zhu@nxp.com>
> > Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> > lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> > Subject: Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe
> > support
> >
> > On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> > > In the i.MX6QP sabresd board(sch-28857) design, one external
> > > oscillator is used as the PCIe reference clock source by the endpoint device.
> > >
> > > If RC uses this oscillator as reference clock too, PLL6(ENET PLL)
> > > would has to be in bypass mode, and ENET clocks would be messed up.
> > >
> > > To keep things simple, let RC use the internal PLL as reference
> > > clock and always enable the external oscillator for endpoint device
> > > on i.MX6QP sabresd board.
> > >
> > > NOTE: This reference clock setup is used to pass the GEN2 TX
> > > compliance tests, and isn't recommended as a setup in the end-user design.
> >
> > I do not quite follow.  The commit log is all talking about external
> > oscillator reference clock, while code is playing 'vgen3' regulator.
Hi Shawn:
I added the vgen3 usage description in the commit log, and has sent out the v3
 series.
Please help to take look on it. Thanks in advanced.

Best Regards
Richard Zhu

> Hi Shawn:
> The vgen3 is the power-supply used to power up the external OSC circuit on
> the board.
> Set vgen2 always on to toggle the external OSC and provide the REF clock  for
> EP device once the board is powered up.
> 
> Thanks.
> Best Regards
> Richard
> >
> > Shawn
> >
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > > ---
> > >  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > index 480e73183f6b..083cf90bcab5 100644
> > > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 	0x17059
> > >  	};
> > >  };
> > >
> > > +&vgen3_reg {
> > > +	regulator-min-microvolt = <1800000>;
> > > +	regulator-max-microvolt = <3300000>;
> > > +	regulator-always-on;
> > > +};
> > > +
> > >  &pcie {
> > > -	status = "disabled";
> > > +	status = "okay";
> > >  };
> > >
> > >  &sata {
> > > --
> > > 2.25.1
> > >

RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

[Hongxing Zhu]

> -----Original Message-----
> From: Hongxing Zhu
> Sent: 2022年2月14日 9:19
> To: Shawn Guo <shawnguo@kernel.org>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
> 
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@kernel.org>
> > Sent: 2022年2月13日 12:32
> > To: Hongxing Zhu <hongxing.zhu@nxp.com>
> > Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> > lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> > Subject: Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe
> > support
> >
> > On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> > > In the i.MX6QP sabresd board(sch-28857) design, one external
> > > oscillator is used as the PCIe reference clock source by the endpoint device.
> > >
> > > If RC uses this oscillator as reference clock too, PLL6(ENET PLL)
> > > would has to be in bypass mode, and ENET clocks would be messed up.
> > >
> > > To keep things simple, let RC use the internal PLL as reference
> > > clock and always enable the external oscillator for endpoint device
> > > on i.MX6QP sabresd board.
> > >
> > > NOTE: This reference clock setup is used to pass the GEN2 TX
> > > compliance tests, and isn't recommended as a setup in the end-user design.
> >
> > I do not quite follow.  The commit log is all talking about external
> > oscillator reference clock, while code is playing 'vgen3' regulator.
Hi Shawn:
I added the vgen3 usage description in the commit log, and has sent out the v3
 series.
Please help to take look on it. Thanks in advanced.

Best Regards
Richard Zhu

> Hi Shawn:
> The vgen3 is the power-supply used to power up the external OSC circuit on
> the board.
> Set vgen2 always on to toggle the external OSC and provide the REF clock  for
> EP device once the board is powered up.
> 
> Thanks.
> Best Regards
> Richard
> >
> > Shawn
> >
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > > ---
> > >  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > index 480e73183f6b..083cf90bcab5 100644
> > > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 	0x17059
> > >  	};
> > >  };
> > >
> > > +&vgen3_reg {
> > > +	regulator-min-microvolt = <1800000>;
> > > +	regulator-max-microvolt = <3300000>;
> > > +	regulator-always-on;
> > > +};
> > > +
> > >  &pcie {
> > > -	status = "disabled";
> > > +	status = "okay";
> > >  };
> > >
> > >  &sata {
> > > --
> > > 2.25.1
> > >
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