From: Ben Dooks <ben.dooks@codethink.co.uk> To: paul.walmsley@sifive.com, greentime.hu@sifive.com Cc: lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Ben Dooks <ben.dooks@codethink.co.uk> Subject: [PATCHv4 2/2] PCI: fu740: Force gen1 for initial device probe Date: Mon, 21 Feb 2022 21:03:47 +0000 [thread overview] Message-ID: <20220221210347.1335004-2-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <20220221210347.1335004-1-ben.dooks@codethink.co.uk> The fu740 PCIe core does not probe any devices on the SiFive Unmatched board without this fix from U-Boot (or having U-Boot explicitly start the PCIe via either boot-script or user command). The fix claims to set the link-speed to gen1 to get the probe to work. As this is a copy from U-Boot, the code is assumed to be correct and does fix the issue on the Unmatched. The code is at: https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pci/pcie_dw_sifive.c#L271 The code has been this way since the driver was commited in: https://source.denx.de/u-boot/u-boot/-/commit/416395c772018c6bf52aad36aca163115001793f Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- drivers/pci/controller/dwc/pcie-fu740.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c index 842b7202b96e..19501ec8c487 100644 --- a/drivers/pci/controller/dwc/pcie-fu740.c +++ b/drivers/pci/controller/dwc/pcie-fu740.c @@ -177,11 +177,30 @@ static void fu740_pcie_init_phy(struct fu740_pcie *afp) fu740_phyregwrite(1, PCIEX8MGMT_PHY_LANE3_BASE, PCIEX8MGMT_PHY_INIT_VAL, afp); } +/* This is copied from u-boot. Force system to gen1 otherwise nothing probes + * as found on the SiFive Unmatched board. + */ +static void fu740_pcie_force_gen1(struct dw_pcie *dw, struct fu740_pcie *afp ) +{ + unsigned val; + + dw_pcie_dbi_ro_wr_en(dw); + + val = dw_pcie_readl_dbi(dw, 0x70 + PCI_EXP_LNKCAP); + pr_info("%s: link-cap was %08x\n", __func__, val); + dw_pcie_writel_dbi(dw, 0x70 + PCI_EXP_LNKCAP, val | 0xf); + + dw_pcie_dbi_ro_wr_dis(dw); +} + static int fu740_pcie_start_link(struct dw_pcie *pci) { struct device *dev = pci->dev; struct fu740_pcie *afp = dev_get_drvdata(dev); + /* Force PCIe gen1 otherwise Unmatched board does not probe */ + fu740_pcie_force_gen1(pci, afp); + /* Enable LTSSM */ writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); return 0; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Ben Dooks <ben.dooks@codethink.co.uk> To: paul.walmsley@sifive.com, greentime.hu@sifive.com Cc: lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Ben Dooks <ben.dooks@codethink.co.uk> Subject: [PATCHv4 2/2] PCI: fu740: Force gen1 for initial device probe Date: Mon, 21 Feb 2022 21:03:47 +0000 [thread overview] Message-ID: <20220221210347.1335004-2-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <20220221210347.1335004-1-ben.dooks@codethink.co.uk> The fu740 PCIe core does not probe any devices on the SiFive Unmatched board without this fix from U-Boot (or having U-Boot explicitly start the PCIe via either boot-script or user command). The fix claims to set the link-speed to gen1 to get the probe to work. As this is a copy from U-Boot, the code is assumed to be correct and does fix the issue on the Unmatched. The code is at: https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pci/pcie_dw_sifive.c#L271 The code has been this way since the driver was commited in: https://source.denx.de/u-boot/u-boot/-/commit/416395c772018c6bf52aad36aca163115001793f Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- drivers/pci/controller/dwc/pcie-fu740.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c index 842b7202b96e..19501ec8c487 100644 --- a/drivers/pci/controller/dwc/pcie-fu740.c +++ b/drivers/pci/controller/dwc/pcie-fu740.c @@ -177,11 +177,30 @@ static void fu740_pcie_init_phy(struct fu740_pcie *afp) fu740_phyregwrite(1, PCIEX8MGMT_PHY_LANE3_BASE, PCIEX8MGMT_PHY_INIT_VAL, afp); } +/* This is copied from u-boot. Force system to gen1 otherwise nothing probes + * as found on the SiFive Unmatched board. + */ +static void fu740_pcie_force_gen1(struct dw_pcie *dw, struct fu740_pcie *afp ) +{ + unsigned val; + + dw_pcie_dbi_ro_wr_en(dw); + + val = dw_pcie_readl_dbi(dw, 0x70 + PCI_EXP_LNKCAP); + pr_info("%s: link-cap was %08x\n", __func__, val); + dw_pcie_writel_dbi(dw, 0x70 + PCI_EXP_LNKCAP, val | 0xf); + + dw_pcie_dbi_ro_wr_dis(dw); +} + static int fu740_pcie_start_link(struct dw_pcie *pci) { struct device *dev = pci->dev; struct fu740_pcie *afp = dev_get_drvdata(dev); + /* Force PCIe gen1 otherwise Unmatched board does not probe */ + fu740_pcie_force_gen1(pci, afp); + /* Enable LTSSM */ writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); return 0; -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-02-21 21:04 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-21 21:03 [PATCHv4 1/2] PCI: fu740: fix finding GPIOs Ben Dooks 2022-02-21 21:03 ` Ben Dooks 2022-02-21 21:03 ` Ben Dooks [this message] 2022-02-21 21:03 ` [PATCHv4 2/2] PCI: fu740: Force gen1 for initial device probe Ben Dooks 2022-02-23 20:51 ` Bjorn Helgaas 2022-02-23 20:51 ` Bjorn Helgaas 2022-02-23 21:19 ` Maciej W. Rozycki 2022-02-23 21:19 ` Maciej W. Rozycki 2022-02-28 23:15 ` Ben Dooks 2022-02-28 23:15 ` Ben Dooks 2022-02-28 17:45 ` Ben Dooks 2022-02-28 17:45 ` Ben Dooks 2022-02-23 20:51 ` [PATCHv4 1/2] PCI: fu740: fix finding GPIOs Bjorn Helgaas 2022-02-23 20:51 ` Bjorn Helgaas
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