From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: danielhb413@gmail.com, richard.henderson@linaro.org,
groug@kaod.org, clg@kaod.org,
Matheus Ferst <matheus.ferst@eldorado.org.br>,
david@gibson.dropbear.id.au
Subject: [PATCH v4 35/47] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]
Date: Tue, 22 Feb 2022 11:36:33 -0300 [thread overview]
Message-ID: <20220222143646.1268606-36-matheus.ferst@eldorado.org.br> (raw)
In-Reply-To: <20220222143646.1268606-1-matheus.ferst@eldorado.org.br>
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Implement the following PowerISA v3.0 instuctions:
xsmaddqp[o]: VSX Scalar Multiply-Add Quad-Precision [using round to Odd]
xsmsubqp[o]: VSX Scalar Multiply-Subtract Quad-Precision [using round
to Odd]
xsnmaddqp[o]: VSX Scalar Negative Multiply-Add Quad-Precision [using
round to Odd]
xsnmsubqp[o]: VSX Scalar Negative Multiply-Subtract Quad-Precision
[using round to Odd]
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/fpu_helper.c | 42 +++++++++++++++++++++++++++++
target/ppc/helper.h | 9 +++++++
target/ppc/insn32.decode | 4 +++
target/ppc/translate/vsx-impl.c.inc | 25 +++++++++++++++++
4 files changed, 80 insertions(+)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index c8797d8053..98e9576608 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2222,6 +2222,48 @@ VSX_MADD(xvmsubsp, 4, float32, VsrW(i), MSUB_FLGS, 0, 0)
VSX_MADD(xvnmaddsp, 4, float32, VsrW(i), NMADD_FLGS, 0, 0)
VSX_MADD(xvnmsubsp, 4, float32, VsrW(i), NMSUB_FLGS, 0, 0)
+/*
+ * VSX_MADDQ - VSX floating point quad-precision muliply/add
+ * op - instruction mnemonic
+ * maddflgs - flags for the float*muladd routine that control the
+ * various forms (madd, msub, nmadd, nmsub)
+ * ro - round to odd
+ */
+#define VSX_MADDQ(op, maddflgs, ro) \
+void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *s1, ppc_vsr_t *s2,\
+ ppc_vsr_t *s3) \
+{ \
+ ppc_vsr_t t = *xt; \
+ \
+ helper_reset_fpstatus(env); \
+ \
+ float_status tstat = env->fp_status; \
+ set_float_exception_flags(0, &tstat); \
+ if (ro) { \
+ tstat.float_rounding_mode = float_round_to_odd; \
+ } \
+ t.f128 = float128_muladd(s1->f128, s3->f128, s2->f128, maddflgs, &tstat); \
+ env->fp_status.float_exception_flags |= tstat.float_exception_flags; \
+ \
+ if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \
+ float_invalid_op_madd(env, tstat.float_exception_flags, \
+ false, GETPC()); \
+ } \
+ \
+ helper_compute_fprf_float128(env, t.f128); \
+ *xt = t; \
+ do_float_check_status(env, GETPC()); \
+}
+
+VSX_MADDQ(XSMADDQP, MADD_FLGS, 0)
+VSX_MADDQ(XSMADDQPO, MADD_FLGS, 1)
+VSX_MADDQ(XSMSUBQP, MSUB_FLGS, 0)
+VSX_MADDQ(XSMSUBQPO, MSUB_FLGS, 1)
+VSX_MADDQ(XSNMADDQP, NMADD_FLGS, 0)
+VSX_MADDQ(XSNMADDQPO, NMADD_FLGS, 1)
+VSX_MADDQ(XSNMSUBQP, NMSUB_FLGS, 0)
+VSX_MADDQ(XSNMSUBQPO, NMSUB_FLGS, 0)
+
/*
* VSX_SCALAR_CMP_DP - VSX scalar floating point compare double precision
* op - instruction mnemonic
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index fd249a22f0..1649fffff8 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -425,6 +425,15 @@ DEF_HELPER_5(XSMSUBSP, void, env, vsr, vsr, vsr, vsr)
DEF_HELPER_5(XSNMADDSP, void, env, vsr, vsr, vsr, vsr)
DEF_HELPER_5(XSNMSUBSP, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSMADDQP, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSMADDQPO, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSMSUBQP, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSMSUBQPO, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSNMADDQP, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSNMADDQPO, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSNMSUBQP, void, env, vsr, vsr, vsr, vsr)
+DEF_HELPER_5(XSNMSUBQPO, void, env, vsr, vsr, vsr, vsr)
+
DEF_HELPER_4(xvadddp, void, env, vsr, vsr, vsr)
DEF_HELPER_4(xvsubdp, void, env, vsr, vsr, vsr)
DEF_HELPER_4(xvmuldp, void, env, vsr, vsr, vsr)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 881b7093f6..1395a91c44 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -609,21 +609,25 @@ XSMADDADP 111100 ..... ..... ..... 00100001 . . . @XX3
XSMADDMDP 111100 ..... ..... ..... 00101001 . . . @XX3
XSMADDASP 111100 ..... ..... ..... 00000001 . . . @XX3
XSMADDMSP 111100 ..... ..... ..... 00001001 . . . @XX3
+XSMADDQP 111111 ..... ..... ..... 0110000100 . @X_rc
XSMSUBADP 111100 ..... ..... ..... 00110001 . . . @XX3
XSMSUBMDP 111100 ..... ..... ..... 00111001 . . . @XX3
XSMSUBASP 111100 ..... ..... ..... 00010001 . . . @XX3
XSMSUBMSP 111100 ..... ..... ..... 00011001 . . . @XX3
+XSMSUBQP 111111 ..... ..... ..... 0110100100 . @X_rc
XSNMADDASP 111100 ..... ..... ..... 10000001 . . . @XX3
XSNMADDMSP 111100 ..... ..... ..... 10001001 . . . @XX3
XSNMADDADP 111100 ..... ..... ..... 10100001 . . . @XX3
XSNMADDMDP 111100 ..... ..... ..... 10101001 . . . @XX3
+XSNMADDQP 111111 ..... ..... ..... 0111000100 . @X_rc
XSNMSUBASP 111100 ..... ..... ..... 10010001 . . . @XX3
XSNMSUBMSP 111100 ..... ..... ..... 10011001 . . . @XX3
XSNMSUBADP 111100 ..... ..... ..... 10110001 . . . @XX3
XSNMSUBMDP 111100 ..... ..... ..... 10111001 . . . @XX3
+XSNMSUBQP 111111 ..... ..... ..... 0111100100 . @X_rc
## VSX splat instruction
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
index a54afb4dbb..9128407365 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1333,6 +1333,31 @@ TRANS_FLAGS2(VSX207, XSNMADDMSP, do_xsmadd_XX3, false, gen_helper_XSNMADDSP)
TRANS_FLAGS2(VSX207, XSNMSUBASP, do_xsmadd_XX3, true, gen_helper_XSNMSUBSP)
TRANS_FLAGS2(VSX207, XSNMSUBMSP, do_xsmadd_XX3, false, gen_helper_XSNMSUBSP)
+static bool do_xsmadd_X(DisasContext *ctx, arg_X_rc *a,
+ void (gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr),
+ void (gen_helper_ro)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr))
+{
+ int vrt, vra, vrb;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA300);
+ REQUIRE_VSX(ctx);
+
+ vrt = a->rt + 32;
+ vra = a->ra + 32;
+ vrb = a->rb + 32;
+
+ if (a->rc) {
+ return do_xsmadd(ctx, vrt, vra, vrt, vrb, gen_helper_ro);
+ }
+
+ return do_xsmadd(ctx, vrt, vra, vrt, vrb, gen_helper);
+}
+
+TRANS(XSMADDQP, do_xsmadd_X, gen_helper_XSMADDQP, gen_helper_XSMADDQPO)
+TRANS(XSMSUBQP, do_xsmadd_X, gen_helper_XSMSUBQP, gen_helper_XSMSUBQPO)
+TRANS(XSNMADDQP, do_xsmadd_X, gen_helper_XSNMADDQP, gen_helper_XSNMADDQPO)
+TRANS(XSNMSUBQP, do_xsmadd_X, gen_helper_XSNMSUBQP, gen_helper_XSNMSUBQPO)
+
#define GEN_VSX_HELPER_VSX_MADD(name, op1, aop, mop, inval, type) \
static void gen_##name(DisasContext *ctx) \
{ \
--
2.25.1
next prev parent reply other threads:[~2022-02-22 15:36 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 14:35 [PATCH v4 00/47] target/ppc: PowerISA Vector/VSX instruction batch matheus.ferst
2022-02-22 14:35 ` [PATCH v4 01/47] target/ppc: Introduce TRANS*FLAGS macros matheus.ferst
2022-02-22 14:36 ` [PATCH v4 02/47] target/ppc: moved vector even and odd multiplication to decodetree matheus.ferst
2022-02-22 18:19 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 03/47] target/ppc: Moved vector multiply high and low " matheus.ferst
2022-02-22 18:19 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 04/47] target/ppc: vmulh* instructions without helpers matheus.ferst
2022-02-22 18:23 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 05/47] target/ppc: Implement vmsumcud instruction matheus.ferst
2022-02-22 18:28 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 06/47] target/ppc: Implement vmsumudm instruction matheus.ferst
2022-02-22 14:36 ` [PATCH v4 07/47] target/ppc: Move vexts[bhw]2[wd] to decodetree matheus.ferst
2022-02-22 18:34 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 08/47] target/ppc: Implement vextsd2q matheus.ferst
2022-02-22 14:36 ` [PATCH v4 09/47] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree matheus.ferst
2022-02-22 18:37 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 10/47] target/ppc: Move Vector Compare Not Equal or Zero " matheus.ferst
2022-02-22 19:04 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 11/47] target/ppc: Implement Vector Compare Equal Quadword matheus.ferst
2022-02-22 19:05 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 12/47] target/ppc: Implement Vector Compare Greater Than Quadword matheus.ferst
2022-02-22 19:07 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 13/47] target/ppc: Implement Vector Compare Quadword matheus.ferst
2022-02-22 14:36 ` [PATCH v4 14/47] target/ppc: implement vstri[bh][lr] matheus.ferst
2022-02-22 19:13 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 15/47] target/ppc: implement vclrlb matheus.ferst
2022-02-22 19:15 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 16/47] target/ppc: implement vclrrb matheus.ferst
2022-02-22 19:17 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 17/47] target/ppc: implement vcntmb[bhwd] matheus.ferst
2022-02-22 14:36 ` [PATCH v4 18/47] target/ppc: implement vgnb matheus.ferst
2022-02-22 21:58 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 19/47] target/ppc: move vs[lr][a][bhwd] to decodetree matheus.ferst
2022-02-22 22:01 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 20/47] target/ppc: implement vslq matheus.ferst
2022-02-22 22:14 ` Richard Henderson
2022-02-23 21:53 ` Matheus K. Ferst
2022-02-23 22:12 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 21/47] target/ppc: implement vsrq matheus.ferst
2022-02-22 22:15 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 22/47] target/ppc: implement vsraq matheus.ferst
2022-02-22 22:19 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 23/47] target/ppc: move vrl[bhwd] to decodetree matheus.ferst
2022-02-22 22:20 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 24/47] target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi " matheus.ferst
2022-02-22 22:30 ` Richard Henderson
2022-02-23 21:43 ` Matheus K. Ferst
2022-02-23 22:19 ` Richard Henderson
2022-02-24 20:23 ` Matheus K. Ferst
2022-02-24 21:26 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 25/47] target/ppc: implement vrlq matheus.ferst
2022-02-22 22:33 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 26/47] target/ppc: Move vsel and vperm/vpermr to decodetree matheus.ferst
2022-02-22 22:37 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 27/47] target/ppc: Move xxsel " matheus.ferst
2022-02-22 22:38 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 28/47] target/ppc: move xxperm/xxpermr " matheus.ferst
2022-02-22 22:40 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 29/47] target/ppc: Move xxpermdi " matheus.ferst
2022-02-22 22:42 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 30/47] target/ppc: Implement xxpermx instruction matheus.ferst
2022-02-22 22:46 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 31/47] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i matheus.ferst
2022-02-22 23:04 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 32/47] target/ppc: Implement xxeval matheus.ferst
2022-02-22 23:43 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 33/47] target/ppc: Implement xxgenpcv[bhwd]m instruction matheus.ferst
2022-02-22 23:48 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 34/47] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree matheus.ferst
2022-02-22 23:52 ` Richard Henderson
2022-02-22 14:36 ` matheus.ferst [this message]
2022-02-22 23:56 ` [PATCH v4 35/47] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o] Richard Henderson
2022-02-22 14:36 ` [PATCH v4 36/47] target/ppc: Implement xvtlsbb instruction matheus.ferst
2022-02-23 0:07 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 37/47] target/ppc: Remove xscmpnedp instruction matheus.ferst
2022-02-22 14:36 ` [PATCH v4 38/47] target/ppc: Refactor VSX_SCALAR_CMP_DP matheus.ferst
2022-02-23 0:20 ` Richard Henderson
2022-02-24 19:16 ` Víctor Colombo
2022-02-24 21:24 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 39/47] target/ppc: Implement xscmp{eq,ge,gt}qp matheus.ferst
2022-02-23 0:21 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 40/47] target/ppc: Move xscmp{eq,ge,gt}dp to decodetree matheus.ferst
2022-02-23 0:22 ` [PATCH v4 40/47] target/ppc: Move xscmp{eq, ge, gt}dp " Richard Henderson
2022-02-22 14:36 ` [PATCH v4 41/47] target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3 matheus.ferst
2022-02-23 0:23 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 42/47] target/ppc: Refactor VSX_MAX_MINC helper matheus.ferst
2022-02-23 0:40 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 43/47] target/ppc: Implement xs{max,min}cqp matheus.ferst
2022-02-23 0:41 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 44/47] target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions matheus.ferst
2022-02-23 3:08 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 45/47] target/ppc: implement plxsd/pstxsd matheus.ferst
2022-02-23 3:14 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 46/47] target/ppc: implement plxssp/pstxssp matheus.ferst
2022-02-23 3:16 ` Richard Henderson
2022-02-22 14:36 ` [PATCH v4 47/47] target/ppc: implement lxvr[bhwd]/stxvr[bhwd]x matheus.ferst
2022-02-23 3:23 ` Richard Henderson
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