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From: "Pali Rohár" <pali@kernel.org>
To: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Russell King" <rmk+kernel@armlinux.org.uk>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 09/12] dt-bindings: PCI: mvebu: Update information about intx interrupts
Date: Tue, 22 Feb 2022 16:50:27 +0100	[thread overview]
Message-ID: <20220222155030.988-10-pali@kernel.org> (raw)
In-Reply-To: <20220222155030.988-1-pali@kernel.org>

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/pci/mvebu-pci.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
index 24225852bce0..6d022a9d36ee 100644
--- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt
+++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
@@ -81,6 +81,11 @@ and the following optional properties:
 - reset-gpios: optional GPIO to PERST#
 - reset-delay-us: delay in us to wait after reset de-assertion, if not
   specified will default to 100ms, as required by the PCIe specification.
+- interrupt-names: list of interrupt names, supported are:
+   - "intx" - interrupt line triggered by one of the legacy interrupt
+- interrupts or interrupts-extended: List of the interrupt sources which
+  corresponding to the "interrupt-names". If non-empty then also additional
+  'interrupt-controller' subnode must be defined.
 
 Example:
 
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org>
To: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Marek Behún" <kabel@kernel.org>,
	"Russell King" <rmk+kernel@armlinux.org.uk>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 09/12] dt-bindings: PCI: mvebu: Update information about intx interrupts
Date: Tue, 22 Feb 2022 16:50:27 +0100	[thread overview]
Message-ID: <20220222155030.988-10-pali@kernel.org> (raw)
In-Reply-To: <20220222155030.988-1-pali@kernel.org>

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/pci/mvebu-pci.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
index 24225852bce0..6d022a9d36ee 100644
--- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt
+++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt
@@ -81,6 +81,11 @@ and the following optional properties:
 - reset-gpios: optional GPIO to PERST#
 - reset-delay-us: delay in us to wait after reset de-assertion, if not
   specified will default to 100ms, as required by the PCIe specification.
+- interrupt-names: list of interrupt names, supported are:
+   - "intx" - interrupt line triggered by one of the legacy interrupt
+- interrupts or interrupts-extended: List of the interrupt sources which
+  corresponding to the "interrupt-names". If non-empty then also additional
+  'interrupt-controller' subnode must be defined.
 
 Example:
 
-- 
2.20.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-02-22 15:52 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-22 15:50 [PATCH v4 00/12] PCI: mvebu: subsystem ids, AER and INTx Pali Rohár
2022-02-22 15:50 ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 01/12] PCI: pci-bridge-emul: Re-arrange register tests Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 02/12] PCI: pci-bridge-emul: Add support for PCIe extended capabilities Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 03/12] PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 04/12] dt-bindings: PCI: mvebu: Add num-lanes property Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-25  0:02   ` Bjorn Helgaas
2022-02-25  0:02     ` Bjorn Helgaas
2022-02-25 12:58     ` Pali Rohár
2022-02-25 12:58       ` Pali Rohár
2022-02-25 17:12       ` Bjorn Helgaas
2022-02-25 17:12         ` Bjorn Helgaas
2022-02-22 15:50 ` [PATCH v4 05/12] PCI: mvebu: Correctly configure x1/x4 mode Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-25  0:08   ` Bjorn Helgaas
2022-02-25  0:08     ` Bjorn Helgaas
2022-02-25 13:04     ` Pali Rohár
2022-02-25 13:04       ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 06/12] PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 07/12] PCI: mvebu: Add support for Advanced Error Reporting registers " Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 08/12] PCI: mvebu: Use child_ops API Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` Pali Rohár [this message]
2022-02-22 15:50   ` [PATCH v4 09/12] dt-bindings: PCI: mvebu: Update information about intx interrupts Pali Rohár
2022-02-22 15:50 ` [PATCH v4 10/12] PCI: mvebu: Fix macro names and comments about legacy interrupts Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 15:50 ` [PATCH v4 11/12] PCI: mvebu: Implement support for legacy INTx interrupts Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-25  0:26   ` Bjorn Helgaas
2022-02-25  0:26     ` Bjorn Helgaas
2022-02-22 15:50 ` [PATCH v4 12/12] ARM: dts: armada-385.dtsi: Add definitions for PCIe " Pali Rohár
2022-02-22 15:50   ` Pali Rohár
2022-02-22 16:06 ` (subset) [PATCH v4 00/12] PCI: mvebu: subsystem ids, AER and INTx Lorenzo Pieralisi
2022-02-22 16:06   ` Lorenzo Pieralisi
2022-02-22 16:11   ` Pali Rohár
2022-02-22 16:11     ` Pali Rohár
2022-02-22 16:15     ` Lorenzo Pieralisi
2022-02-22 16:15       ` Lorenzo Pieralisi
2022-02-22 16:18       ` Pali Rohár
2022-02-22 16:18         ` Pali Rohár
2022-02-28 16:11         ` Gregory CLEMENT
2022-02-28 16:11           ` Gregory CLEMENT
2022-02-28 17:03           ` Rob Herring
2022-02-28 17:03             ` Rob Herring
2022-03-01 13:47             ` Gregory CLEMENT
2022-03-01 13:47               ` Gregory CLEMENT

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