All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: tvrtko.ursulin@linux.intel.com, michael.cheng@intel.com,
	balasubramani.vivekanandan@intel.com, wayne.boyer@intel.com,
	casey.g.bowman@intel.com, lucas.demarchi@intel.com,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v11 3/6] drm/i915/gt: Drop invalidate_csb_entries
Date: Tue, 22 Feb 2022 21:58:57 -0800	[thread overview]
Message-ID: <20220223055900.415627-4-michael.cheng@intel.com> (raw)
In-Reply-To: <20220223055900.415627-1-michael.cheng@intel.com>

Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.

v2(Michael Cheng): Drop invalidate_csb_entries function and directly
		   invoke drm_clflush_virt_range. Thanks to Tvrtko for the
		   sugguestion.

v3(Michael Cheng): Use correct parameters for drm_clflush_virt_range.
		   Thanks to Tvrtko for pointing this out.

v4(Michael Cheng): Simplify &execlists->csb_status[0] to
		   execlists->csb_status. Thanks to Matt Roper for the
		   suggestion.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
 .../gpu/drm/i915/gt/intel_execlists_submission.c    | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 961d795220a3..e5e73a1b2e4e 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
 	return inactive;
 }
 
-static void invalidate_csb_entries(const u64 *first, const u64 *last)
-{
-	clflush((void *)first);
-	clflush((void *)last);
-}
-
 /*
  * Starting with Gen12, the status has a new format:
  *
@@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
 	 * the wash as hardware, working or not, will need to do the
 	 * invalidation before.
 	 */
-	invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
+	drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0]));
 
 	/*
 	 * We assume that any event reflects a change in context flow
@@ -2783,8 +2777,9 @@ static void reset_csb_pointers(struct intel_engine_cs *engine)
 
 	/* Check that the GPU does indeed update the CSB entries! */
 	memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64));
-	invalidate_csb_entries(&execlists->csb_status[0],
-			       &execlists->csb_status[reset_value]);
+	drm_clflush_virt_range(execlists->csb_status,
+			       execlists->csb_size *
+			       sizeof(execlists->csb_status));
 
 	/* Once more for luck and our trusty paranoia */
 	ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: michael.cheng@intel.com, lucas.demarchi@intel.com,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v11 3/6] drm/i915/gt: Drop invalidate_csb_entries
Date: Tue, 22 Feb 2022 21:58:57 -0800	[thread overview]
Message-ID: <20220223055900.415627-4-michael.cheng@intel.com> (raw)
In-Reply-To: <20220223055900.415627-1-michael.cheng@intel.com>

Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.

v2(Michael Cheng): Drop invalidate_csb_entries function and directly
		   invoke drm_clflush_virt_range. Thanks to Tvrtko for the
		   sugguestion.

v3(Michael Cheng): Use correct parameters for drm_clflush_virt_range.
		   Thanks to Tvrtko for pointing this out.

v4(Michael Cheng): Simplify &execlists->csb_status[0] to
		   execlists->csb_status. Thanks to Matt Roper for the
		   suggestion.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
 .../gpu/drm/i915/gt/intel_execlists_submission.c    | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 961d795220a3..e5e73a1b2e4e 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1646,12 +1646,6 @@ cancel_port_requests(struct intel_engine_execlists * const execlists,
 	return inactive;
 }
 
-static void invalidate_csb_entries(const u64 *first, const u64 *last)
-{
-	clflush((void *)first);
-	clflush((void *)last);
-}
-
 /*
  * Starting with Gen12, the status has a new format:
  *
@@ -1999,7 +1993,7 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
 	 * the wash as hardware, working or not, will need to do the
 	 * invalidation before.
 	 */
-	invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
+	drm_clflush_virt_range(&buf[0], num_entries * sizeof(buf[0]));
 
 	/*
 	 * We assume that any event reflects a change in context flow
@@ -2783,8 +2777,9 @@ static void reset_csb_pointers(struct intel_engine_cs *engine)
 
 	/* Check that the GPU does indeed update the CSB entries! */
 	memset(execlists->csb_status, -1, (reset_value + 1) * sizeof(u64));
-	invalidate_csb_entries(&execlists->csb_status[0],
-			       &execlists->csb_status[reset_value]);
+	drm_clflush_virt_range(execlists->csb_status,
+			       execlists->csb_size *
+			       sizeof(execlists->csb_status));
 
 	/* Once more for luck and our trusty paranoia */
 	ENGINE_WRITE(engine, RING_CONTEXT_STATUS_PTR,
-- 
2.25.1


  parent reply	other threads:[~2022-02-23  5:59 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23  5:58 [PATCH v11 0/6] Use drm_clflush* instead of clflush Michael Cheng
2022-02-23  5:58 ` [Intel-gfx] " Michael Cheng
2022-02-23  5:58 ` [PATCH v11 1/6] drm: Add arch arm64 for drm_clflush_virt_range Michael Cheng
2022-02-23  5:58   ` [Intel-gfx] " Michael Cheng
2022-02-23  9:56   ` kernel test robot
2022-02-23  9:56     ` [Intel-gfx] " kernel test robot
2022-02-23 12:46   ` kernel test robot
2022-02-23 12:46     ` [Intel-gfx] " kernel test robot
2022-02-23 12:46     ` kernel test robot
2022-02-23 17:43   ` kernel test robot
2022-02-23 17:43     ` [Intel-gfx] " kernel test robot
2022-02-23  5:58 ` [PATCH v11 2/6] drm/i915/gt: Re-work intel_write_status_page Michael Cheng
2022-02-23  5:58   ` [Intel-gfx] " Michael Cheng
2022-02-23  5:58 ` Michael Cheng [this message]
2022-02-23  5:58   ` [Intel-gfx] [PATCH v11 3/6] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng
2022-02-23  5:58 ` [PATCH v11 4/6] drm/i915/gt: Re-work reset_csb Michael Cheng
2022-02-23  5:58   ` [Intel-gfx] " Michael Cheng
2022-02-23  5:58 ` [PATCH v11 5/6] drm/i915/: Re-work clflush_write32 Michael Cheng
2022-02-23  5:58   ` [Intel-gfx] " Michael Cheng
2022-02-23  5:59 ` [PATCH v11 6/6] drm/i915/gt: replace cache_clflush_range Michael Cheng
2022-02-23  5:59   ` [Intel-gfx] " Michael Cheng
2022-02-23  8:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Use drm_clflush* instead of clflush (rev10) Patchwork
2022-02-23  8:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-23  8:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-24  4:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Use drm_clflush* instead of clflush (rev11) Patchwork
2022-02-24  4:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-24  4:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-24 16:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220223055900.415627-4-michael.cheng@intel.com \
    --to=michael.cheng@intel.com \
    --cc=balasubramani.vivekanandan@intel.com \
    --cc=casey.g.bowman@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=lucas.demarchi@intel.com \
    --cc=tvrtko.ursulin@linux.intel.com \
    --cc=wayne.boyer@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.