[PATCH 0/3] Update lpddr2 revision-id binding to match lpddr3

[PATCH 0/3] Update lpddr2 revision-id binding to match lpddr3

[Julius Werner]

This patch series updates the device tree binding for "jedec,lpddr2" to
encode the revision ID (mode registers 6 and 7) in the same way as they
were already done for the "jedec,lpddr3" binding, and deprecates the old
way.

Julius Werner (3):
  dt-bindings: memory: lpddr2: Adjust revision ID property to match
    lpddr3
  memory: Update of_memory lpddr2 revision-id binding
  ARM: dts: Update jedec,lpddr2 revision-id binding

 .../memory-controllers/ddr/jedec,lpddr2.yaml  | 17 ++++++++++++--
 arch/arm/boot/dts/tegra20-asus-tf101.dts      |  2 +-
 drivers/memory/of_memory.c                    | 23 ++++++++++++-------
 3 files changed, 31 insertions(+), 11 deletions(-)

-- 
2.31.0

[PATCH v3 1/3] dt-bindings: memory: lpddr2: Adjust revision ID property to match lpddr3

[Julius Werner]

Commit 3539a2 (dt-bindings: memory: lpddr2: Add revision-id properties)
added the properties `revision-id1` and `revision-id2` to the
"jedec,lpddr2" binding. The "jedec,lpddr3" binding already had a single
array property `revision-id` for the same purpose. For consistency
between related memory types, this patch deprecates the LPDDR2
properties and instead adds a property in the same style as for LPDDR3
to that binding.

Signed-off-by: Julius Werner <jwerner@chromium.org>
---
 .../memory-controllers/ddr/jedec,lpddr2.yaml    | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

Changelog:

- v2:
  - Updated commit message to fill in commit reference to earlier patch
- v3:
  - Added `items` specification with `minimum` and `maximum` values to
    `revision-id` binding
  - Updated binding example to preserve previous revision ID values

diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
index 25ed0266f6dd3d..e9d0936861b779 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
@@ -30,12 +30,26 @@ properties:
     maximum: 255
     description: |
       Revision 1 value of SDRAM chip. Obtained from device datasheet.
+      Property is deprecated, use revision-id instead.
+    deprecated: true
 
   revision-id2:
     $ref: /schemas/types.yaml#/definitions/uint32
     maximum: 255
     description: |
       Revision 2 value of SDRAM chip. Obtained from device datasheet.
+      Property is deprecated, use revision-id instead.
+    deprecated: true
+
+  revision-id:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: |
+      Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>).
+    minItems: 2
+    maxItems: 2
+    items:
+      minimum: 0
+      maximum: 255
 
   density:
     $ref: /schemas/types.yaml#/definitions/uint32
@@ -164,8 +178,7 @@ examples:
         compatible = "elpida,ECB240ABACN", "jedec,lpddr2-s4";
         density = <2048>;
         io-width = <32>;
-        revision-id1 = <1>;
-        revision-id2 = <0>;
+        revision-id = <1 0>;
 
         tRPab-min-tck = <3>;
         tRCD-min-tck = <3>;
-- 
2.31.0

[PATCH 2/3] memory: Update of_memory lpddr2 revision-id binding

[Julius Werner]

This patch updates the code parsing the "jedec,lpddr2" device tree
binding to use the new `revision-id` property instead of the deprecated
`revision-id1` and `revision-id2` properties if available.

Signed-off-by: Julius Werner <jwerner@chromium.org>
---
 drivers/memory/of_memory.c | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/memory/of_memory.c b/drivers/memory/of_memory.c
index b94408954d85cc..454a0e6d544cac 100644
--- a/drivers/memory/of_memory.c
+++ b/drivers/memory/of_memory.c
@@ -316,14 +316,21 @@ const struct lpddr2_info
 	struct property *prop;
 	const char *cp;
 	int err;
-
-	err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
-	if (err)
-		info.revision_id1 = -ENOENT;
-
-	err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
-	if (err)
-		info.revision_id2 = -ENOENT;
+	u32 revision_id[2];
+
+	err = of_property_read_u32_array(np, "revision-id", revision_id, 2);
+	if (!err) {
+		info.revision_id1 = revision_id[0];
+		info.revision_id2 = revision_id[1];
+	} else {
+		err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
+		if (err)
+			info.revision_id1 = -ENOENT;
+
+		err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
+		if (err)
+			info.revision_id2 = -ENOENT;
+	}
 
 	err = of_property_read_u32(np, "io-width", &info.io_width);
 	if (err)
-- 
2.31.0

[PATCH 3/3] ARM: dts: Update jedec,lpddr2 revision-id binding

[Julius Werner]

This patch updates the tegra20-asus-tf101 device tree to replace the
deprecated `revision-id1` binding with the new `revision-id` binding in
its "jedec,lpddr2"-compatible node. This was the only DTS in the tree
using this binding.

The revision-id2 (mode register 7) of this memory chip was not given in
the existing device tree, so let's assume 0 for now until it becomes
relevant.

Signed-off-by: Julius Werner <jwerner@chromium.org>
---
 arch/arm/boot/dts/tegra20-asus-tf101.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra20-asus-tf101.dts b/arch/arm/boot/dts/tegra20-asus-tf101.dts
index 020172ee7340ec..c700f80e2a366e 100644
--- a/arch/arm/boot/dts/tegra20-asus-tf101.dts
+++ b/arch/arm/boot/dts/tegra20-asus-tf101.dts
@@ -756,7 +756,7 @@ emc-tables@3 {
 
 			lpddr2 {
 				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
-				revision-id1 = <1>;
+				revision-id = <1 0>;
 				density = <2048>;
 				io-width = <16>;
 			};
-- 
2.31.0

Re: [PATCH 3/3] ARM: dts: Update jedec,lpddr2 revision-id binding

[Krzysztof Kozlowski]

On 24/02/2022 01:34, Julius Werner wrote:
> This patch updates the tegra20-asus-tf101 device tree to replace the
> deprecated `revision-id1` binding with the new `revision-id` binding in
> its "jedec,lpddr2"-compatible node. This was the only DTS in the tree
> using this binding.
> 
> The revision-id2 (mode register 7) of this memory chip was not given in
> the existing device tree, so let's assume 0 for now until it becomes
> relevant.
> 
> Signed-off-by: Julius Werner <jwerner@chromium.org>
> ---
>  arch/arm/boot/dts/tegra20-asus-tf101.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Please use scripts/get_maintainer.pl to get the list of people/lists to
CC. You skipped here Tegra maintainers, so no one would pick up this patch.

I bounced the mail to Jonathan, Thierry and linux-tegra (+Cc), so
hopefully they will get it. If not, series might need resend with proper
addresses.


Best regards,
Krzysztof

Re: [PATCH 3/3] ARM: dts: Update jedec,lpddr2 revision-id binding

[Thierry Reding]

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On Thu, Feb 24, 2022 at 08:29:27AM +0100, Krzysztof Kozlowski wrote:
> On 24/02/2022 01:34, Julius Werner wrote:
> > This patch updates the tegra20-asus-tf101 device tree to replace the
> > deprecated `revision-id1` binding with the new `revision-id` binding in
> > its "jedec,lpddr2"-compatible node. This was the only DTS in the tree
> > using this binding.
> > 
> > The revision-id2 (mode register 7) of this memory chip was not given in
> > the existing device tree, so let's assume 0 for now until it becomes
> > relevant.
> > 
> > Signed-off-by: Julius Werner <jwerner@chromium.org>
> > ---
> >  arch/arm/boot/dts/tegra20-asus-tf101.dts | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Please use scripts/get_maintainer.pl to get the list of people/lists to
> CC. You skipped here Tegra maintainers, so no one would pick up this patch.
> 
> I bounced the mail to Jonathan, Thierry and linux-tegra (+Cc), so
> hopefully they will get it. If not, series might need resend with proper
> addresses.

Thanks for the bounce. Applied.

Thierry

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Re: [PATCH v3 1/3] dt-bindings: memory: lpddr2: Adjust revision ID property to match lpddr3

[Rob Herring]

On Wed, 23 Feb 2022 16:34:19 -0800, Julius Werner wrote:
> Commit 3539a2 (dt-bindings: memory: lpddr2: Add revision-id properties)
> added the properties `revision-id1` and `revision-id2` to the
> "jedec,lpddr2" binding. The "jedec,lpddr3" binding already had a single
> array property `revision-id` for the same purpose. For consistency
> between related memory types, this patch deprecates the LPDDR2
> properties and instead adds a property in the same style as for LPDDR3
> to that binding.
> 
> Signed-off-by: Julius Werner <jwerner@chromium.org>
> ---
>  .../memory-controllers/ddr/jedec,lpddr2.yaml    | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> Changelog:
> 
> - v2:
>   - Updated commit message to fill in commit reference to earlier patch
> - v3:
>   - Added `items` specification with `minimum` and `maximum` values to
>     `revision-id` binding
>   - Updated binding example to preserve previous revision ID values
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 3/3] ARM: dts: Update jedec,lpddr2 revision-id binding

[Julius Werner]

> > I bounced the mail to Jonathan, Thierry and linux-tegra (+Cc), so
> > hopefully they will get it. If not, series might need resend with proper
> > addresses.
>
> Thanks for the bounce. Applied.

Sorry, I wasn't sure how this was supposed to work for interdependent
patches, I thought they would all go through the same maintainer tree.
If you do split them up please be aware of the dependency, i.e. this
patch should not be applied anywhere without patch 1 and 2 of this
series landing first.

Re: [PATCH 3/3] ARM: dts: Update jedec,lpddr2 revision-id binding

[Krzysztof Kozlowski]

On 25/02/2022 02:41, Julius Werner wrote:
>>> I bounced the mail to Jonathan, Thierry and linux-tegra (+Cc), so
>>> hopefully they will get it. If not, series might need resend with proper
>>> addresses.
>>
>> Thanks for the bounce. Applied.
> 
> Sorry, I wasn't sure how this was supposed to work for interdependent
> patches, I thought they would all go through the same maintainer tree.
> If you do split them up please be aware of the dependency, i.e. this
> patch should not be applied anywhere without patch 1 and 2 of this
> series landing first.

DTS changes never go with driver changes. Even if within the same tree,
these will be different branches, so you cannot maintain dependency. The
cover letter therefore should mention such dependency, so DTS won't get
applied too fast.

Best regards,
Krzysztof

Re: [PATCH v3 1/3] dt-bindings: memory: lpddr2: Adjust revision ID property to match lpddr3

[Krzysztof Kozlowski]

On 24/02/2022 01:34, Julius Werner wrote:
> Commit 3539a2 (dt-bindings: memory: lpddr2: Add revision-id properties)

Please run checkpatch on your commits.

Fixed this time.


Best regards,
Krzysztof

Re: [PATCH 0/3] Update lpddr2 revision-id binding to match lpddr3

[Krzysztof Kozlowski]

On Wed, 23 Feb 2022 16:34:18 -0800, Julius Werner wrote:
> This patch series updates the device tree binding for "jedec,lpddr2" to
> encode the revision ID (mode registers 6 and 7) in the same way as they
> were already done for the "jedec,lpddr3" binding, and deprecates the old
> way.
> 
> Julius Werner (3):
>   dt-bindings: memory: lpddr2: Adjust revision ID property to match
>     lpddr3
>   memory: Update of_memory lpddr2 revision-id binding
>   ARM: dts: Update jedec,lpddr2 revision-id binding
> 
> [...]

Applied, thanks!

[1/3] dt-bindings: memory: lpddr2: Adjust revision ID property to match lpddr3
      commit: 80ce91730d3283f10810245db2605498d794fa29
[2/3] memory: Update of_memory lpddr2 revision-id binding
      commit: a06bf59d07f45a0a6ab4ab8ac69c1d708d3fadcb


Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>