* [PATCH v2] arm64: dts: mt8195: add gce node
@ 2022-02-25 2:02 ` jason-jh.lin
0 siblings, 0 replies; 2+ messages in thread
From: jason-jh.lin @ 2022-02-25 2:02 UTC (permalink / raw)
To: Rob Herring, Linus Walleij, Matthias Brugger,
AngeloGioacchino Del Regno, Paolo Bonzini, Sean Christopherson,
maciej.szmigiero, David Matlack, Jing Zhang, Marc Zyngier,
Bartosz Golaszewski, Sean Wang, Tinghan Shen
Cc: devicetree, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, ryder.lee, wenst,
chunfeng.yun, Seiya Wang, moudy.ho, roy-cw.yeh, nancy.lin,
singo.chang, Macpaul.Lin, jason-jh.lin
Add gce node and gce alias on mt8195 dts file.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
This patch is based on [1]
[1] arm64: dts: Add mediatek SoC mt8195 and evaluation board
- https://patchwork.kernel.org/project/linux-mediatek/patch/20220112114724.1953-4-tinghan.shen@mediatek.com/
--
Hi Angelo,
I'm sorry I couldn't find your last reply mail, so I reply you so late.
Thanks for the reviews!
I have fixed them.
Regards,
Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index a363e82f6988..75422c498309 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/clock/mt8195-clk.h>
+#include <dt-bindings/gce/mt8195-gce.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy.h>
@@ -18,6 +19,11 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ gce0 = &gce0;
+ gce1 = &gce1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -367,6 +373,22 @@
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
+ gce0: mailbox@10320000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10320000 0 0x4000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ };
+
+ gce1: mailbox@10330000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10330000 0 0x4000>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>;
+ };
+
scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH v2] arm64: dts: mt8195: add gce node
@ 2022-02-25 2:02 ` jason-jh.lin
0 siblings, 0 replies; 2+ messages in thread
From: jason-jh.lin @ 2022-02-25 2:02 UTC (permalink / raw)
To: Rob Herring, Linus Walleij, Matthias Brugger,
AngeloGioacchino Del Regno, Paolo Bonzini, Sean Christopherson,
maciej.szmigiero, David Matlack, Jing Zhang, Marc Zyngier,
Bartosz Golaszewski, Sean Wang, Tinghan Shen
Cc: devicetree, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group, ryder.lee, wenst,
chunfeng.yun, Seiya Wang, moudy.ho, roy-cw.yeh, nancy.lin,
singo.chang, Macpaul.Lin, jason-jh.lin
Add gce node and gce alias on mt8195 dts file.
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
This patch is based on [1]
[1] arm64: dts: Add mediatek SoC mt8195 and evaluation board
- https://patchwork.kernel.org/project/linux-mediatek/patch/20220112114724.1953-4-tinghan.shen@mediatek.com/
--
Hi Angelo,
I'm sorry I couldn't find your last reply mail, so I reply you so late.
Thanks for the reviews!
I have fixed them.
Regards,
Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index a363e82f6988..75422c498309 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/clock/mt8195-clk.h>
+#include <dt-bindings/gce/mt8195-gce.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/phy/phy.h>
@@ -18,6 +19,11 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ gce0 = &gce0;
+ gce1 = &gce1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -367,6 +373,22 @@
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
+ gce0: mailbox@10320000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10320000 0 0x4000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
+ };
+
+ gce1: mailbox@10330000 {
+ compatible = "mediatek,mt8195-gce";
+ reg = <0 0x10330000 0 0x4000>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <2>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_GCE2>;
+ };
+
scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2022-02-25 2:02 [PATCH v2] arm64: dts: mt8195: add gce node jason-jh.lin
2022-02-25 2:02 ` jason-jh.lin
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