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* [PATCH 1/2] clk: imx: add mcore_booted boot paratemter
@ 2022-02-28  6:11 ` Peng Fan (OSS)
  0 siblings, 0 replies; 6+ messages in thread
From: Peng Fan (OSS) @ 2022-02-28  6:11 UTC (permalink / raw)
  To: sboyd, shawnguo, s.hauer, abel.vesa
  Cc: kernel, festevam, linux-imx, linux-clk, linux-arm-kernel,
	linux-kernel, Peng Fan

From: Peng Fan <peng.fan@nxp.com>

Add mcore_booted boot parameter which could simplify AMP clock
management. To i.MX8M, there is CCM(clock control Module) to generate
clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
(clock gating) to gate clocks to peripherals. As below:
  anatop->ccm->ccgr->peripheral

Linux handles the clock management and the auxiliary core is under
control of Linux. Although there is per hardware domain control for CCGR
and CCM, auxiliary core normally only use CCGR hardware domain control
to avoid linux gate off the clk to peripherals and leave CCM ana anatop
to Linux.

Per NXP hardware design, because CCGR already support gate to
peripherals, and clk root gate power leakage is negligible. So
when in AMP case, we could not register the clk root gate.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk.c | 9 +++++++++
 drivers/clk/imx/clk.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index 7cc669934253..5d3ac59b382b 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -146,6 +146,15 @@ void imx_cscmr1_fixup(u32 *val)
 	return;
 }
 
+bool mcore_booted;
+
+static int __init setup_mcore_booted(char *booted)
+{
+	mcore_booted = true;
+	return 1;
+}
+__setup("mcore_booted", setup_mcore_booted);
+
 #ifndef MODULE
 
 static bool imx_keep_uart_clocks;
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index a7cbbcd1a3f4..5061a06468df 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -7,6 +7,7 @@
 #include <linux/clk-provider.h>
 
 extern spinlock_t imx_ccm_lock;
+extern bool mcore_booted;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 1/2] clk: imx: add mcore_booted boot paratemter
@ 2022-02-28  6:11 ` Peng Fan (OSS)
  0 siblings, 0 replies; 6+ messages in thread
From: Peng Fan (OSS) @ 2022-02-28  6:11 UTC (permalink / raw)
  To: sboyd, shawnguo, s.hauer, abel.vesa
  Cc: kernel, festevam, linux-imx, linux-clk, linux-arm-kernel,
	linux-kernel, Peng Fan

From: Peng Fan <peng.fan@nxp.com>

Add mcore_booted boot parameter which could simplify AMP clock
management. To i.MX8M, there is CCM(clock control Module) to generate
clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
(clock gating) to gate clocks to peripherals. As below:
  anatop->ccm->ccgr->peripheral

Linux handles the clock management and the auxiliary core is under
control of Linux. Although there is per hardware domain control for CCGR
and CCM, auxiliary core normally only use CCGR hardware domain control
to avoid linux gate off the clk to peripherals and leave CCM ana anatop
to Linux.

Per NXP hardware design, because CCGR already support gate to
peripherals, and clk root gate power leakage is negligible. So
when in AMP case, we could not register the clk root gate.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk.c | 9 +++++++++
 drivers/clk/imx/clk.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
index 7cc669934253..5d3ac59b382b 100644
--- a/drivers/clk/imx/clk.c
+++ b/drivers/clk/imx/clk.c
@@ -146,6 +146,15 @@ void imx_cscmr1_fixup(u32 *val)
 	return;
 }
 
+bool mcore_booted;
+
+static int __init setup_mcore_booted(char *booted)
+{
+	mcore_booted = true;
+	return 1;
+}
+__setup("mcore_booted", setup_mcore_booted);
+
 #ifndef MODULE
 
 static bool imx_keep_uart_clocks;
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index a7cbbcd1a3f4..5061a06468df 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -7,6 +7,7 @@
 #include <linux/clk-provider.h>
 
 extern spinlock_t imx_ccm_lock;
+extern bool mcore_booted;
 
 void imx_check_clocks(struct clk *clks[], unsigned int count);
 void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 2/2] clk: imx8m: check mcore_booted before register clk
  2022-02-28  6:11 ` Peng Fan (OSS)
@ 2022-02-28  6:11   ` Peng Fan (OSS)
  -1 siblings, 0 replies; 6+ messages in thread
From: Peng Fan (OSS) @ 2022-02-28  6:11 UTC (permalink / raw)
  To: sboyd, shawnguo, s.hauer, abel.vesa
  Cc: kernel, festevam, linux-imx, linux-clk, linux-arm-kernel,
	linux-kernel, Peng Fan

From: Peng Fan <peng.fan@nxp.com>

If mcore_booted is true, ignore the clk root gate registration and
this will simplify AMP clock management and avoid system hang unexpectly
especially Linux shutdown clk used by mcore.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

V1:
 If this method is acceptable, we could also use mcore_booted to choose
 to register the pll gate in clk-imx8mm/n/p driver

 drivers/clk/imx/clk-composite-8m.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 2dfd6149e528..b16c2c0ea9f6 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -223,14 +223,19 @@ struct clk_hw *__imx8m_clk_hw_composite(const char *name,
 	div->lock = &imx_ccm_lock;
 	div->flags = CLK_DIVIDER_ROUND_CLOSEST;
 
-	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
-	if (!gate)
-		goto fail;
-
-	gate_hw = &gate->hw;
-	gate->reg = reg;
-	gate->bit_idx = PCG_CGC_SHIFT;
-	gate->lock = &imx_ccm_lock;
+	/* skip registering the gate ops if M4 is enabled */
+	if (mcore_booted) {
+		gate_hw = NULL;
+	} else {
+		gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+		if (!gate)
+			goto fail;
+
+		gate_hw = &gate->hw;
+		gate->reg = reg;
+		gate->bit_idx = PCG_CGC_SHIFT;
+		gate->lock = &imx_ccm_lock;
+	}
 
 	hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
 			mux_hw, mux_ops, div_hw,
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH 2/2] clk: imx8m: check mcore_booted before register clk
@ 2022-02-28  6:11   ` Peng Fan (OSS)
  0 siblings, 0 replies; 6+ messages in thread
From: Peng Fan (OSS) @ 2022-02-28  6:11 UTC (permalink / raw)
  To: sboyd, shawnguo, s.hauer, abel.vesa
  Cc: kernel, festevam, linux-imx, linux-clk, linux-arm-kernel,
	linux-kernel, Peng Fan

From: Peng Fan <peng.fan@nxp.com>

If mcore_booted is true, ignore the clk root gate registration and
this will simplify AMP clock management and avoid system hang unexpectly
especially Linux shutdown clk used by mcore.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

V1:
 If this method is acceptable, we could also use mcore_booted to choose
 to register the pll gate in clk-imx8mm/n/p driver

 drivers/clk/imx/clk-composite-8m.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 2dfd6149e528..b16c2c0ea9f6 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -223,14 +223,19 @@ struct clk_hw *__imx8m_clk_hw_composite(const char *name,
 	div->lock = &imx_ccm_lock;
 	div->flags = CLK_DIVIDER_ROUND_CLOSEST;
 
-	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
-	if (!gate)
-		goto fail;
-
-	gate_hw = &gate->hw;
-	gate->reg = reg;
-	gate->bit_idx = PCG_CGC_SHIFT;
-	gate->lock = &imx_ccm_lock;
+	/* skip registering the gate ops if M4 is enabled */
+	if (mcore_booted) {
+		gate_hw = NULL;
+	} else {
+		gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+		if (!gate)
+			goto fail;
+
+		gate_hw = &gate->hw;
+		gate->reg = reg;
+		gate->bit_idx = PCG_CGC_SHIFT;
+		gate->lock = &imx_ccm_lock;
+	}
 
 	hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
 			mux_hw, mux_ops, div_hw,
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] clk: imx: add mcore_booted boot paratemter
  2022-02-28  6:11 ` Peng Fan (OSS)
@ 2022-02-28  9:49   ` Abel Vesa
  -1 siblings, 0 replies; 6+ messages in thread
From: Abel Vesa @ 2022-02-28  9:49 UTC (permalink / raw)
  To: Peng Fan (OSS)
  Cc: sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, linux-clk,
	linux-arm-kernel, linux-kernel, Peng Fan

On 22-02-28 14:11:49, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add mcore_booted boot parameter which could simplify AMP clock
> management. To i.MX8M, there is CCM(clock control Module) to generate
> clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
> (clock gating) to gate clocks to peripherals. As below:
>   anatop->ccm->ccgr->peripheral
> 
> Linux handles the clock management and the auxiliary core is under
> control of Linux. Although there is per hardware domain control for CCGR
> and CCM, auxiliary core normally only use CCGR hardware domain control
> to avoid linux gate off the clk to peripherals and leave CCM ana anatop
> to Linux.
> 
> Per NXP hardware design, because CCGR already support gate to
> peripherals, and clk root gate power leakage is negligible. So
> when in AMP case, we could not register the clk root gate.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk.c | 9 +++++++++
>  drivers/clk/imx/clk.h | 1 +
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> index 7cc669934253..5d3ac59b382b 100644
> --- a/drivers/clk/imx/clk.c
> +++ b/drivers/clk/imx/clk.c
> @@ -146,6 +146,15 @@ void imx_cscmr1_fixup(u32 *val)
>  	return;
>  }
>  
> +bool mcore_booted;
> +
> +static int __init setup_mcore_booted(char *booted)
> +{
> +	mcore_booted = true;
> +	return 1;
> +}
> +__setup("mcore_booted", setup_mcore_booted);

Lets give module_param a try first, as discussed.

Thanks.

> +
>  #ifndef MODULE
>  
>  static bool imx_keep_uart_clocks;
> diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
> index a7cbbcd1a3f4..5061a06468df 100644
> --- a/drivers/clk/imx/clk.h
> +++ b/drivers/clk/imx/clk.h
> @@ -7,6 +7,7 @@
>  #include <linux/clk-provider.h>
>  
>  extern spinlock_t imx_ccm_lock;
> +extern bool mcore_booted;
>  
>  void imx_check_clocks(struct clk *clks[], unsigned int count);
>  void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
> -- 
> 2.25.1
>

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] clk: imx: add mcore_booted boot paratemter
@ 2022-02-28  9:49   ` Abel Vesa
  0 siblings, 0 replies; 6+ messages in thread
From: Abel Vesa @ 2022-02-28  9:49 UTC (permalink / raw)
  To: Peng Fan (OSS)
  Cc: sboyd, shawnguo, s.hauer, kernel, festevam, linux-imx, linux-clk,
	linux-arm-kernel, linux-kernel, Peng Fan

On 22-02-28 14:11:49, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add mcore_booted boot parameter which could simplify AMP clock
> management. To i.MX8M, there is CCM(clock control Module) to generate
> clock root clock, anatop(analog PLL module) to generate PLL, and CCGR
> (clock gating) to gate clocks to peripherals. As below:
>   anatop->ccm->ccgr->peripheral
> 
> Linux handles the clock management and the auxiliary core is under
> control of Linux. Although there is per hardware domain control for CCGR
> and CCM, auxiliary core normally only use CCGR hardware domain control
> to avoid linux gate off the clk to peripherals and leave CCM ana anatop
> to Linux.
> 
> Per NXP hardware design, because CCGR already support gate to
> peripherals, and clk root gate power leakage is negligible. So
> when in AMP case, we could not register the clk root gate.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk.c | 9 +++++++++
>  drivers/clk/imx/clk.h | 1 +
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c
> index 7cc669934253..5d3ac59b382b 100644
> --- a/drivers/clk/imx/clk.c
> +++ b/drivers/clk/imx/clk.c
> @@ -146,6 +146,15 @@ void imx_cscmr1_fixup(u32 *val)
>  	return;
>  }
>  
> +bool mcore_booted;
> +
> +static int __init setup_mcore_booted(char *booted)
> +{
> +	mcore_booted = true;
> +	return 1;
> +}
> +__setup("mcore_booted", setup_mcore_booted);

Lets give module_param a try first, as discussed.

Thanks.

> +
>  #ifndef MODULE
>  
>  static bool imx_keep_uart_clocks;
> diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
> index a7cbbcd1a3f4..5061a06468df 100644
> --- a/drivers/clk/imx/clk.h
> +++ b/drivers/clk/imx/clk.h
> @@ -7,6 +7,7 @@
>  #include <linux/clk-provider.h>
>  
>  extern spinlock_t imx_ccm_lock;
> +extern bool mcore_booted;
>  
>  void imx_check_clocks(struct clk *clks[], unsigned int count);
>  void imx_check_clk_hws(struct clk_hw *clks[], unsigned int count);
> -- 
> 2.25.1
>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-02-28  9:50 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-28  6:11 [PATCH 1/2] clk: imx: add mcore_booted boot paratemter Peng Fan (OSS)
2022-02-28  6:11 ` Peng Fan (OSS)
2022-02-28  6:11 ` [PATCH 2/2] clk: imx8m: check mcore_booted before register clk Peng Fan (OSS)
2022-02-28  6:11   ` Peng Fan (OSS)
2022-02-28  9:49 ` [PATCH 1/2] clk: imx: add mcore_booted boot paratemter Abel Vesa
2022-02-28  9:49   ` Abel Vesa

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