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* [PATCH v2 0/8] canaan k210 SoC fixes
@ 2022-03-01 10:35 Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name Niklas Cassel
                   ` (7 more replies)
  0 siblings, 8 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Rick Chen, Leo, Lukasz Majewski, Jagan Teki,
	Simon Glass, Stefan Roese
  Cc: damien.lemoal, Niklas Cassel, u-boot

From: Niklas Cassel <niklas.cassel@wdc.com>

Hello there,

This series improves the support for the canaan k210 SoC.

Patch 1 renames a few compatible strings so that the k210 compatible
strings are identical to the ones used in Linux.

Patch 2 add missing power bus clocks, which is needed if supplying
the u-boot device tree to Linux.

Patch 3 changes two device tree properties into one, in order to
be identical to the property used in Linux.

Patch 4 changes the PLIC device tree node so that we actually configure
the PLIC the way that we think we do, when booting Linux with the u-boot
device tree. (The ordering matters.)

Patch 5 is a workaround for a k210 specific HW bug in the DW SPI.

Patch 6 is a generic bug fix for the DW SPI driver which avoids an IRQ
storm which otherwise causes the k210 to hang when booting Linux.

Patch 7-8 are bug fixes for the pinctrl driver used on k210.


Changes since v1:
-Incorporated Sean's review comments from V1.
-Picked up Sean's Reviewed-by tags.
-Added a new patch, patch 4.


Kind regards,
Niklas


Damien Le Moal (4):
  k210: use the board vendor name rather than the marketing name
  k210: dts: add missing power bus clocks
  k210: dts: align fpioa node with Linux
  spi: dw: Force set K210 fifo length to 31

Niklas Cassel (3):
  k210: dts: align plic node with Linux
  pinctrl: k210: Fix loop in k210_pc_get_drive()
  pinctrl: k210: Fix bias-pull-up

Sean Anderson (1):
  spi: dw: Actually mask interrupts

 MAINTAINERS                                   |  12 +-
 arch/riscv/dts/k210-maix-bit.dts              |   3 +-
 arch/riscv/dts/k210.dtsi                      | 177 ++++++++++--------
 board/sipeed/maix/maix.c                      |   2 +-
 doc/board/sipeed/maix.rst                     |  20 +-
 ...k210-sysctl.txt => canaan,k210-sysctl.txt} |   8 +-
 ...e,k210-fpioa.txt => canaan,k210-fpioa.txt} |  12 +-
 .../spi/snps,dw-apb-ssi.txt                   |   4 +-
 drivers/clk/Makefile                          |   2 +-
 drivers/clk/{clk_kendryte.c => clk_k210.c}    |   4 +-
 drivers/pinctrl/Makefile                      |   2 +-
 .../{pinctrl-kendryte.c => pinctrl-k210.c}    |  25 ++-
 drivers/spi/designware_spi.c                  |  20 +-
 include/configs/sipeed-maix.h                 |   2 +-
 include/{kendryte => k210}/pll.h              |   0
 test/dm/k210_pll.c                            |   2 +-
 16 files changed, 174 insertions(+), 121 deletions(-)
 rename doc/device-tree-bindings/mfd/{kendryte,k210-sysctl.txt => canaan,k210-sysctl.txt} (78%)
 rename doc/device-tree-bindings/pinctrl/{kendryte,k210-fpioa.txt => canaan,k210-fpioa.txt} (91%)
 rename drivers/clk/{clk_kendryte.c => clk_k210.c} (99%)
 rename drivers/pinctrl/{pinctrl-kendryte.c => pinctrl-k210.c} (97%)
 rename include/{kendryte => k210}/pll.h (100%)

-- 
2.35.1

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-15  9:40   ` Leo Liang
  2022-03-01 10:35 ` [PATCH v2 2/8] k210: dts: add missing power bus clocks Niklas Cassel
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Rick Chen, Leo, Lukasz Majewski, Jagan Teki, Simon Glass
  Cc: damien.lemoal, Niklas Cassel, u-boot

From: Damien Le Moal <damien.lemoal@opensource.wdc.com>

"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.

Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
---
 MAINTAINERS                                   | 12 +--
 arch/riscv/dts/k210-maix-bit.dts              |  3 +-
 arch/riscv/dts/k210.dtsi                      | 98 +++++++++----------
 board/sipeed/maix/maix.c                      |  2 +-
 doc/board/sipeed/maix.rst                     | 20 ++--
 ...k210-sysctl.txt => canaan,k210-sysctl.txt} |  8 +-
 ...e,k210-fpioa.txt => canaan,k210-fpioa.txt} | 12 +--
 .../spi/snps,dw-apb-ssi.txt                   |  4 +-
 drivers/clk/Makefile                          |  2 +-
 drivers/clk/{clk_kendryte.c => clk_k210.c}    |  4 +-
 drivers/pinctrl/Makefile                      |  2 +-
 .../{pinctrl-kendryte.c => pinctrl-k210.c}    |  6 +-
 drivers/spi/designware_spi.c                  |  4 +-
 include/configs/sipeed-maix.h                 |  2 +-
 include/{kendryte => k210}/pll.h              |  0
 test/dm/k210_pll.c                            |  2 +-
 16 files changed, 91 insertions(+), 90 deletions(-)
 rename doc/device-tree-bindings/mfd/{kendryte,k210-sysctl.txt => canaan,k210-sysctl.txt} (78%)
 rename doc/device-tree-bindings/pinctrl/{kendryte,k210-fpioa.txt => canaan,k210-fpioa.txt} (91%)
 rename drivers/clk/{clk_kendryte.c => clk_k210.c} (99%)
 rename drivers/pinctrl/{pinctrl-kendryte.c => pinctrl-k210.c} (98%)
 rename include/{kendryte => k210}/pll.h (100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index fb171e0c68..4c64e2463a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1115,14 +1115,14 @@ F:	drivers/timer/andes_plmt_timer.c
 F:	drivers/timer/sifive_clint_timer.c
 F:	tools/prelink-riscv.c
 
-RISC-V KENDRYTE
+RISC-V CANAAN KENDRYTE K210
 M:	Sean Anderson <seanga2@gmail.com>
 S:	Maintained
-F:	doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
-F:	doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
-F:	drivers/clk/clk_kendryte.c
-F:	drivers/pinctrl/pinctrl-kendryte.c
-F:	include/kendryte/
+F:	doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
+F:	doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
+F:	drivers/clk/clk_k210.c
+F:	drivers/pinctrl/pinctrl-k210.c
+F:	include/k210/
 
 RNG
 M:	Sughosh Ganu <sughosh.ganu@linaro.org>
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
index 902dcfd08a..c4bbf6b018 100644
--- a/arch/riscv/dts/k210-maix-bit.dts
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -12,7 +12,8 @@
 
 / {
 	model = "Sipeed Maix Bit 2.0";
-	compatible = "sipeed,maix-bitm", "sipeed,maix-bit", "kendryte,k210";
+	compatible = "sipeed,maix-bitm", "sipeed,maix-bit",
+		     "canaan,kendryte-k210";
 
 	chosen {
 		stdout-path = "serial0:115200";
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 8bcd3cebde..7dc2785a3e 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -15,7 +15,7 @@
 	 */
 	#address-cells = <1>;
 	#size-cells = <1>;
-	compatible = "kendryte,k210";
+	compatible = "canaan,kendryte-k210";
 
 	aliases {
 		cpu0 = &cpu0;
@@ -46,7 +46,7 @@
 		timebase-frequency = <7800000>;
 		cpu0: cpu@0 {
 			device_type = "cpu";
-			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
+			compatible = "canaan,k210", "sifive,rocket0", "riscv";
 			reg = <0>;
 			riscv,isa = "rv64imafdgc";
 			mmu-type = "sv39";
@@ -63,7 +63,7 @@
 		};
 		cpu1: cpu@1 {
 			device_type = "cpu";
-			compatible = "kendryte,k210", "sifive,rocket0", "riscv";
+			compatible = "canaan,k210", "sifive,rocket0", "riscv";
 			reg = <1>;
 			riscv,isa = "rv64imafdgc";
 			mmu-type = "sv39";
@@ -82,7 +82,7 @@
 
 	sram: memory@80000000 {
 		device_type = "memory";
-		compatible = "kendryte,k210-sram";
+		compatible = "canaan,k210-sram";
 		reg = <0x80000000 0x400000>,
 		      <0x80400000 0x200000>,
 		      <0x80600000 0x200000>;
@@ -106,12 +106,12 @@
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "kendryte,k210-soc", "simple-bus";
+		compatible = "canaan,k210-soc", "simple-bus";
 		ranges;
 		interrupt-parent = <&plic0>;
 
 		debug0: debug@0 {
-			compatible = "kendryte,k210-debug", "riscv,debug";
+			compatible = "canaan,k210-debug", "riscv,debug";
 			reg = <0x0 0x1000>;
 		};
 
@@ -122,7 +122,7 @@
 
 		clint0: clint@2000000 {
 			#interrupt-cells = <1>;
-			compatible = "kendryte,k210-clint", "riscv,clint0";
+			compatible = "canaan,k210-clint", "sifive,clint0", "riscv,clint0";
 			reg = <0x2000000 0xC000>;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
 					      <&cpu1_intc 3>, <&cpu1_intc 7>;
@@ -131,7 +131,7 @@
 
 		plic0: interrupt-controller@C000000 {
 			#interrupt-cells = <1>;
-			compatible = "kendryte,k210-plic", "riscv,plic0";
+			compatible = "canaan,k210-plic", "sifive,plic-1.0.0", "riscv,plic0";
 			reg = <0xC000000 0x4000000>;
 			interrupt-controller;
 			interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
@@ -141,7 +141,7 @@
 		};
 
 		uarths0: serial@38000000 {
-			compatible = "kendryte,k210-uarths", "sifive,uart0";
+			compatible = "canaan,k210-uarths", "sifive,uart0";
 			reg = <0x38000000 0x1000>;
 			interrupts = <33>;
 			clocks = <&sysclk K210_CLK_CPU>;
@@ -151,7 +151,7 @@
 		gpio0: gpio-controller@38001000 {
 			#interrupt-cells = <2>;
 			#gpio-cells = <2>;
-			compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
+			compatible = "canaan,k210-gpiohs", "sifive,gpio0";
 			reg = <0x38001000 0x1000>;
 			interrupt-controller;
 			interrupts = <34 35 36 37 38 39 40 41
@@ -164,7 +164,7 @@
 		};
 
 		kpu0: kpu@40800000 {
-			compatible = "kendryte,k210-kpu";
+			compatible = "canaan,k210-kpu";
 			reg = <0x40800000 0xc00000>;
 			interrupts = <25>;
 			clocks = <&sysclk K210_CLK_AI>;
@@ -172,7 +172,7 @@
 		};
 
 		fft0: fft@42000000 {
-			compatible = "kendryte,k210-fft";
+			compatible = "canaan,k210-fft";
 			reg = <0x42000000 0x400000>;
 			interrupts = <26>;
 			clocks = <&sysclk K210_CLK_FFT>;
@@ -181,7 +181,7 @@
 		};
 
 		dmac0: dma-controller@50000000 {
-			compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
+			compatible = "canaan,k210-dmac", "snps,axi-dma-1.01a";
 			reg = <0x50000000 0x1000>;
 			interrupts = <27 28 29 30 31 32>;
 			clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
@@ -199,14 +199,14 @@
 		apb0: bus@50200000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			compatible = "kendryte,k210-apb", "simple-pm-bus";
+			compatible = "canaan,k210-apb", "simple-pm-bus";
 			ranges;
 			clocks = <&sysclk K210_CLK_APB0>;
 
 			gpio1: gpio-controller@50200000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "kendryte,k210-gpio",
+				compatible = "canaan,k210-gpio",
 					     "snps,dw-apb-gpio";
 				reg = <0x50200000 0x80>;
 				clocks = <&sysclk K210_CLK_GPIO>;
@@ -226,7 +226,7 @@
 			};
 
 			uart1: serial@50210000 {
-				compatible = "kendryte,k210-uart",
+				compatible = "canaan,k210-uart",
 					     "snps,dw-apb-uart";
 				reg = <0x50210000 0x100>;
 				interrupts = <11>;
@@ -242,7 +242,7 @@
 			};
 
 			uart2: serial@50220000 {
-				compatible = "kendryte,k210-uart",
+				compatible = "canaan,k210-uart",
 					     "snps,dw-apb-uart";
 				reg = <0x50220000 0x100>;
 				interrupts = <12>;
@@ -258,7 +258,7 @@
 			};
 
 			uart3: serial@50230000 {
-				compatible = "kendryte,k210-uart",
+				compatible = "canaan,k210-uart",
 					     "snps,dw-apb-uart";
 				reg = <0x50230000 0x100>;
 				interrupts = <13>;
@@ -274,7 +274,7 @@
 			};
 
 			spi2: spi@50240000 {
-				compatible = "canaan,kendryte-k210-spi",
+				compatible = "canaan,k210-spi",
 					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				spi-slave;
@@ -287,7 +287,7 @@
 			};
 
 			i2s0: i2s@50250000 {
-				compatible = "kendryte,k210-i2s",
+				compatible = "canaan,k210-i2s",
 					     "snps,designware-i2s";
 				reg = <0x50250000 0x200>;
 				interrupts = <5>;
@@ -298,13 +298,13 @@
 			};
 
 			apu0: sound@520250200 {
-				compatible = "kendryte,k210-apu";
+				compatible = "canaan,k210-apu";
 				reg = <0x50250200 0x200>;
 				status = "disabled";
 			};
 
 			i2s1: i2s@50260000 {
-				compatible = "kendryte,k210-i2s",
+				compatible = "canaan,k210-i2s",
 					     "snps,designware-i2s";
 				reg = <0x50260000 0x200>;
 				interrupts = <6>;
@@ -315,7 +315,7 @@
 			};
 
 			i2s2: i2s@50270000 {
-				compatible = "kendryte,k210-i2s",
+				compatible = "canaan,k210-i2s",
 					     "snps,designware-i2s";
 				reg = <0x50270000 0x200>;
 				interrupts = <7>;
@@ -326,7 +326,7 @@
 			};
 
 			i2c0: i2c@50280000 {
-				compatible = "kendryte,k210-i2c",
+				compatible = "canaan,k210-i2c",
 					     "snps,designware-i2c";
 				reg = <0x50280000 0x100>;
 				interrupts = <8>;
@@ -336,7 +336,7 @@
 			};
 
 			i2c1: i2c@50290000 {
-				compatible = "kendryte,k210-i2c",
+				compatible = "canaan,k210-i2c",
 					     "snps,designware-i2c";
 				reg = <0x50290000 0x100>;
 				interrupts = <9>;
@@ -346,7 +346,7 @@
 			};
 
 			i2c2: i2c@502A0000 {
-				compatible = "kendryte,k210-i2c",
+				compatible = "canaan,k210-i2c",
 					     "snps,designware-i2c";
 				reg = <0x502A0000 0x100>;
 				interrupts = <10>;
@@ -356,12 +356,12 @@
 			};
 
 			fpioa: pinmux@502B0000 {
-				compatible = "kendryte,k210-fpioa";
+				compatible = "canaan,k210-fpioa";
 				reg = <0x502B0000 0x100>;
 				clocks = <&sysclk K210_CLK_FPIOA>;
 				resets = <&sysrst K210_RST_FPIOA>;
-				kendryte,sysctl = <&sysctl>;
-				kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
+				canaan,k210-sysctl = <&sysctl>;
+				canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
 				pinctrl-0 = <&fpioa_jtag>;
 				pinctrl-names = "default";
 				status = "disabled";
@@ -375,7 +375,7 @@
 			};
 
 			sha256: sha256@502C0000 {
-				compatible = "kendryte,k210-sha256";
+				compatible = "canaan,k210-sha256";
 				reg = <0x502C0000 0x100>;
 				clocks = <&sysclk K210_CLK_SHA>;
 				resets = <&sysrst K210_RST_SHA>;
@@ -383,7 +383,7 @@
 			};
 
 			timer0: timer@502D0000 {
-				compatible = "kendryte,k210-timer",
+				compatible = "canaan,k210-timer",
 					     "snps,dw-apb-timer";
 				reg = <0x502D0000 0x100>;
 				interrupts = <14 15>;
@@ -394,7 +394,7 @@
 			};
 
 			timer1: timer@502E0000 {
-				compatible = "kendryte,k210-timer",
+				compatible = "canaan,k210-timer",
 					     "snps,dw-apb-timer";
 				reg = <0x502E0000 0x100>;
 				interrupts = <16 17>;
@@ -405,7 +405,7 @@
 			};
 
 			timer2: timer@502F0000 {
-				compatible = "kendryte,k210-timer",
+				compatible = "canaan,k210-timer",
 					     "snps,dw-apb-timer";
 				reg = <0x502F0000 0x100>;
 				interrupts = <18 19>;
@@ -419,12 +419,12 @@
 		apb1: bus@50400000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			compatible = "kendryte,k210-apb", "simple-pm-bus";
+			compatible = "canaan,k210-apb", "simple-pm-bus";
 			ranges;
 			clocks = <&sysclk K210_CLK_APB1>;
 
 			wdt0: watchdog@50400000 {
-				compatible = "kendryte,k210-wdt", "snps,dw-wdt";
+				compatible = "canaan,k210-wdt", "snps,dw-wdt";
 				reg = <0x50400000 0x100>;
 				interrupts = <21>;
 				clocks = <&sysclk K210_CLK_WDT0>;
@@ -432,7 +432,7 @@
 			};
 
 			wdt1: watchdog@50410000 {
-				compatible = "kendryte,k210-wdt", "snps,dw-wdt";
+				compatible = "canaan,k210-wdt", "snps,dw-wdt";
 				reg = <0x50410000 0x100>;
 				interrupts = <22>;
 				clocks = <&sysclk K210_CLK_WDT1>;
@@ -443,7 +443,7 @@
 			otp0: nvmem@50420000 {
 				#address-cells = <1>;
 				#size-cells = <1>;
-				compatible = "kendryte,k210-otp";
+				compatible = "canaan,k210-otp";
 				reg = <0x50420000 0x100>,
 				      <0x88000000 0x20000>;
 				reg-names = "reg", "mem";
@@ -480,18 +480,18 @@
 			};
 
 			dvp0: camera@50430000 {
-				compatible = "kendryte,k210-dvp";
+				compatible = "canaan,k210-dvp";
 				reg = <0x50430000 0x100>;
 				interrupts = <24>;
 				clocks = <&sysclk K210_CLK_DVP>;
 				resets = <&sysrst K210_RST_DVP>;
-				kendryte,sysctl = <&sysctl>;
-				kendryte,misc-offset = <K210_SYSCTL_MISC>;
+				canaan,k210-sysctl = <&sysctl>;
+				canaan,k210-misc-offset = <K210_SYSCTL_MISC>;
 				status = "disabled";
 			};
 
 			sysctl: syscon@50440000 {
-				compatible = "kendryte,k210-sysctl",
+				compatible = "canaan,k210-sysctl",
 					     "syscon", "simple-mfd";
 				reg = <0x50440000 0x100>;
 				reg-io-width = <4>;
@@ -499,7 +499,7 @@
 
 				sysclk: clock-controller {
 					#clock-cells = <1>;
-					compatible = "kendryte,k210-clk";
+					compatible = "canaan,k210-clk";
 					clocks = <&in0>;
 					assigned-clocks = <&sysclk K210_CLK_PLL1>;
 					assigned-clock-rates = <390000000>;
@@ -507,7 +507,7 @@
 				};
 
 				sysrst: reset-controller {
-					compatible = "kendryte,k210-rst",
+					compatible = "canaan,k210-rst",
 						     "syscon-reset";
 					#reset-cells = <1>;
 					regmap = <&sysctl>;
@@ -526,7 +526,7 @@
 			};
 
 			aes0: aes@50450000 {
-				compatible = "kendryte,k210-aes";
+				compatible = "canaan,k210-aes";
 				reg = <0x50450000 0x100>;
 				clocks = <&sysclk K210_CLK_AES>;
 				resets = <&sysrst K210_RST_AES>;
@@ -534,7 +534,7 @@
 			};
 
 			rtc: rtc@50460000 {
-				compatible = "kendryte,k210-rtc";
+				compatible = "canaan,k210-rtc";
 				reg = <0x50460000 0x100>;
 				clocks = <&in0>;
 				resets = <&sysrst K210_RST_RTC>;
@@ -546,14 +546,14 @@
 		apb2: bus@52000000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-			compatible = "kendryte,k210-apb", "simple-pm-bus";
+			compatible = "canaan,k210-apb", "simple-pm-bus";
 			ranges;
 			clocks = <&sysclk K210_CLK_APB2>;
 
 			spi0: spi@52000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "canaan,kendryte-k210-spi",
+				compatible = "canaan,k210-spi",
 					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				reg = <0x52000000 0x100>;
@@ -570,7 +570,7 @@
 			spi1: spi@53000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "canaan,kendryte-k210-spi",
+				compatible = "canaan,k210-spi",
 					     "snps,dw-apb-ssi-4.01",
 					     "snps,dw-apb-ssi";
 				reg = <0x53000000 0x100>;
@@ -587,7 +587,7 @@
 			spi3: spi@54000000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "canaan,kendryte-k210-ssi",
+				compatible = "canaan,k210-ssi",
 					     "snps,dwc-ssi-1.01a";
 				reg = <0x54000000 0x200>;
 				interrupts = <4>;
diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
index 52e4fee2f0..a218278cb3 100644
--- a/board/sipeed/maix/maix.c
+++ b/board/sipeed/maix/maix.c
@@ -22,7 +22,7 @@ static int sram_init(void)
 	struct clk clk;
 
 	/* Enable RAM clocks */
-	memory = ofnode_by_compatible(ofnode_null(), "kendryte,k210-sram");
+	memory = ofnode_by_compatible(ofnode_null(), "canaan,k210-sram");
 	if (ofnode_equal(memory, ofnode_null()))
 		return -ENOENT;
 
diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst
index ef79297ef0..903f8831d7 100644
--- a/doc/board/sipeed/maix.rst
+++ b/doc/board/sipeed/maix.rst
@@ -4,16 +4,16 @@
 MAIX
 ====
 
-Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor,
-a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate
-neural network processing and other "ai" tasks. This includes a "KPU" neural
-network processor, an audio processor supporting beamforming reception, and a
-digital video port supporting capture and output at VGA resolution. Other
-peripherals include 8M of SRAM (accessible with and without caching); remappable
-pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller;
-and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash;
-on-board usb-serial bridges; ports for cameras, displays, and sd cards; and
-ESP32 chips.
+Several of the Sipeed Maix series of boards contain the Kendryte K210 processor,
+a 64-bit RISC-V CPU produced by Canaan Inc. This processor contains several
+peripherals to accelerate neural network processing and other "ai" tasks. This
+includes a "KPU" neural network processor, an audio processor supporting
+beamforming reception, and a digital video port supporting capture and output at
+VGA resolution. Other peripherals include 8M of SRAM (accessible with and
+without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
+accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
+peripherals vary, but include spi flash; on-board usb-serial bridges; ports for
+cameras, displays, and sd cards; and ESP32 chips.
 
 Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are
 supported, but the boards are fairly similar.
diff --git a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
similarity index 78%
rename from doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
rename to doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
index 5b24abcb62..e48b164fc0 100644
--- a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
+++ b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
@@ -6,7 +6,7 @@ be reference by other bindings which need a phandle to the K210 sysctl regmap.
 
 Required properties:
 - compatible: should be
-	"kendryte,k210-sysctl", "syscon", "simple-mfd"
+	"canaan,k210-sysctl", "syscon", "simple-mfd"
 - reg: address and length of the sysctl registers
 - reg-io-width: must be <4>
 
@@ -15,18 +15,18 @@ Clock sub-node
 This node is a binding for the clock tree driver
 
 Required properties:
-- compatible: should be "kendryte,k210-clk"
+- compatible: should be "canaan,k210-clk"
 - clocks: phandle to the "in0" external oscillator
 - #clock-cells: must be <1>
 
 Example:
 sysctl: syscon@50440000 {
-	compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd";
+	compatible = "canaan,k210-sysctl", "syscon", "simple-mfd";
 	reg = <0x50440000 0x100>;
 	reg-io-width = <4>;
 
 	sysclk: clock-controller {
-		compatible = "kendryte,k210-clk";
+		compatible = "canaan,k210-clk";
 		clocks = <&in0>;
 		#clock-cells = <1>;
 	};
diff --git a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
similarity index 91%
rename from doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
rename to doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
index 73871f5930..deca0cfab7 100644
--- a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
+++ b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
@@ -5,10 +5,10 @@ in Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48
 pins.
 
 Required properties:
-- compatible: should be "kendryte,k210-fpioa"
+- compatible: should be "canaan,k210-fpioa"
 - reg: address and length of the FPIOA registers
-- kendryte,sysctl: phandle to the "sysctl" register map node
-- kendryte,power-offset: offset in the register map of the power bank control
+- canaan,sysctl: phandle to the "sysctl" register map node
+- canaan,k210-power-offset: offset in the register map of the power bank control
   register (in bytes)
 
 Configuration nodes
@@ -54,10 +54,10 @@ Notes on specific properties include:
 
 Example:
 fpioa: pinmux@502B0000 {
-	compatible = "kendryte,k210-fpioa";
+	compatible = "canaan,k210-fpioa";
 	reg = <0x502B0000 0x100>;
-	kendryte,sysctl = <&sysctl>;
-	kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
+	canaan,k210-sysctl = <&sysctl>;
+	canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
 
 	/* JTAG running at 3.3V and driven at 11 mA */
 	fpioa_jtag: jtag {
diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
index 8d2888fbe3..7a0f11c53b 100644
--- a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -5,8 +5,8 @@ Required properties:
 - compatible : One of
   "altr,socfpga-spi",
   "altr,socfpga-arria10-spi",
-  "canaan,kendryte-k210-spi",
-  "canaan,kendryte-k210-ssi",
+  "canaan,k210-spi",
+  "canaan,k210-ssi",
   "intel,stratix10-spi",
   "intel,agilex-spi",
   "mscc,ocelot-spi",
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index f922a7c323..bb4eee5d99 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
-obj-$(CONFIG_CLK_K210) += clk_kendryte.o
+obj-$(CONFIG_CLK_K210) += clk_k210.o
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
 obj-$(CONFIG_CLK_MPFS) += microchip/
 obj-$(CONFIG_CLK_MVEBU) += mvebu/
diff --git a/drivers/clk/clk_kendryte.c b/drivers/clk/clk_k210.c
similarity index 99%
rename from drivers/clk/clk_kendryte.c
rename to drivers/clk/clk_k210.c
index 97efda5b6f..1961efaa5e 100644
--- a/drivers/clk/clk_kendryte.c
+++ b/drivers/clk/clk_k210.c
@@ -14,7 +14,7 @@
 #include <serial.h>
 #include <dt-bindings/clock/k210-sysctl.h>
 #include <dt-bindings/mfd/k210-sysctl.h>
-#include <kendryte/pll.h>
+#include <k210/pll.h>
 #include <linux/bitfield.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -1271,7 +1271,7 @@ static int k210_clk_probe(struct udevice *dev)
 }
 
 static const struct udevice_id k210_clk_ids[] = {
-	{ .compatible = "kendryte,k210-clk" },
+	{ .compatible = "canaan,k210-clk" },
 	{ },
 };
 
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index fd736a7f64..df37c32033 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_PINCTRL_PIC32)	+= pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)	+= exynos/
-obj-$(CONFIG_PINCTRL_K210)	+= pinctrl-kendryte.o
+obj-$(CONFIG_PINCTRL_K210)	+= pinctrl-k210.o
 obj-$(CONFIG_PINCTRL_MESON)	+= meson/
 obj-$(CONFIG_PINCTRL_MTK)	+= mediatek/
 obj-$(CONFIG_PINCTRL_MSCC)	+= mscc/
diff --git a/drivers/pinctrl/pinctrl-kendryte.c b/drivers/pinctrl/pinctrl-k210.c
similarity index 98%
rename from drivers/pinctrl/pinctrl-kendryte.c
rename to drivers/pinctrl/pinctrl-k210.c
index 09d51ca676..bb5153c673 100644
--- a/drivers/pinctrl/pinctrl-kendryte.c
+++ b/drivers/pinctrl/pinctrl-k210.c
@@ -692,13 +692,13 @@ static int k210_pc_probe(struct udevice *dev)
 	if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
 		goto err;
 
-	priv->sysctl = syscon_regmap_lookup_by_phandle(dev, "kendryte,sysctl");
+	priv->sysctl = syscon_regmap_lookup_by_phandle(dev, "canaan,k210-sysctl");
 	if (IS_ERR(priv->sysctl)) {
 		ret = -ENODEV;
 		goto err;
 	}
 
-	ret = dev_read_u32(dev, "kendryte,power-offset", &priv->power_offset);
+	ret = dev_read_u32(dev, "canaan,k210-power-offset", &priv->power_offset);
 	if (ret)
 		goto err;
 
@@ -726,7 +726,7 @@ err:
 }
 
 static const struct udevice_id k210_pc_ids[] = {
-	{ .compatible = "kendryte,k210-fpioa" },
+	{ .compatible = "canaan,k210-fpioa" },
 	{ }
 };
 
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index fc22f540fe..9200efced9 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -758,8 +758,8 @@ static const struct udevice_id dw_spi_ids[] = {
 	 */
 	{ .compatible = "altr,socfpga-spi", .data = (ulong)dw_spi_apb_init },
 	{ .compatible = "altr,socfpga-arria10-spi", .data = (ulong)dw_spi_apb_init },
-	{ .compatible = "canaan,kendryte-k210-spi", .data = (ulong)dw_spi_apb_init },
-	{ .compatible = "canaan,kendryte-k210-ssi", .data = (ulong)dw_spi_dwc_init },
+	{ .compatible = "canaan,k210-spi", .data = (ulong)dw_spi_apb_init },
+	{ .compatible = "canaan,k210-ssi", .data = (ulong)dw_spi_dwc_init },
 	{ .compatible = "intel,stratix10-spi", .data = (ulong)dw_spi_apb_init },
 	{ .compatible = "intel,agilex-spi", .data = (ulong)dw_spi_apb_init },
 	{ .compatible = "mscc,ocelot-spi", .data = (ulong)dw_spi_apb_init },
diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
index 1f74702ea7..1cc2992c80 100644
--- a/include/configs/sipeed-maix.h
+++ b/include/configs/sipeed-maix.h
@@ -20,7 +20,7 @@
 	"fdt_addr_r=0x80400000\0" \
 	"scriptaddr=0x80020000\0" \
 	"kernel_addr_r=0x80060000\0" \
-	"fdtfile=kendryte/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+	"fdtfile=k210/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
 	"k210_bootcmd=load mmc 0:1 $loadaddr /uImage && " \
 		"load mmc 0:1 $fdt_addr_r /k210.dtb && " \
 		"bootm $loadaddr - $fdt_addr_r\0"
diff --git a/include/kendryte/pll.h b/include/k210/pll.h
similarity index 100%
rename from include/kendryte/pll.h
rename to include/k210/pll.h
diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c
index f55379f336..a0cc84c396 100644
--- a/test/dm/k210_pll.c
+++ b/test/dm/k210_pll.c
@@ -7,7 +7,7 @@
 /* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
 #include <div64.h>
 #include <dm/test.h>
-#include <kendryte/pll.h>
+#include <k210/pll.h>
 #include <test/ut.h>
 
 static int dm_test_k210_pll_calc_config(u32 rate, u32 rate_in,
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 2/8] k210: dts: add missing power bus clocks
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 3/8] k210: dts: align fpioa node with Linux Niklas Cassel
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Rick Chen, Leo; +Cc: damien.lemoal, Niklas Cassel, u-boot

From: Damien Le Moal <damien.lemoal@opensource.wdc.com>

Linux drivers for many of the K210 peripherals depend on the power bus
clock to be specified. Add the missing clocks and their names to avoid
problems when booting Linux using u-boot DT.

Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 arch/riscv/dts/k210.dtsi | 76 ++++++++++++++++++++++++++++------------
 1 file changed, 53 insertions(+), 23 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 7dc2785a3e..5c88c8ea8e 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -209,7 +209,9 @@
 				compatible = "canaan,k210-gpio",
 					     "snps,dw-apb-gpio";
 				reg = <0x50200000 0x80>;
-				clocks = <&sysclk K210_CLK_GPIO>;
+				clocks = <&sysclk K210_CLK_APB0>,
+					 <&sysclk K210_CLK_GPIO>;
+				clock-names = "bus", "db";
 				resets = <&sysrst K210_RST_GPIO>;
 				status = "disabled";
 
@@ -230,7 +232,9 @@
 					     "snps,dw-apb-uart";
 				reg = <0x50210000 0x100>;
 				interrupts = <11>;
-				clocks = <&sysclk K210_CLK_UART1>;
+				clocks = <&sysclk K210_CLK_UART1>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "baudclk", "apb_pclk";
 				resets = <&sysrst K210_RST_UART1>;
 				reg-io-width = <4>;
 				reg-shift = <2>;
@@ -246,7 +250,9 @@
 					     "snps,dw-apb-uart";
 				reg = <0x50220000 0x100>;
 				interrupts = <12>;
-				clocks = <&sysclk K210_CLK_UART2>;
+				clocks = <&sysclk K210_CLK_UART2>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "baudclk", "apb_pclk";
 				resets = <&sysrst K210_RST_UART2>;
 				reg-io-width = <4>;
 				reg-shift = <2>;
@@ -262,7 +268,9 @@
 					     "snps,dw-apb-uart";
 				reg = <0x50230000 0x100>;
 				interrupts = <13>;
-				clocks = <&sysclk K210_CLK_UART3>;
+				clocks = <&sysclk K210_CLK_UART3>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "baudclk", "apb_pclk";
 				resets = <&sysrst K210_RST_UART3>;
 				reg-io-width = <4>;
 				reg-shift = <2>;
@@ -280,7 +288,9 @@
 				spi-slave;
 				reg = <0x50240000 0x100>;
 				interrupts = <2>;
-				clocks = <&sysclk K210_CLK_SPI2>;
+				clocks = <&sysclk K210_CLK_SPI2>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "ssi_clk", "pclk";
 				resets = <&sysrst K210_RST_SPI2>;
 				spi-max-frequency = <25000000>;
 				status = "disabled";
@@ -330,7 +340,9 @@
 					     "snps,designware-i2c";
 				reg = <0x50280000 0x100>;
 				interrupts = <8>;
-				clocks = <&sysclk K210_CLK_I2C0>;
+				clocks = <&sysclk K210_CLK_I2C0>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "ref", "pclk";
 				resets = <&sysrst K210_RST_I2C0>;
 				status = "disabled";
 			};
@@ -340,7 +352,9 @@
 					     "snps,designware-i2c";
 				reg = <0x50290000 0x100>;
 				interrupts = <9>;
-				clocks = <&sysclk K210_CLK_I2C1>;
+				clocks = <&sysclk K210_CLK_I2C1>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "ref", "pclk";
 				resets = <&sysrst K210_RST_I2C1>;
 				status = "disabled";
 			};
@@ -350,7 +364,9 @@
 					     "snps,designware-i2c";
 				reg = <0x502A0000 0x100>;
 				interrupts = <10>;
-				clocks = <&sysclk K210_CLK_I2C2>;
+				clocks = <&sysclk K210_CLK_I2C2>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "ref", "pclk";
 				resets = <&sysrst K210_RST_I2C2>;
 				status = "disabled";
 			};
@@ -358,7 +374,9 @@
 			fpioa: pinmux@502B0000 {
 				compatible = "canaan,k210-fpioa";
 				reg = <0x502B0000 0x100>;
-				clocks = <&sysclk K210_CLK_FPIOA>;
+				clocks = <&sysclk K210_CLK_FPIOA>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "ref", "pclk";
 				resets = <&sysrst K210_RST_FPIOA>;
 				canaan,k210-sysctl = <&sysctl>;
 				canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
@@ -387,8 +405,9 @@
 					     "snps,dw-apb-timer";
 				reg = <0x502D0000 0x100>;
 				interrupts = <14 15>;
-				clocks = <&sysclk K210_CLK_TIMER0>;
-				clock-names = "timer";
+				clocks = <&sysclk K210_CLK_TIMER0>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "timer", "pclk";
 				resets = <&sysrst K210_RST_TIMER0>;
 				status = "disabled";
 			};
@@ -398,8 +417,9 @@
 					     "snps,dw-apb-timer";
 				reg = <0x502E0000 0x100>;
 				interrupts = <16 17>;
-				clocks = <&sysclk K210_CLK_TIMER1>;
-				clock-names = "timer";
+				clocks = <&sysclk K210_CLK_TIMER1>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "timer", "pclk";
 				resets = <&sysrst K210_RST_TIMER1>;
 				status = "disabled";
 			};
@@ -409,8 +429,9 @@
 					     "snps,dw-apb-timer";
 				reg = <0x502F0000 0x100>;
 				interrupts = <18 19>;
-				clocks = <&sysclk K210_CLK_TIMER2>;
-				clock-names = "timer";
+				clocks = <&sysclk K210_CLK_TIMER2>,
+					 <&sysclk K210_CLK_APB0>;
+				clock-names = "timer", "pclk";
 				resets = <&sysrst K210_RST_TIMER2>;
 				status = "disabled";
 			};
@@ -427,7 +448,9 @@
 				compatible = "canaan,k210-wdt", "snps,dw-wdt";
 				reg = <0x50400000 0x100>;
 				interrupts = <21>;
-				clocks = <&sysclk K210_CLK_WDT0>;
+				clocks = <&sysclk K210_CLK_WDT0>,
+					 <&sysclk K210_CLK_APB1>;
+				clock-names = "tclk", "pclk";
 				resets = <&sysrst K210_RST_WDT0>;
 			};
 
@@ -435,7 +458,9 @@
 				compatible = "canaan,k210-wdt", "snps,dw-wdt";
 				reg = <0x50410000 0x100>;
 				interrupts = <22>;
-				clocks = <&sysclk K210_CLK_WDT1>;
+				clocks = <&sysclk K210_CLK_WDT1>,
+					 <&sysclk K210_CLK_APB1>;
+				clock-names = "tclk", "pclk";
 				resets = <&sysrst K210_RST_WDT1>;
 				status = "disabled";
 			};
@@ -494,6 +519,8 @@
 				compatible = "canaan,k210-sysctl",
 					     "syscon", "simple-mfd";
 				reg = <0x50440000 0x100>;
+				clocks = <&sysclk K210_CLK_APB1>;
+				clock-names = "pclk";
 				reg-io-width = <4>;
 				u-boot,dm-pre-reloc;
 
@@ -558,8 +585,9 @@
 					     "snps,dw-apb-ssi";
 				reg = <0x52000000 0x100>;
 				interrupts = <1>;
-				clocks = <&sysclk K210_CLK_SPI0>;
-				clock-names = "ssi_clk";
+				clocks = <&sysclk K210_CLK_SPI0>,
+					 <&sysclk K210_CLK_APB2>;
+				clock-names = "ssi_clk", "pclk";
 				resets = <&sysrst K210_RST_SPI0>;
 				spi-max-frequency = <25000000>;
 				num-cs = <4>;
@@ -575,8 +603,9 @@
 					     "snps,dw-apb-ssi";
 				reg = <0x53000000 0x100>;
 				interrupts = <2>;
-				clocks = <&sysclk K210_CLK_SPI1>;
-				clock-names = "ssi_clk";
+				clocks = <&sysclk K210_CLK_SPI1>,
+					 <&sysclk K210_CLK_APB2>;
+				clock-names = "ssi_clk", "pclk";
 				resets = <&sysrst K210_RST_SPI1>;
 				spi-max-frequency = <25000000>;
 				num-cs = <4>;
@@ -591,8 +620,9 @@
 					     "snps,dwc-ssi-1.01a";
 				reg = <0x54000000 0x200>;
 				interrupts = <4>;
-				clocks = <&sysclk K210_CLK_SPI3>;
-				clock-names = "ssi_clk";
+				clocks = <&sysclk K210_CLK_SPI3>,
+					 <&sysclk K210_CLK_APB2>;
+				clock-names = "ssi_clk", "pclk";
 				resets = <&sysrst K210_RST_SPI3>;
 				/* Could possibly go up to 200 MHz */
 				spi-max-frequency = <100000000>;
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 3/8] k210: dts: align fpioa node with Linux
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 2/8] k210: dts: add missing power bus clocks Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 4/8] k210: dts: align plic " Niklas Cassel
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Rick Chen, Leo; +Cc: damien.lemoal, Niklas Cassel, u-boot

From: Damien Le Moal <damien.lemoal@opensource.wdc.com>

Linux kernel fpioa pinctrl driver expects the sysctl phandle and the
power bit offset of the fpioa device to be specified as a single
property "canaan,k210-sysctl-power".
Replace the "canaan,k210-sysctl" and "canaan,k210-power-offset"
properties with "canaan,k210-sysctl-power" to satisfy the Linux kernel
requirements. This new property is parsed using the existing function
dev_read_phandle_with_args().

Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 arch/riscv/dts/k210.dtsi       |  3 +--
 drivers/pinctrl/pinctrl-k210.c | 19 ++++++++++++++-----
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 5c88c8ea8e..cf5c2360fb 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -378,8 +378,7 @@
 					 <&sysclk K210_CLK_APB0>;
 				clock-names = "ref", "pclk";
 				resets = <&sysrst K210_RST_FPIOA>;
-				canaan,k210-sysctl = <&sysctl>;
-				canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
+				canaan,k210-sysctl-power = <&sysctl K210_SYSCTL_POWER_SEL>;
 				pinctrl-0 = <&fpioa_jtag>;
 				pinctrl-names = "default";
 				status = "disabled";
diff --git a/drivers/pinctrl/pinctrl-k210.c b/drivers/pinctrl/pinctrl-k210.c
index bb5153c673..63084ae837 100644
--- a/drivers/pinctrl/pinctrl-k210.c
+++ b/drivers/pinctrl/pinctrl-k210.c
@@ -679,6 +679,7 @@ static int k210_pc_probe(struct udevice *dev)
 {
 	int ret, i, j;
 	struct k210_pc_priv *priv = dev_get_priv(dev);
+	struct ofnode_phandle_args args;
 
 	priv->fpioa = dev_read_addr_ptr(dev);
 	if (!priv->fpioa)
@@ -692,15 +693,23 @@ static int k210_pc_probe(struct udevice *dev)
 	if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
 		goto err;
 
-	priv->sysctl = syscon_regmap_lookup_by_phandle(dev, "canaan,k210-sysctl");
+	ret = dev_read_phandle_with_args(dev, "canaan,k210-sysctl-power",
+					NULL, 1, 0, &args);
+        if (ret)
+		goto err;
+
+	if (args.args_count != 1) {
+		ret = -EINVAL;
+		goto err;
+        }
+
+	priv->sysctl = syscon_node_to_regmap(args.node);
 	if (IS_ERR(priv->sysctl)) {
-		ret = -ENODEV;
+		ret = PTR_ERR(priv->sysctl);
 		goto err;
 	}
 
-	ret = dev_read_u32(dev, "canaan,k210-power-offset", &priv->power_offset);
-	if (ret)
-		goto err;
+	priv->power_offset = args.args[0];
 
 	debug("%s: fpioa = %p sysctl = %p power offset = %x\n", __func__,
 	      priv->fpioa, (void *)priv->sysctl->ranges[0].start,
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 4/8] k210: dts: align plic node with Linux
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
                   ` (2 preceding siblings ...)
  2022-03-01 10:35 ` [PATCH v2 3/8] k210: dts: align fpioa node with Linux Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-15  9:41   ` Leo Liang
  2022-03-01 10:35 ` [PATCH v2 6/8] spi: dw: Actually mask interrupts Niklas Cassel
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Rick Chen, Leo; +Cc: damien.lemoal, Niklas Cassel, u-boot

From: Niklas Cassel <niklas.cassel@wdc.com>

The Linux PLIC interrupt-controller driver actually initializes the hart
context registers in the PLIC driver exactly in the same order as
specified in the interrupts-extended device tree property. See the device
tree binding [1].

The ordering of the interrupts is therefore essential in order to
configure the PLIC correctly.

Fix the order so that we will have sane IRQ behavior when booting Linux
with the u-boot device tree.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
---
 arch/riscv/dts/k210.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index cf5c2360fb..3cc8379133 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -134,8 +134,8 @@
 			compatible = "canaan,k210-plic", "sifive,plic-1.0.0", "riscv,plic0";
 			reg = <0xC000000 0x4000000>;
 			interrupt-controller;
-			interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
-					      <&cpu1_intc 9>, <&cpu1_intc 11>;
+			interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
+					      <&cpu1_intc 11>, <&cpu1_intc 9>;
 			riscv,ndev = <65>;
 			riscv,max-priority = <7>;
 		};
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 5/8] spi: dw: Force set K210 fifo length to 31
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
                   ` (4 preceding siblings ...)
  2022-03-01 10:35 ` [PATCH v2 6/8] spi: dw: Actually mask interrupts Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 7/8] pinctrl: k210: Fix loop in k210_pc_get_drive() Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 8/8] pinctrl: k210: Fix bias-pull-up Niklas Cassel
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Jagan Teki; +Cc: damien.lemoal, Sean Anderson, Niklas Cassel, u-boot

From: Damien Le Moal <damien.lemoal@opensource.wdc.com>

The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is documented
to have a 32 word deep TX and RX FIFO, which spi_hw_init() detects.
However, when the RX FIFO is filled up to 32 entries (RXFLR = 32), an
RX FIFO overrun error occurs. Avoid this problem by force setting
fifo_len to 31.

Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 drivers/spi/designware_spi.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 9200efced9..f9b19a5ea4 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -194,6 +194,20 @@ static int dw_spi_apb_init(struct udevice *bus, struct dw_spi_priv *priv)
 	return 0;
 }
 
+static int dw_spi_apb_k210_init(struct udevice *bus, struct dw_spi_priv *priv)
+{
+	/*
+	 * The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is
+	 * documented to have a 32 word deep TX and RX FIFO, which
+	 * spi_hw_init() detects. However, when the RX FIFO is filled up to
+	 * 32 entries (RXFLR = 32), an RX FIFO overrun error occurs. Avoid
+	 * this problem by force setting fifo_len to 31.
+	 */
+	priv->fifo_len = 31;
+
+	return dw_spi_apb_init(bus, priv);
+}
+
 static int dw_spi_dwc_init(struct udevice *bus, struct dw_spi_priv *priv)
 {
 	priv->max_xfer = 32;
@@ -758,7 +772,7 @@ static const struct udevice_id dw_spi_ids[] = {
 	 */
 	{ .compatible = "altr,socfpga-spi", .data = (ulong)dw_spi_apb_init },
 	{ .compatible = "altr,socfpga-arria10-spi", .data = (ulong)dw_spi_apb_init },
-	{ .compatible = "canaan,k210-spi", .data = (ulong)dw_spi_apb_init },
+	{ .compatible = "canaan,k210-spi", .data = (ulong)dw_spi_apb_k210_init},
 	{ .compatible = "canaan,k210-ssi", .data = (ulong)dw_spi_dwc_init },
 	{ .compatible = "intel,stratix10-spi", .data = (ulong)dw_spi_apb_init },
 	{ .compatible = "intel,agilex-spi", .data = (ulong)dw_spi_apb_init },
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 6/8] spi: dw: Actually mask interrupts
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
                   ` (3 preceding siblings ...)
  2022-03-01 10:35 ` [PATCH v2 4/8] k210: dts: align plic " Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 5/8] spi: dw: Force set K210 fifo length to 31 Niklas Cassel
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Jagan Teki, Simon Glass, Stefan Roese
  Cc: damien.lemoal, Sean Anderson, Niklas Cassel, u-boot

From: Sean Anderson <seanga2@gmail.com>

The designware spi driver unconditionally uses polling.

The comment to spi_hw_init() also states that the function should disable
interrupts.

According to the DesignWare DW_apb_ssi Databook, value 0xff in IMR enables
all interrupts. Since we want to mask all interrupts write 0x0 instead.

On the canaan k210 board, pressing the reset button twice to reset the
board will run u-boot. If u-boot boots Linux without having SPI interrupts
masked, Linux will hang as soon as interrupts are enabled, because of an
interrupt storm.

Properly masking the SPI interrupts in u-boot allows us to successfully
boot Linux, even after resetting the board.

Fixes: 5bef6fd79f94 ("spi: Add designware master SPI DM driver used on SoCFPGA")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
[Niklas: rewrite commit message]
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 drivers/spi/designware_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index f9b19a5ea4..47bea0b376 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -266,7 +266,7 @@ static int dw_spi_of_to_plat(struct udevice *bus)
 static void spi_hw_init(struct udevice *bus, struct dw_spi_priv *priv)
 {
 	dw_write(priv, DW_SPI_SSIENR, 0);
-	dw_write(priv, DW_SPI_IMR, 0xff);
+	dw_write(priv, DW_SPI_IMR, 0);
 	dw_write(priv, DW_SPI_SSIENR, 1);
 
 	/*
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 7/8] pinctrl: k210: Fix loop in k210_pc_get_drive()
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
                   ` (5 preceding siblings ...)
  2022-03-01 10:35 ` [PATCH v2 5/8] spi: dw: Force set K210 fifo length to 31 Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  2022-03-01 10:35 ` [PATCH v2 8/8] pinctrl: k210: Fix bias-pull-up Niklas Cassel
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Simon Glass; +Cc: damien.lemoal, Niklas Cassel, u-boot

From: Niklas Cassel <niklas.cassel@wdc.com>

The loop exited too early so the k210_pc_drive_strength[0] array element
was never used.

Original Linux patch by Dan Carpenter:
https://lore.kernel.org/linux-gpio/20220209180804.GA18385@kili/

Fixes: 7224d5ccf8e1 ("pinctrl: Add support for Kendryte K210 FPIOA")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 drivers/pinctrl/pinctrl-k210.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-k210.c b/drivers/pinctrl/pinctrl-k210.c
index 63084ae837..f809149102 100644
--- a/drivers/pinctrl/pinctrl-k210.c
+++ b/drivers/pinctrl/pinctrl-k210.c
@@ -511,7 +511,7 @@ static int k210_pc_get_drive(unsigned max_strength_ua)
 {
 	int i;
 
-	for (i = K210_PC_DRIVE_MAX; i; i--)
+	for (i = K210_PC_DRIVE_MAX; i >= 0; i--)
 		if (k210_pc_drive_strength[i] < max_strength_ua)
 			return i;
 
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [PATCH v2 8/8] pinctrl: k210: Fix bias-pull-up
  2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
                   ` (6 preceding siblings ...)
  2022-03-01 10:35 ` [PATCH v2 7/8] pinctrl: k210: Fix loop in k210_pc_get_drive() Niklas Cassel
@ 2022-03-01 10:35 ` Niklas Cassel
  7 siblings, 0 replies; 11+ messages in thread
From: Niklas Cassel @ 2022-03-01 10:35 UTC (permalink / raw)
  To: Sean Anderson, Simon Glass; +Cc: damien.lemoal, Niklas Cassel, u-boot

From: Niklas Cassel <niklas.cassel@wdc.com>

Using bias-pull-up would actually cause the pin to have its pull-down
enabled. Fix this.

Original Linux patch by Sean Anderson:
https://lore.kernel.org/linux-gpio/20220209182822.640905-1-seanga2@gmail.com/

Fixes: 7224d5ccf8e1 ("pinctrl: Add support for Kendryte K210 FPIOA")
Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
---
 drivers/pinctrl/pinctrl-k210.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-k210.c b/drivers/pinctrl/pinctrl-k210.c
index f809149102..13f0a34268 100644
--- a/drivers/pinctrl/pinctrl-k210.c
+++ b/drivers/pinctrl/pinctrl-k210.c
@@ -536,7 +536,7 @@ static int k210_pc_pinconf_set(struct udevice *dev, unsigned pin_selector,
 		break;
 	case PIN_CONFIG_BIAS_PULL_UP:
 		if (argument)
-			val |= K210_PC_PD;
+			val |= K210_PC_PU;
 		else
 			return -EINVAL;
 		break;
-- 
2.35.1

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name
  2022-03-01 10:35 ` [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name Niklas Cassel
@ 2022-03-15  9:40   ` Leo Liang
  0 siblings, 0 replies; 11+ messages in thread
From: Leo Liang @ 2022-03-15  9:40 UTC (permalink / raw)
  To: Niklas Cassel
  Cc: Sean Anderson, Rick Chen, Lukasz Majewski, Jagan Teki,
	Simon Glass, damien.lemoal, u-boot

On Tue, Mar 01, 2022 at 10:35:39AM +0000, Niklas Cassel wrote:
> From: Damien Le Moal <damien.lemoal@opensource.wdc.com>
> 
> "kendryte" is the marketing name for the K210 RISC-V SoC produced by
> Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
> vendor,SoC compatibility string format in the device tree files and
> use the SoC name for file names.
> With these changes, the device tree files are more in sync with the
> Linux kernel DTS and drivers, making uboot device tree usable by the
> kernel.
> 
> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

^ permalink raw reply	[flat|nested] 11+ messages in thread

* Re: [PATCH v2 4/8] k210: dts: align plic node with Linux
  2022-03-01 10:35 ` [PATCH v2 4/8] k210: dts: align plic " Niklas Cassel
@ 2022-03-15  9:41   ` Leo Liang
  0 siblings, 0 replies; 11+ messages in thread
From: Leo Liang @ 2022-03-15  9:41 UTC (permalink / raw)
  To: Niklas Cassel; +Cc: Sean Anderson, Rick Chen, damien.lemoal, u-boot

On Tue, Mar 01, 2022 at 10:35:42AM +0000, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@wdc.com>
> 
> The Linux PLIC interrupt-controller driver actually initializes the hart
> context registers in the PLIC driver exactly in the same order as
> specified in the interrupts-extended device tree property. See the device
> tree binding [1].
> 
> The ordering of the interrupts is therefore essential in order to
> configure the PLIC correctly.
> 
> Fix the order so that we will have sane IRQ behavior when booting Linux
> with the u-boot device tree.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> 
> Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com>

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2022-03-15  9:41 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-01 10:35 [PATCH v2 0/8] canaan k210 SoC fixes Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 1/8] k210: use the board vendor name rather than the marketing name Niklas Cassel
2022-03-15  9:40   ` Leo Liang
2022-03-01 10:35 ` [PATCH v2 2/8] k210: dts: add missing power bus clocks Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 3/8] k210: dts: align fpioa node with Linux Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 4/8] k210: dts: align plic " Niklas Cassel
2022-03-15  9:41   ` Leo Liang
2022-03-01 10:35 ` [PATCH v2 6/8] spi: dw: Actually mask interrupts Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 5/8] spi: dw: Force set K210 fifo length to 31 Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 7/8] pinctrl: k210: Fix loop in k210_pc_get_drive() Niklas Cassel
2022-03-01 10:35 ` [PATCH v2 8/8] pinctrl: k210: Fix bias-pull-up Niklas Cassel

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