[RFC PATCH kvmtool 0/3] Add Sstc extension support

[RFC PATCH kvmtool 0/3] Add Sstc extension support

[Atish Patra]

This series adds Sstc extension which was ratified recently.

The first two patches adds the ISA extension framework which allows
to define and update the DT for any multi-letter ISA extensions. 

The last patch just enables Sstc extension specifically if the hardware
supports it.

The series can also be found at
https://github.com/atishp04/kvmtool/tree/sstc_v1

The kvm & Qemu patches can be found at

KVM: https://github.com/atishp04/linux/tree/sstc_v2
OpenSBI: https://github.com/atishp04/opensbi/tree/sstc_v1
Qemu: https://github.com/atishp04/qemu/tree/sstc_v1 

[1] https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view

Atish Patra (3):
riscv: Update the uapi header as per Linux kernel
riscv: Append ISA extensions to the device tree
riscv: Add Sstc extension support

riscv/fdt.c                      | 32 ++++++++++++++++++++++++++++++++
riscv/include/asm/kvm.h          | 22 ++++++++++++++++++++++
riscv/include/kvm/kvm-cpu-arch.h |  5 +++++
riscv/kvm-cpu.c                  |  5 -----
4 files changed, 59 insertions(+), 5 deletions(-)

--
2.30.2

[RFC PATCH kvmtool 1/3] riscv: Update the uapi header as per Linux kernel

[Atish Patra]

The one reg interface is extended for multi-letter ISA extensions
in KVM. Update the uapi header file as per that.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 riscv/include/asm/kvm.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/riscv/include/asm/kvm.h b/riscv/include/asm/kvm.h
index f808ad1ce500..e01678aa2a55 100644
--- a/riscv/include/asm/kvm.h
+++ b/riscv/include/asm/kvm.h
@@ -47,6 +47,7 @@ struct kvm_sregs {
 
 /* CONFIG registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
 struct kvm_riscv_config {
+	/* This is a bitmap of all the single letter base ISA extensions */
 	unsigned long isa;
 };
 
@@ -82,6 +83,23 @@ struct kvm_riscv_timer {
 	__u64 state;
 };
 
+/**
+ * ISA extension IDs specific to KVM. This is not the same as the host ISA
+ * extension IDs as that is internal to the host and should not be exposed
+ * to the guest. This should always be contiguous to keep the mapping simple
+ * in KVM implementation.
+ */
+enum KVM_RISCV_ISA_EXT_ID {
+	KVM_RISCV_ISA_EXT_A = 0,
+	KVM_RISCV_ISA_EXT_C,
+	KVM_RISCV_ISA_EXT_D,
+	KVM_RISCV_ISA_EXT_F,
+	KVM_RISCV_ISA_EXT_H,
+	KVM_RISCV_ISA_EXT_I,
+	KVM_RISCV_ISA_EXT_M,
+	KVM_RISCV_ISA_EXT_MAX,
+};
+
 /* Possible states for kvm_riscv_timer */
 #define KVM_RISCV_TIMER_STATE_OFF	0
 #define KVM_RISCV_TIMER_STATE_ON	1
@@ -123,6 +141,9 @@ struct kvm_riscv_timer {
 #define KVM_REG_RISCV_FP_D_REG(name)	\
 		(offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64))
 
+/* ISA Extension registers are mapped as type 7 */
+#define KVM_REG_RISCV_ISA_EXT		(0x07 << KVM_REG_RISCV_TYPE_SHIFT)
+
 #endif
 
 #endif /* __LINUX_KVM_RISCV_H */
-- 
2.30.2

[RFC PATCH kvmtool 2/3] riscv: Append ISA extensions to the device tree

[Atish Patra]

The riscv,isa DT property only contains single letter base extensions
until now. However, there are also multi-letter extensions which were
ratified recently. Add a mechanism to append those extension details
to the device tree so that guest can leverage those.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 riscv/fdt.c                      | 31 +++++++++++++++++++++++++++++++
 riscv/include/kvm/kvm-cpu-arch.h |  5 +++++
 riscv/kvm-cpu.c                  |  5 -----
 3 files changed, 36 insertions(+), 5 deletions(-)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index de15bfe37b58..2e69bd219fe5 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -9,6 +9,17 @@
 #include <linux/kernel.h>
 #include <linux/sizes.h>
 
+#define RISCV_ISA_EXT_REG(id)	__kvm_reg_id(KVM_REG_RISCV_ISA_EXT, \
+					     id, \
+					     KVM_REG_SIZE_U64)
+struct isa_ext_info {
+	const char *name;
+	unsigned long ext_id;
+};
+
+struct isa_ext_info isa_info_arr[] = {
+};
+
 static void dump_fdt(const char *dtb_file, void *fdt)
 {
 	int count, fd;
@@ -31,6 +42,7 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 {
 	int cpu, pos, i, index, valid_isa_len;
 	const char *valid_isa_order = "IEMAFDQCLBJTPVNSUHKORWXYZG";
+	int arr_sz = ARRAY_SIZE(isa_info_arr);
 
 	_FDT(fdt_begin_node(fdt, "cpus"));
 	_FDT(fdt_property_cell(fdt, "#address-cells", 0x1));
@@ -42,6 +54,8 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 		char cpu_name[CPU_NAME_MAX_LEN];
 		char cpu_isa[CPU_ISA_MAX_LEN];
 		struct kvm_cpu *vcpu = kvm->cpus[cpu];
+		struct kvm_one_reg reg;
+		unsigned long isa_ext_out = 0;
 
 		snprintf(cpu_name, CPU_NAME_MAX_LEN, "cpu@%x", cpu);
 
@@ -53,6 +67,23 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 			if (vcpu->riscv_isa & (1 << (index)))
 				cpu_isa[pos++] = 'a' + index;
 		}
+
+		for (i = 0; i < arr_sz; i++) {
+			reg.id = RISCV_ISA_EXT_REG(isa_info_arr[i].ext_id);
+			reg.addr = (unsigned long)&isa_ext_out;
+			if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &reg) < 0)
+				die("KVM_GET_ONE_REG failed (isa_ext)");
+			if (!isa_ext_out)
+			/* This extension is not available in hardware */
+				continue;
+
+			if ((strlen(isa_info_arr[i].name) + pos + 1) >= CPU_ISA_MAX_LEN) {
+				pr_warning("Insufficient space to append ISA exension\n");
+				break;
+			}
+			pos += snprintf(cpu_isa + pos, CPU_ISA_MAX_LEN, "_%s",
+					isa_info_arr[i].name);
+		}
 		cpu_isa[pos] = '\0';
 
 		_FDT(fdt_begin_node(fdt, cpu_name));
diff --git a/riscv/include/kvm/kvm-cpu-arch.h b/riscv/include/kvm/kvm-cpu-arch.h
index 78fcd018c737..416fd05e9943 100644
--- a/riscv/include/kvm/kvm-cpu-arch.h
+++ b/riscv/include/kvm/kvm-cpu-arch.h
@@ -7,6 +7,11 @@
 
 #include "kvm/kvm.h"
 
+static inline __u64 __kvm_reg_id(__u64 type, __u64 idx, __u64  size)
+{
+	return KVM_REG_RISCV | type | idx | size;
+}
+
 struct kvm_cpu {
 	pthread_t	thread;
 
diff --git a/riscv/kvm-cpu.c b/riscv/kvm-cpu.c
index df90c7b9f21a..7a26fd17cf5b 100644
--- a/riscv/kvm-cpu.c
+++ b/riscv/kvm-cpu.c
@@ -18,11 +18,6 @@ int kvm_cpu__get_debug_fd(void)
 	return debug_fd;
 }
 
-static __u64 __kvm_reg_id(__u64 type, __u64 idx, __u64  size)
-{
-	return KVM_REG_RISCV | type | idx | size;
-}
-
 #if __riscv_xlen == 64
 #define KVM_REG_SIZE_ULONG	KVM_REG_SIZE_U64
 #else
-- 
2.30.2

[RFC PATCH kvmtool 3/3] riscv: Add Sstc extension support

[Atish Patra]

Sstc extension allows the guest OS to program the timer directly without
relying on the SBI call. The kernel detects the presence of Sstc extnesion
from the riscv,isa DT property. Add the Sstc extension to the device tree
if it is supported by the host.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 riscv/fdt.c             | 1 +
 riscv/include/asm/kvm.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 2e69bd219fe5..a2bea5e17749 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -18,6 +18,7 @@ struct isa_ext_info {
 };
 
 struct isa_ext_info isa_info_arr[] = {
+	{"sstc", KVM_RISCV_ISA_EXT_SSTC},
 };
 
 static void dump_fdt(const char *dtb_file, void *fdt)
diff --git a/riscv/include/asm/kvm.h b/riscv/include/asm/kvm.h
index e01678aa2a55..c7c313272c0b 100644
--- a/riscv/include/asm/kvm.h
+++ b/riscv/include/asm/kvm.h
@@ -97,6 +97,7 @@ enum KVM_RISCV_ISA_EXT_ID {
 	KVM_RISCV_ISA_EXT_H,
 	KVM_RISCV_ISA_EXT_I,
 	KVM_RISCV_ISA_EXT_M,
+	KVM_RISCV_ISA_EXT_SSTC,
 	KVM_RISCV_ISA_EXT_MAX,
 };
 
-- 
2.30.2

Re: [RFC PATCH kvmtool 0/3] Add Sstc extension support

[Will Deacon]

On Fri, Mar 04, 2022 at 02:10:20AM -0800, Atish Patra wrote:
> This series adds Sstc extension which was ratified recently.
> 
> The first two patches adds the ISA extension framework which allows
> to define and update the DT for any multi-letter ISA extensions. 
> 
> The last patch just enables Sstc extension specifically if the hardware
> supports it.
> 
> The series can also be found at
> https://github.com/atishp04/kvmtool/tree/sstc_v1
> 
> The kvm & Qemu patches can be found at
> 
> KVM: https://github.com/atishp04/linux/tree/sstc_v2
> OpenSBI: https://github.com/atishp04/opensbi/tree/sstc_v1
> Qemu: https://github.com/atishp04/qemu/tree/sstc_v1 
> 
> [1] https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view
> 
> Atish Patra (3):
> riscv: Update the uapi header as per Linux kernel
> riscv: Append ISA extensions to the device tree
> riscv: Add Sstc extension support

These look fine to me. What's the status of the kernel-side changes?

Will

Re: [RFC PATCH kvmtool 0/3] Add Sstc extension support

[Anup Patel]

On Fri, May 6, 2022 at 6:24 PM Will Deacon <will@kernel.org> wrote:
>
> On Fri, Mar 04, 2022 at 02:10:20AM -0800, Atish Patra wrote:
> > This series adds Sstc extension which was ratified recently.
> >
> > The first two patches adds the ISA extension framework which allows
> > to define and update the DT for any multi-letter ISA extensions.
> >
> > The last patch just enables Sstc extension specifically if the hardware
> > supports it.
> >
> > The series can also be found at
> > https://github.com/atishp04/kvmtool/tree/sstc_v1
> >
> > The kvm & Qemu patches can be found at
> >
> > KVM: https://github.com/atishp04/linux/tree/sstc_v2
> > OpenSBI: https://github.com/atishp04/opensbi/tree/sstc_v1
> > Qemu: https://github.com/atishp04/qemu/tree/sstc_v1
> >
> > [1] https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view
> >
> > Atish Patra (3):
> > riscv: Update the uapi header as per Linux kernel
> > riscv: Append ISA extensions to the device tree
> > riscv: Add Sstc extension support
>
> These look fine to me. What's the status of the kernel-side changes?

The kernel-side of changes will be merged for 5.19 or 5.20.

I will ping you once kernel-side changes are merged.

Thanks,
Anup

>
> Will

Re: [RFC PATCH kvmtool 0/3] Add Sstc extension support

[Atish Patra]

On Fri, May 6, 2022 at 7:43 AM Anup Patel <anup@brainfault.org> wrote:
>
> On Fri, May 6, 2022 at 6:24 PM Will Deacon <will@kernel.org> wrote:
> >
> > On Fri, Mar 04, 2022 at 02:10:20AM -0800, Atish Patra wrote:
> > > This series adds Sstc extension which was ratified recently.
> > >
> > > The first two patches adds the ISA extension framework which allows
> > > to define and update the DT for any multi-letter ISA extensions.
> > >
> > > The last patch just enables Sstc extension specifically if the hardware
> > > supports it.
> > >
> > > The series can also be found at
> > > https://github.com/atishp04/kvmtool/tree/sstc_v1
> > >
> > > The kvm & Qemu patches can be found at
> > >
> > > KVM: https://github.com/atishp04/linux/tree/sstc_v2
> > > OpenSBI: https://github.com/atishp04/opensbi/tree/sstc_v1
> > > Qemu: https://github.com/atishp04/qemu/tree/sstc_v1
> > >
> > > [1] https://drive.google.com/file/d/1m84Re2yK8m_vbW7TspvevCDR82MOBaSX/view
> > >
> > > Atish Patra (3):
> > > riscv: Update the uapi header as per Linux kernel
> > > riscv: Append ISA extensions to the device tree
> > > riscv: Add Sstc extension support
> >
> > These look fine to me. What's the status of the kernel-side changes?
>
> The kernel-side of changes will be merged for 5.19 or 5.20.
>

I will revise the kernel series soon and rebase the kvmtool changes on
the latest.

> I will ping you once kernel-side changes are merged.
>
> Thanks,
> Anup
>
> >
> > Will



-- 
Regards,
Atish