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* [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
@ 2022-03-04 18:26 ` Codrin Ciubotariu
  0 siblings, 0 replies; 6+ messages in thread
From: Codrin Ciubotariu @ 2022-03-04 18:26 UTC (permalink / raw)
  To: linux-clk, linux-arm-kernel, linux-kernel
  Cc: mturquette, sboyd, nicolas.ferre, alexandre.belloni,
	claudiu.beznea, Codrin Ciubotariu

Audio PLL can be used as parent by the GCLKs of PDMCs.

Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
 drivers/clk/at91/sama7g5.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index e43458673afb..9a213ba9e58b 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -699,16 +699,16 @@ static const struct {
 	{ .n  = "pdmc0_gclk",
 	  .id = 68,
 	  .r = { .max = 50000000  },
-	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
-	  .pp_mux_table = { 5, 8, },
+	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+	  .pp_mux_table = { 5, 9, },
 	  .pp_count = 2,
 	  .pp_chg_id = INT_MIN, },
 
 	{ .n  = "pdmc1_gclk",
 	  .id = 69,
 	  .r = { .max = 50000000, },
-	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
-	  .pp_mux_table = { 5, 8, },
+	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+	  .pp_mux_table = { 5, 9, },
 	  .pp_count = 2,
 	  .pp_chg_id = INT_MIN, },
 
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
@ 2022-03-04 18:26 ` Codrin Ciubotariu
  0 siblings, 0 replies; 6+ messages in thread
From: Codrin Ciubotariu @ 2022-03-04 18:26 UTC (permalink / raw)
  To: linux-clk, linux-arm-kernel, linux-kernel
  Cc: alexandre.belloni, sboyd, mturquette, Codrin Ciubotariu, claudiu.beznea

Audio PLL can be used as parent by the GCLKs of PDMCs.

Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
---
 drivers/clk/at91/sama7g5.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index e43458673afb..9a213ba9e58b 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -699,16 +699,16 @@ static const struct {
 	{ .n  = "pdmc0_gclk",
 	  .id = 68,
 	  .r = { .max = 50000000  },
-	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
-	  .pp_mux_table = { 5, 8, },
+	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+	  .pp_mux_table = { 5, 9, },
 	  .pp_count = 2,
 	  .pp_chg_id = INT_MIN, },
 
 	{ .n  = "pdmc1_gclk",
 	  .id = 69,
 	  .r = { .max = 50000000, },
-	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
-	  .pp_mux_table = { 5, 8, },
+	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
+	  .pp_mux_table = { 5, 9, },
 	  .pp_count = 2,
 	  .pp_chg_id = INT_MIN, },
 
-- 
2.32.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
  2022-03-04 18:26 ` Codrin Ciubotariu
@ 2022-03-07  9:47   ` Claudiu.Beznea
  -1 siblings, 0 replies; 6+ messages in thread
From: Claudiu.Beznea @ 2022-03-07  9:47 UTC (permalink / raw)
  To: Codrin.Ciubotariu, linux-clk, linux-arm-kernel, linux-kernel
  Cc: sboyd, mturquette, alexandre.belloni

On 04.03.2022 20:26, Codrin Ciubotariu wrote:
> Audio PLL can be used as parent by the GCLKs of PDMCs.
> 
> Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

> ---
>  drivers/clk/at91/sama7g5.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index e43458673afb..9a213ba9e58b 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -699,16 +699,16 @@ static const struct {
>  	{ .n  = "pdmc0_gclk",
>  	  .id = 68,
>  	  .r = { .max = 50000000  },
> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
> -	  .pp_mux_table = { 5, 8, },
> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
> +	  .pp_mux_table = { 5, 9, },
>  	  .pp_count = 2,
>  	  .pp_chg_id = INT_MIN, },
>  
>  	{ .n  = "pdmc1_gclk",
>  	  .id = 69,
>  	  .r = { .max = 50000000, },
> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
> -	  .pp_mux_table = { 5, 8, },
> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
> +	  .pp_mux_table = { 5, 9, },
>  	  .pp_count = 2,
>  	  .pp_chg_id = INT_MIN, },
>  

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
@ 2022-03-07  9:47   ` Claudiu.Beznea
  0 siblings, 0 replies; 6+ messages in thread
From: Claudiu.Beznea @ 2022-03-07  9:47 UTC (permalink / raw)
  To: Codrin.Ciubotariu, linux-clk, linux-arm-kernel, linux-kernel
  Cc: mturquette, sboyd, Nicolas.Ferre, alexandre.belloni

On 04.03.2022 20:26, Codrin Ciubotariu wrote:
> Audio PLL can be used as parent by the GCLKs of PDMCs.
> 
> Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

> ---
>  drivers/clk/at91/sama7g5.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index e43458673afb..9a213ba9e58b 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -699,16 +699,16 @@ static const struct {
>  	{ .n  = "pdmc0_gclk",
>  	  .id = 68,
>  	  .r = { .max = 50000000  },
> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
> -	  .pp_mux_table = { 5, 8, },
> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
> +	  .pp_mux_table = { 5, 9, },
>  	  .pp_count = 2,
>  	  .pp_chg_id = INT_MIN, },
>  
>  	{ .n  = "pdmc1_gclk",
>  	  .id = 69,
>  	  .r = { .max = 50000000, },
> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
> -	  .pp_mux_table = { 5, 8, },
> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
> +	  .pp_mux_table = { 5, 9, },
>  	  .pp_count = 2,
>  	  .pp_chg_id = INT_MIN, },
>  


^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
  2022-03-07  9:47   ` Claudiu.Beznea
@ 2022-03-08 15:05     ` Nicolas Ferre
  -1 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2022-03-08 15:05 UTC (permalink / raw)
  To: Claudiu Beznea - M18063, Codrin Ciubotariu - M19940, linux-clk, sboyd
  Cc: linux-arm-kernel, linux-kernel, mturquette, alexandre.belloni

On 07/03/2022 at 10:47, Claudiu Beznea - M18063 wrote:
> On 04.03.2022 20:26, Codrin Ciubotariu wrote:
>> Audio PLL can be used as parent by the GCLKs of PDMCs.
>>
>> Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> 
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
I'm taking this patch for a PR sent to Stephen for 5.18.

Best regards,
   Nicolas

>> ---
>>   drivers/clk/at91/sama7g5.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
>> index e43458673afb..9a213ba9e58b 100644
>> --- a/drivers/clk/at91/sama7g5.c
>> +++ b/drivers/clk/at91/sama7g5.c
>> @@ -699,16 +699,16 @@ static const struct {
>>   	{ .n  = "pdmc0_gclk",
>>   	  .id = 68,
>>   	  .r = { .max = 50000000  },
>> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
>> -	  .pp_mux_table = { 5, 8, },
>> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
>> +	  .pp_mux_table = { 5, 9, },
>>   	  .pp_count = 2,
>>   	  .pp_chg_id = INT_MIN, },
>>   
>>   	{ .n  = "pdmc1_gclk",
>>   	  .id = 69,
>>   	  .r = { .max = 50000000, },
>> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
>> -	  .pp_mux_table = { 5, 8, },
>> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
>> +	  .pp_mux_table = { 5, 9, },
>>   	  .pp_count = 2,
>>   	  .pp_chg_id = INT_MIN, },
>>   
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK
@ 2022-03-08 15:05     ` Nicolas Ferre
  0 siblings, 0 replies; 6+ messages in thread
From: Nicolas Ferre @ 2022-03-08 15:05 UTC (permalink / raw)
  To: Claudiu Beznea - M18063, Codrin Ciubotariu - M19940, linux-clk, sboyd
  Cc: linux-arm-kernel, linux-kernel, mturquette, alexandre.belloni

On 07/03/2022 at 10:47, Claudiu Beznea - M18063 wrote:
> On 04.03.2022 20:26, Codrin Ciubotariu wrote:
>> Audio PLL can be used as parent by the GCLKs of PDMCs.
>>
>> Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> 
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
I'm taking this patch for a PR sent to Stephen for 5.18.

Best regards,
   Nicolas

>> ---
>>   drivers/clk/at91/sama7g5.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
>> index e43458673afb..9a213ba9e58b 100644
>> --- a/drivers/clk/at91/sama7g5.c
>> +++ b/drivers/clk/at91/sama7g5.c
>> @@ -699,16 +699,16 @@ static const struct {
>>   	{ .n  = "pdmc0_gclk",
>>   	  .id = 68,
>>   	  .r = { .max = 50000000  },
>> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
>> -	  .pp_mux_table = { 5, 8, },
>> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
>> +	  .pp_mux_table = { 5, 9, },
>>   	  .pp_count = 2,
>>   	  .pp_chg_id = INT_MIN, },
>>   
>>   	{ .n  = "pdmc1_gclk",
>>   	  .id = 69,
>>   	  .r = { .max = 50000000, },
>> -	  .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
>> -	  .pp_mux_table = { 5, 8, },
>> +	  .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
>> +	  .pp_mux_table = { 5, 9, },
>>   	  .pp_count = 2,
>>   	  .pp_chg_id = INT_MIN, },
>>   
> 


-- 
Nicolas Ferre

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-03-08 15:07 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-04 18:26 [PATCH] clk: at91: sama7g5: fix parents of PDMCs' GCLK Codrin Ciubotariu
2022-03-04 18:26 ` Codrin Ciubotariu
2022-03-07  9:47 ` Claudiu.Beznea
2022-03-07  9:47   ` Claudiu.Beznea
2022-03-08 15:05   ` Nicolas Ferre
2022-03-08 15:05     ` Nicolas Ferre

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