* [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
@ 2022-03-04 23:46 ` Matt Roper
0 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2022-03-04 23:46 UTC (permalink / raw)
To: intel-gfx
Cc: Tvrtko Ursulin, dri-devel, John Harrison, Akeem G Abodunrin,
Prathap Kumar Valsan
From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Starting with DG2, preemption can no longer be controlled using userspace
on a per-context basis. Instead, the hardware only allows us to enable or
disable preemption in a global, system-wide basis. Also, we lose the
ability to specify the preemption granularity (such as batch-level vs
command-level vs object-level).
v2 (MattR):
- Move debugfs interface to a separate patch. (Jani)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index beca8735bae5..f695a9c96c8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2310,7 +2310,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
FF_DOP_CLOCK_GATE_DISABLE);
}
- if (IS_GRAPHICS_VER(i915, 9, 12)) {
+ if (HAS_PERCTX_PREEMPT_CTRL(i915)) {
/* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */
wa_masked_en(wal,
GEN7_FF_SLICE_CS_CHICKEN1,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 943267393ecb..afefb3bd2714 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1396,6 +1396,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GUC_DEPRIVILEGE(dev_priv) \
(INTEL_INFO(dev_priv)->has_guc_deprivilege)
+#define HAS_PERCTX_PREEMPT_CTRL(i915) \
+ ((GRAPHICS_VER(i915) >= 9) && GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
+
static inline bool run_as_guest(void)
{
return !hypervisor_is_type(X86_HYPER_NATIVE);
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
@ 2022-03-04 23:46 ` Matt Roper
0 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2022-03-04 23:46 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Starting with DG2, preemption can no longer be controlled using userspace
on a per-context basis. Instead, the hardware only allows us to enable or
disable preemption in a global, system-wide basis. Also, we lose the
ability to specify the preemption granularity (such as batch-level vs
command-level vs object-level).
v2 (MattR):
- Move debugfs interface to a separate patch. (Jani)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index beca8735bae5..f695a9c96c8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2310,7 +2310,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
FF_DOP_CLOCK_GATE_DISABLE);
}
- if (IS_GRAPHICS_VER(i915, 9, 12)) {
+ if (HAS_PERCTX_PREEMPT_CTRL(i915)) {
/* FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */
wa_masked_en(wal,
GEN7_FF_SLICE_CS_CHICKEN1,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 943267393ecb..afefb3bd2714 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1396,6 +1396,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GUC_DEPRIVILEGE(dev_priv) \
(INTEL_INFO(dev_priv)->has_guc_deprivilege)
+#define HAS_PERCTX_PREEMPT_CTRL(i915) \
+ ((GRAPHICS_VER(i915) >= 9) && GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
+
static inline bool run_as_guest(void)
{
return !hypervisor_is_type(X86_HYPER_NATIVE);
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
@ 2022-03-04 23:46 ` Matt Roper
-1 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2022-03-04 23:46 UTC (permalink / raw)
To: intel-gfx
Cc: Tvrtko Ursulin, dri-devel, John Harrison, Akeem G Abodunrin,
Prathap Kumar Valsan
From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Since DG2 and beyond only support global preemption enable/disable (see
Wa_14015141709), userspace no longer has a way to control preemption on
a per-context basis. Preemption is globally enabled by default, but the
UMD teams have requested that we provide a debugfs interface that can be
used to query and adjust the system-wide preemption setting for
development and bug reporting purposes.
v2 (MattR):
- Split debugfs out into a separate patch. (Jani)
- Add the hardware update/query as facilities in intel_gt.c and just
call them from the debugfs code. (Jani)
- Add register to GuC's save/restore list so that the value will
persist across resets. (Tvrtko)
- Place under per-GT debugfs rather than i915 debugfs. (MattR)
- Only register debugfs entries on platforms subject to Wa_14015141709,
and only on platforms that have an RCS engine. (MattR/Tvrtko)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 50 ++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt.h | 3 ++
drivers/gpu/drm/i915/gt/intel_gt_debugfs.c | 31 ++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 7 +++
5 files changed, 94 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8a2483ccbfb9..90bdebd8d267 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1045,3 +1045,53 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
mutex_unlock(>->tlb_invalidate_lock);
}
+
+/**
+ * intel_gt_get_global_preemption - return whether the global preemption
+ * setting is enabled in hardware
+ * @gt: GT structure
+ *
+ * Returns the hardware's global 'preemption enabled' setting. Only relevant
+ * on newer platforms that lack per-context preemption control (and only on
+ * GTs that have a render engine).
+ *
+ * Returns 1 if preemption is enabled, 0 if disabled.
+ */
+u64 intel_gt_get_global_preemption(struct intel_gt *gt)
+{
+ intel_wakeref_t wakeref;
+ u32 val;
+
+ drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
+ drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
+
+ with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
+ val = intel_uncore_read(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN);
+
+ return !(val & GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
+}
+
+/**
+ * intel_gt_set_global_preemption - adjust global preemption enabled setting
+ * @gt: GT structure
+ * @val: desired preemption setting
+ *
+ * Enables global preemption if @val is non-zero, otherwise disables it. Only
+ * relevant on newer platforms that lack per-context preemption control (and
+ * only on GTs that have a render engine).
+ *
+ * Returns 1 if preemption is enabled, 0 if disabled.
+ */
+void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val)
+{
+ intel_wakeref_t wakeref;
+ u32 tmp = val ?
+ _MASKED_BIT_DISABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE) :
+ _MASKED_BIT_ENABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
+
+ drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
+ drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
+
+ with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
+ intel_uncore_write(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN, tmp);
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 0f571c8ee22b..63a599a1bf6d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -94,4 +94,7 @@ void intel_gt_watchdog_work(struct work_struct *work);
void intel_gt_invalidate_tlbs(struct intel_gt *gt);
+u64 intel_gt_get_global_preemption(struct intel_gt *gt);
+void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val);
+
#endif /* __INTEL_GT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index f103664b71d4..d851e3f80877 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -6,6 +6,7 @@
#include <linux/debugfs.h>
#include "i915_drv.h"
+#include "intel_gt.h"
#include "intel_gt_debugfs.h"
#include "intel_gt_engines_debugfs.h"
#include "intel_gt_pm_debugfs.h"
@@ -57,13 +58,43 @@ static int __intel_gt_debugfs_reset_store(void *data, u64 val)
DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
__intel_gt_debugfs_reset_store, "%llu\n");
+static int i915_global_preemption_enabled_get(void *data, u64 *val)
+{
+ *val = intel_gt_get_global_preemption((struct intel_gt *)data);
+
+ return 0;
+}
+
+static int i915_global_preemption_enabled_set(void *data, u64 val)
+{
+ intel_gt_set_global_preemption((struct intel_gt *)data, val);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_global_preemption_enabled_fops,
+ i915_global_preemption_enabled_get,
+ i915_global_preemption_enabled_set,
+ "%llu\n");
+
static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "reset", &reset_fops, NULL },
};
+ static const struct intel_gt_debugfs_file preempt_files[] = {
+ { "preemption_enabled", &i915_global_preemption_enabled_fops }
+ };
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
+
+ /*
+ * Global preemption control only applies to DG2 and beyond
+ * (Wa_14015141709) and only to GTs with an RCS.
+ */
+ if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55) && RCS_MASK(gt))
+ intel_gt_debugfs_register_files(root, preempt_files,
+ ARRAY_SIZE(preempt_files), gt);
}
void intel_gt_debugfs_register(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 19cd34f24263..21ede1887b9f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -468,6 +468,9 @@
#define VF_PREEMPTION _MMIO(0x83a4)
#define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
+#define GEN12_VFG_PREEMPTION_CHICKEN _MMIO(0x83b4)
+#define GEN12_VFG_PREEMPT_CHICKEN_DISABLE REG_BIT(8)
+
#define GEN8_RC6_CTX_INFO _MMIO(0x8504)
#define GEN12_SQCM _MMIO(0x8724)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index acc4a3766dc1..7e008382ab03 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -352,6 +352,13 @@ static int guc_mmio_regset_init(struct temp_regset *regset,
for (i = 0; i < GEN9_LNCFCMOCS_REG_COUNT; i++)
ret |= GUC_MMIO_REG_ADD(regset, GEN9_LNCFCMOCS(i), false);
+ /*
+ * VFG_PREEMPTION_CHICKEN can be controlled via debugfs; ensure
+ * the setting sticks across resets
+ */
+ if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
+ ret |= GUC_MMIO_REG_ADD(regset, GEN12_VFG_PREEMPTION_CHICKEN, true);
+
return ret ? -1 : 0;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting
@ 2022-03-04 23:46 ` Matt Roper
0 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2022-03-04 23:46 UTC (permalink / raw)
To: intel-gfx; +Cc: dri-devel
From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Since DG2 and beyond only support global preemption enable/disable (see
Wa_14015141709), userspace no longer has a way to control preemption on
a per-context basis. Preemption is globally enabled by default, but the
UMD teams have requested that we provide a debugfs interface that can be
used to query and adjust the system-wide preemption setting for
development and bug reporting purposes.
v2 (MattR):
- Split debugfs out into a separate patch. (Jani)
- Add the hardware update/query as facilities in intel_gt.c and just
call them from the debugfs code. (Jani)
- Add register to GuC's save/restore list so that the value will
persist across resets. (Tvrtko)
- Place under per-GT debugfs rather than i915 debugfs. (MattR)
- Only register debugfs entries on platforms subject to Wa_14015141709,
and only on platforms that have an RCS engine. (MattR/Tvrtko)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt.c | 50 ++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt.h | 3 ++
drivers/gpu/drm/i915/gt/intel_gt_debugfs.c | 31 ++++++++++++++
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 7 +++
5 files changed, 94 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8a2483ccbfb9..90bdebd8d267 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1045,3 +1045,53 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
mutex_unlock(>->tlb_invalidate_lock);
}
+
+/**
+ * intel_gt_get_global_preemption - return whether the global preemption
+ * setting is enabled in hardware
+ * @gt: GT structure
+ *
+ * Returns the hardware's global 'preemption enabled' setting. Only relevant
+ * on newer platforms that lack per-context preemption control (and only on
+ * GTs that have a render engine).
+ *
+ * Returns 1 if preemption is enabled, 0 if disabled.
+ */
+u64 intel_gt_get_global_preemption(struct intel_gt *gt)
+{
+ intel_wakeref_t wakeref;
+ u32 val;
+
+ drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
+ drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
+
+ with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
+ val = intel_uncore_read(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN);
+
+ return !(val & GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
+}
+
+/**
+ * intel_gt_set_global_preemption - adjust global preemption enabled setting
+ * @gt: GT structure
+ * @val: desired preemption setting
+ *
+ * Enables global preemption if @val is non-zero, otherwise disables it. Only
+ * relevant on newer platforms that lack per-context preemption control (and
+ * only on GTs that have a render engine).
+ *
+ * Returns 1 if preemption is enabled, 0 if disabled.
+ */
+void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val)
+{
+ intel_wakeref_t wakeref;
+ u32 tmp = val ?
+ _MASKED_BIT_DISABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE) :
+ _MASKED_BIT_ENABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
+
+ drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
+ drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
+
+ with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
+ intel_uncore_write(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN, tmp);
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 0f571c8ee22b..63a599a1bf6d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -94,4 +94,7 @@ void intel_gt_watchdog_work(struct work_struct *work);
void intel_gt_invalidate_tlbs(struct intel_gt *gt);
+u64 intel_gt_get_global_preemption(struct intel_gt *gt);
+void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val);
+
#endif /* __INTEL_GT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index f103664b71d4..d851e3f80877 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -6,6 +6,7 @@
#include <linux/debugfs.h>
#include "i915_drv.h"
+#include "intel_gt.h"
#include "intel_gt_debugfs.h"
#include "intel_gt_engines_debugfs.h"
#include "intel_gt_pm_debugfs.h"
@@ -57,13 +58,43 @@ static int __intel_gt_debugfs_reset_store(void *data, u64 val)
DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
__intel_gt_debugfs_reset_store, "%llu\n");
+static int i915_global_preemption_enabled_get(void *data, u64 *val)
+{
+ *val = intel_gt_get_global_preemption((struct intel_gt *)data);
+
+ return 0;
+}
+
+static int i915_global_preemption_enabled_set(void *data, u64 val)
+{
+ intel_gt_set_global_preemption((struct intel_gt *)data, val);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_global_preemption_enabled_fops,
+ i915_global_preemption_enabled_get,
+ i915_global_preemption_enabled_set,
+ "%llu\n");
+
static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "reset", &reset_fops, NULL },
};
+ static const struct intel_gt_debugfs_file preempt_files[] = {
+ { "preemption_enabled", &i915_global_preemption_enabled_fops }
+ };
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
+
+ /*
+ * Global preemption control only applies to DG2 and beyond
+ * (Wa_14015141709) and only to GTs with an RCS.
+ */
+ if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55) && RCS_MASK(gt))
+ intel_gt_debugfs_register_files(root, preempt_files,
+ ARRAY_SIZE(preempt_files), gt);
}
void intel_gt_debugfs_register(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 19cd34f24263..21ede1887b9f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -468,6 +468,9 @@
#define VF_PREEMPTION _MMIO(0x83a4)
#define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
+#define GEN12_VFG_PREEMPTION_CHICKEN _MMIO(0x83b4)
+#define GEN12_VFG_PREEMPT_CHICKEN_DISABLE REG_BIT(8)
+
#define GEN8_RC6_CTX_INFO _MMIO(0x8504)
#define GEN12_SQCM _MMIO(0x8724)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index acc4a3766dc1..7e008382ab03 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -352,6 +352,13 @@ static int guc_mmio_regset_init(struct temp_regset *regset,
for (i = 0; i < GEN9_LNCFCMOCS_REG_COUNT; i++)
ret |= GUC_MMIO_REG_ADD(regset, GEN9_LNCFCMOCS(i), false);
+ /*
+ * VFG_PREEMPTION_CHICKEN can be controlled via debugfs; ensure
+ * the setting sticks across resets
+ */
+ if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
+ ret |= GUC_MMIO_REG_ADD(regset, GEN12_VFG_PREEMPTION_CHICKEN, true);
+
return ret ? -1 : 0;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
(?)
(?)
@ 2022-03-05 0:04 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-03-05 0:04 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
URL : https://patchwork.freedesktop.org/series/101070/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1d33c55682a1 drm/i915/dg2: Add preemption changes for Wa_14015141709
-:45: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects?
#45: FILE: drivers/gpu/drm/i915/i915_drv.h:1399:
+#define HAS_PERCTX_PREEMPT_CTRL(i915) \
+ ((GRAPHICS_VER(i915) >= 9) && GRAPHICS_VER_FULL(i915) < IP_VER(12, 55))
total: 0 errors, 0 warnings, 1 checks, 17 lines checked
50c227eb227b drm/i915/dg2: Add debugfs to control global preemption setting
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
` (2 preceding siblings ...)
(?)
@ 2022-03-05 0:05 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-03-05 0:05 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
URL : https://patchwork.freedesktop.org/series/101070/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
` (3 preceding siblings ...)
(?)
@ 2022-03-05 0:36 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-03-05 0:36 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7461 bytes --]
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
URL : https://patchwork.freedesktop.org/series/101070/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11330 -> Patchwork_22494
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22494 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22494, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/index.html
Participating hosts (47 -> 35)
------------------------------
Additional (1): fi-glk-dsi
Missing (13): fi-kbl-soraka fi-bdw-samus shard-tglu bat-dg1-6 bat-dg1-5 bat-dg2-9 fi-bsw-cyan bat-adlp-6 fi-pnv-d510 bat-rpls-2 shard-dg1 bat-jsl-2 bat-jsl-1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22494:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-1115g4: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
#### Warnings ####
* igt@i915_pm_rpm@module-reload:
- fi-tgl-1115g4: [INCOMPLETE][3] ([i915#1385]) -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html
Known issues
------------
Here are the changes found in Patchwork_22494 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-hsw-4770: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#109315]) +17 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html
* igt@core_hotunplug@unbind-rebind:
- fi-blb-e6850: [PASS][6] -> [FAIL][7] ([i915#3194])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-blb-e6850/igt@core_hotunplug@unbind-rebind.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-blb-e6850/igt@core_hotunplug@unbind-rebind.html
* igt@gem_exec_suspend@basic-s0@smem:
- fi-glk-dsi: NOTRUN -> [DMESG-WARN][8] ([i915#2943])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_exec_suspend@basic-s3:
- fi-skl-6600u: NOTRUN -> [INCOMPLETE][9] ([i915#4547])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-skl-6600u/igt@gem_exec_suspend@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- fi-glk-dsi: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#2190])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-glk-dsi: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@gem_lmem_swapping@basic.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][12] -> [INCOMPLETE][13] ([i915#3921])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-glk-dsi: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [PASS][15] -> [DMESG-WARN][16] ([i915#295]) +12 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-glk-dsi: NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#533])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_page_flip:
- fi-glk-dsi: NOTRUN -> [SKIP][18] ([fdo#109271]) +30 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-glk-dsi/igt@kms_psr@primary_page_flip.html
#### Possible fixes ####
* igt@i915_selftest@live@dmabuf:
- {fi-tgl-dsi}: [FAIL][19] -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][21] ([i915#4785]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2943]: https://gitlab.freedesktop.org/drm/intel/issues/2943
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11330 -> Patchwork_22494
CI-20190529: 20190529
CI_DRM_11330: 68d8cd94c6eaa94aa6bae2e92efbd488523a1a1b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6364: 3523fe577bc22e6512a8de7e60175c8f46cf61d2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22494: 50c227eb227bbfddaed6af5fafa86e0495853461 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
50c227eb227b drm/i915/dg2: Add debugfs to control global preemption setting
1d33c55682a1 drm/i915/dg2: Add preemption changes for Wa_14015141709
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22494/index.html
[-- Attachment #2: Type: text/html, Size: 8727 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
@ 2022-03-07 9:46 ` Tvrtko Ursulin
-1 siblings, 0 replies; 12+ messages in thread
From: Tvrtko Ursulin @ 2022-03-07 9:46 UTC (permalink / raw)
To: Matt Roper, intel-gfx
Cc: dri-devel, Akeem G Abodunrin, John Harrison, Prathap Kumar Valsan
On 04/03/2022 23:46, Matt Roper wrote:
> From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
>
> Since DG2 and beyond only support global preemption enable/disable (see
> Wa_14015141709), userspace no longer has a way to control preemption on
> a per-context basis. Preemption is globally enabled by default, but the
> UMD teams have requested that we provide a debugfs interface that can be
> used to query and adjust the system-wide preemption setting for
> development and bug reporting purposes.
I guess most distros enable debugfs, anyone knows for sure? Otherwise
the bug reporting use case could be questionable.
And UMD acks would be desirable here I'd say.
> v2 (MattR):
> - Split debugfs out into a separate patch. (Jani)
> - Add the hardware update/query as facilities in intel_gt.c and just
> call them from the debugfs code. (Jani)
> - Add register to GuC's save/restore list so that the value will
> persist across resets. (Tvrtko)
> - Place under per-GT debugfs rather than i915 debugfs. (MattR)
> - Only register debugfs entries on platforms subject to Wa_14015141709,
> and only on platforms that have an RCS engine. (MattR/Tvrtko)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 50 ++++++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 3 ++
> drivers/gpu/drm/i915/gt/intel_gt_debugfs.c | 31 ++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ++
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 7 +++
> 5 files changed, 94 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8a2483ccbfb9..90bdebd8d267 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -1045,3 +1045,53 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
> intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
> mutex_unlock(>->tlb_invalidate_lock);
> }
> +
> +/**
> + * intel_gt_get_global_preemption - return whether the global preemption
> + * setting is enabled in hardware
> + * @gt: GT structure
> + *
> + * Returns the hardware's global 'preemption enabled' setting. Only relevant
> + * on newer platforms that lack per-context preemption control (and only on
> + * GTs that have a render engine).
> + *
> + * Returns 1 if preemption is enabled, 0 if disabled.
> + */
> +u64 intel_gt_get_global_preemption(struct intel_gt *gt)
> +{
> + intel_wakeref_t wakeref;
> + u32 val;
> +
> + drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
> + drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
> +
> + with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
> + val = intel_uncore_read(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN);
> +
> + return !(val & GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
> +}
> +
> +/**
> + * intel_gt_set_global_preemption - adjust global preemption enabled setting
> + * @gt: GT structure
> + * @val: desired preemption setting
> + *
> + * Enables global preemption if @val is non-zero, otherwise disables it. Only
> + * relevant on newer platforms that lack per-context preemption control (and
> + * only on GTs that have a render engine).
> + *
> + * Returns 1 if preemption is enabled, 0 if disabled.
> + */
> +void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val)
> +{
> + intel_wakeref_t wakeref;
> + u32 tmp = val ?
> + _MASKED_BIT_DISABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE) :
> + _MASKED_BIT_ENABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
> +
> + drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
> + drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
Bike shedding territory, but as long as these checks are present in
release builds, it would be possible to return an error and propagate to
debugfs caller/return. Not saying to do it just thinking out loud.
> +
> + with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
> + intel_uncore_write(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN, tmp);
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 0f571c8ee22b..63a599a1bf6d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -94,4 +94,7 @@ void intel_gt_watchdog_work(struct work_struct *work);
>
> void intel_gt_invalidate_tlbs(struct intel_gt *gt);
>
> +u64 intel_gt_get_global_preemption(struct intel_gt *gt);
> +void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val);
Bool based would be nicer unless there is some reason for 64-bits in the
future.
Regards,
Tvrtko
> +
> #endif /* __INTEL_GT_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> index f103664b71d4..d851e3f80877 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> @@ -6,6 +6,7 @@
> #include <linux/debugfs.h>
>
> #include "i915_drv.h"
> +#include "intel_gt.h"
> #include "intel_gt_debugfs.h"
> #include "intel_gt_engines_debugfs.h"
> #include "intel_gt_pm_debugfs.h"
> @@ -57,13 +58,43 @@ static int __intel_gt_debugfs_reset_store(void *data, u64 val)
> DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
> __intel_gt_debugfs_reset_store, "%llu\n");
>
> +static int i915_global_preemption_enabled_get(void *data, u64 *val)
> +{
> + *val = intel_gt_get_global_preemption((struct intel_gt *)data);
> +
> + return 0;
> +}
> +
> +static int i915_global_preemption_enabled_set(void *data, u64 val)
> +{
> + intel_gt_set_global_preemption((struct intel_gt *)data, val);
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(i915_global_preemption_enabled_fops,
> + i915_global_preemption_enabled_get,
> + i915_global_preemption_enabled_set,
> + "%llu\n");
> +
> static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
> {
> static const struct intel_gt_debugfs_file files[] = {
> { "reset", &reset_fops, NULL },
> };
> + static const struct intel_gt_debugfs_file preempt_files[] = {
> + { "preemption_enabled", &i915_global_preemption_enabled_fops }
> + };
>
> intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
> +
> + /*
> + * Global preemption control only applies to DG2 and beyond
> + * (Wa_14015141709) and only to GTs with an RCS.
> + */
> + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55) && RCS_MASK(gt))
> + intel_gt_debugfs_register_files(root, preempt_files,
> + ARRAY_SIZE(preempt_files), gt);
> }
>
> void intel_gt_debugfs_register(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 19cd34f24263..21ede1887b9f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -468,6 +468,9 @@
> #define VF_PREEMPTION _MMIO(0x83a4)
> #define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
>
> +#define GEN12_VFG_PREEMPTION_CHICKEN _MMIO(0x83b4)
> +#define GEN12_VFG_PREEMPT_CHICKEN_DISABLE REG_BIT(8)
> +
> #define GEN8_RC6_CTX_INFO _MMIO(0x8504)
>
> #define GEN12_SQCM _MMIO(0x8724)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index acc4a3766dc1..7e008382ab03 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -352,6 +352,13 @@ static int guc_mmio_regset_init(struct temp_regset *regset,
> for (i = 0; i < GEN9_LNCFCMOCS_REG_COUNT; i++)
> ret |= GUC_MMIO_REG_ADD(regset, GEN9_LNCFCMOCS(i), false);
>
> + /*
> + * VFG_PREEMPTION_CHICKEN can be controlled via debugfs; ensure
> + * the setting sticks across resets
> + */
> + if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
> + ret |= GUC_MMIO_REG_ADD(regset, GEN12_VFG_PREEMPTION_CHICKEN, true);
> +
> return ret ? -1 : 0;
> }
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting
@ 2022-03-07 9:46 ` Tvrtko Ursulin
0 siblings, 0 replies; 12+ messages in thread
From: Tvrtko Ursulin @ 2022-03-07 9:46 UTC (permalink / raw)
To: Matt Roper, intel-gfx; +Cc: dri-devel
On 04/03/2022 23:46, Matt Roper wrote:
> From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
>
> Since DG2 and beyond only support global preemption enable/disable (see
> Wa_14015141709), userspace no longer has a way to control preemption on
> a per-context basis. Preemption is globally enabled by default, but the
> UMD teams have requested that we provide a debugfs interface that can be
> used to query and adjust the system-wide preemption setting for
> development and bug reporting purposes.
I guess most distros enable debugfs, anyone knows for sure? Otherwise
the bug reporting use case could be questionable.
And UMD acks would be desirable here I'd say.
> v2 (MattR):
> - Split debugfs out into a separate patch. (Jani)
> - Add the hardware update/query as facilities in intel_gt.c and just
> call them from the debugfs code. (Jani)
> - Add register to GuC's save/restore list so that the value will
> persist across resets. (Tvrtko)
> - Place under per-GT debugfs rather than i915 debugfs. (MattR)
> - Only register debugfs entries on platforms subject to Wa_14015141709,
> and only on platforms that have an RCS engine. (MattR/Tvrtko)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c | 50 ++++++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt.h | 3 ++
> drivers/gpu/drm/i915/gt/intel_gt_debugfs.c | 31 ++++++++++++++
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ++
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 7 +++
> 5 files changed, 94 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8a2483ccbfb9..90bdebd8d267 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -1045,3 +1045,53 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
> intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
> mutex_unlock(>->tlb_invalidate_lock);
> }
> +
> +/**
> + * intel_gt_get_global_preemption - return whether the global preemption
> + * setting is enabled in hardware
> + * @gt: GT structure
> + *
> + * Returns the hardware's global 'preemption enabled' setting. Only relevant
> + * on newer platforms that lack per-context preemption control (and only on
> + * GTs that have a render engine).
> + *
> + * Returns 1 if preemption is enabled, 0 if disabled.
> + */
> +u64 intel_gt_get_global_preemption(struct intel_gt *gt)
> +{
> + intel_wakeref_t wakeref;
> + u32 val;
> +
> + drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
> + drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
> +
> + with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
> + val = intel_uncore_read(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN);
> +
> + return !(val & GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
> +}
> +
> +/**
> + * intel_gt_set_global_preemption - adjust global preemption enabled setting
> + * @gt: GT structure
> + * @val: desired preemption setting
> + *
> + * Enables global preemption if @val is non-zero, otherwise disables it. Only
> + * relevant on newer platforms that lack per-context preemption control (and
> + * only on GTs that have a render engine).
> + *
> + * Returns 1 if preemption is enabled, 0 if disabled.
> + */
> +void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val)
> +{
> + intel_wakeref_t wakeref;
> + u32 tmp = val ?
> + _MASKED_BIT_DISABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE) :
> + _MASKED_BIT_ENABLE(GEN12_VFG_PREEMPT_CHICKEN_DISABLE);
> +
> + drm_WARN_ON(>->i915->drm, GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55));
> + drm_WARN_ON(>->i915->drm, RCS_MASK(gt) == 0);
Bike shedding territory, but as long as these checks are present in
release builds, it would be possible to return an error and propagate to
debugfs caller/return. Not saying to do it just thinking out loud.
> +
> + with_intel_runtime_pm(>->i915->runtime_pm, wakeref)
> + intel_uncore_write(gt->uncore, GEN12_VFG_PREEMPTION_CHICKEN, tmp);
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 0f571c8ee22b..63a599a1bf6d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -94,4 +94,7 @@ void intel_gt_watchdog_work(struct work_struct *work);
>
> void intel_gt_invalidate_tlbs(struct intel_gt *gt);
>
> +u64 intel_gt_get_global_preemption(struct intel_gt *gt);
> +void intel_gt_set_global_preemption(struct intel_gt *gt, u64 val);
Bool based would be nicer unless there is some reason for 64-bits in the
future.
Regards,
Tvrtko
> +
> #endif /* __INTEL_GT_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> index f103664b71d4..d851e3f80877 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> @@ -6,6 +6,7 @@
> #include <linux/debugfs.h>
>
> #include "i915_drv.h"
> +#include "intel_gt.h"
> #include "intel_gt_debugfs.h"
> #include "intel_gt_engines_debugfs.h"
> #include "intel_gt_pm_debugfs.h"
> @@ -57,13 +58,43 @@ static int __intel_gt_debugfs_reset_store(void *data, u64 val)
> DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
> __intel_gt_debugfs_reset_store, "%llu\n");
>
> +static int i915_global_preemption_enabled_get(void *data, u64 *val)
> +{
> + *val = intel_gt_get_global_preemption((struct intel_gt *)data);
> +
> + return 0;
> +}
> +
> +static int i915_global_preemption_enabled_set(void *data, u64 val)
> +{
> + intel_gt_set_global_preemption((struct intel_gt *)data, val);
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(i915_global_preemption_enabled_fops,
> + i915_global_preemption_enabled_get,
> + i915_global_preemption_enabled_set,
> + "%llu\n");
> +
> static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
> {
> static const struct intel_gt_debugfs_file files[] = {
> { "reset", &reset_fops, NULL },
> };
> + static const struct intel_gt_debugfs_file preempt_files[] = {
> + { "preemption_enabled", &i915_global_preemption_enabled_fops }
> + };
>
> intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
> +
> + /*
> + * Global preemption control only applies to DG2 and beyond
> + * (Wa_14015141709) and only to GTs with an RCS.
> + */
> + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55) && RCS_MASK(gt))
> + intel_gt_debugfs_register_files(root, preempt_files,
> + ARRAY_SIZE(preempt_files), gt);
> }
>
> void intel_gt_debugfs_register(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 19cd34f24263..21ede1887b9f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -468,6 +468,9 @@
> #define VF_PREEMPTION _MMIO(0x83a4)
> #define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
>
> +#define GEN12_VFG_PREEMPTION_CHICKEN _MMIO(0x83b4)
> +#define GEN12_VFG_PREEMPT_CHICKEN_DISABLE REG_BIT(8)
> +
> #define GEN8_RC6_CTX_INFO _MMIO(0x8504)
>
> #define GEN12_SQCM _MMIO(0x8724)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> index acc4a3766dc1..7e008382ab03 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
> @@ -352,6 +352,13 @@ static int guc_mmio_regset_init(struct temp_regset *regset,
> for (i = 0; i < GEN9_LNCFCMOCS_REG_COUNT; i++)
> ret |= GUC_MMIO_REG_ADD(regset, GEN9_LNCFCMOCS(i), false);
>
> + /*
> + * VFG_PREEMPTION_CHICKEN can be controlled via debugfs; ensure
> + * the setting sticks across resets
> + */
> + if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
> + ret |= GUC_MMIO_REG_ADD(regset, GEN12_VFG_PREEMPTION_CHICKEN, true);
> +
> return ret ? -1 : 0;
> }
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
@ 2022-03-17 17:05 ` Srivatsa, Anusha
-1 siblings, 0 replies; 12+ messages in thread
From: Srivatsa, Anusha @ 2022-03-17 17:05 UTC (permalink / raw)
To: Roper, Matthew D, intel-gfx; +Cc: dri-devel
Looks good.
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt
> Roper
> Sent: Friday, March 4, 2022 3:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes
> for Wa_14015141709
>
> From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
>
> Starting with DG2, preemption can no longer be controlled using userspace
> on a per-context basis. Instead, the hardware only allows us to enable or
> disable preemption in a global, system-wide basis. Also, we lose the ability
> to specify the preemption granularity (such as batch-level vs command-level
> vs object-level).
>
> v2 (MattR):
> - Move debugfs interface to a separate patch. (Jani)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index beca8735bae5..f695a9c96c8d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2310,7 +2310,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
> struct i915_wa_list *wal)
> FF_DOP_CLOCK_GATE_DISABLE);
> }
>
> - if (IS_GRAPHICS_VER(i915, 9, 12)) {
> + if (HAS_PERCTX_PREEMPT_CTRL(i915)) {
> /*
> FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */
> wa_masked_en(wal,
> GEN7_FF_SLICE_CS_CHICKEN1,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 943267393ecb..afefb3bd2714
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1396,6 +1396,9 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915, #define HAS_GUC_DEPRIVILEGE(dev_priv) \
> (INTEL_INFO(dev_priv)->has_guc_deprivilege)
>
> +#define HAS_PERCTX_PREEMPT_CTRL(i915) \
> + ((GRAPHICS_VER(i915) >= 9) && GRAPHICS_VER_FULL(i915) <
> IP_VER(12,
> +55))
> +
> static inline bool run_as_guest(void)
> {
> return !hypervisor_is_type(X86_HYPER_NATIVE);
> --
> 2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709
@ 2022-03-17 17:05 ` Srivatsa, Anusha
0 siblings, 0 replies; 12+ messages in thread
From: Srivatsa, Anusha @ 2022-03-17 17:05 UTC (permalink / raw)
To: Roper, Matthew D, intel-gfx; +Cc: dri-devel
Looks good.
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt
> Roper
> Sent: Friday, March 4, 2022 3:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/dg2: Add preemption changes
> for Wa_14015141709
>
> From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
>
> Starting with DG2, preemption can no longer be controlled using userspace
> on a per-context basis. Instead, the hardware only allows us to enable or
> disable preemption in a global, system-wide basis. Also, we lose the ability
> to specify the preemption granularity (such as batch-level vs command-level
> vs object-level).
>
> v2 (MattR):
> - Move debugfs interface to a separate patch. (Jani)
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index beca8735bae5..f695a9c96c8d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2310,7 +2310,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
> struct i915_wa_list *wal)
> FF_DOP_CLOCK_GATE_DISABLE);
> }
>
> - if (IS_GRAPHICS_VER(i915, 9, 12)) {
> + if (HAS_PERCTX_PREEMPT_CTRL(i915)) {
> /*
> FtrPerCtxtPreemptionGranularityControl:skl,bxt,kbl,cfl,cnl,icl,tgl */
> wa_masked_en(wal,
> GEN7_FF_SLICE_CS_CHICKEN1,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 943267393ecb..afefb3bd2714
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1396,6 +1396,9 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915, #define HAS_GUC_DEPRIVILEGE(dev_priv) \
> (INTEL_INFO(dev_priv)->has_guc_deprivilege)
>
> +#define HAS_PERCTX_PREEMPT_CTRL(i915) \
> + ((GRAPHICS_VER(i915) >= 9) && GRAPHICS_VER_FULL(i915) <
> IP_VER(12,
> +55))
> +
> static inline bool run_as_guest(void)
> {
> return !hypervisor_is_type(X86_HYPER_NATIVE);
> --
> 2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 (rev2)
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
` (5 preceding siblings ...)
(?)
@ 2022-03-17 22:44 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-03-17 22:44 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 (rev2)
URL : https://patchwork.freedesktop.org/series/101070/
State : failure
== Summary ==
Applying: drm/i915/dg2: Add preemption changes for Wa_14015141709
Applying: drm/i915/dg2: Add debugfs to control global preemption setting
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/gt/intel_gt.c
M drivers/gpu/drm/i915/gt/intel_gt.h
M drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
M drivers/gpu/drm/i915/gt/intel_gt_regs.h
M drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
Auto-merging drivers/gpu/drm/i915/gt/intel_gt_regs.h
Auto-merging drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
Auto-merging drivers/gpu/drm/i915/gt/intel_gt.h
Auto-merging drivers/gpu/drm/i915/gt/intel_gt.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0002 drm/i915/dg2: Add debugfs to control global preemption setting
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-03-17 22:44 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-04 23:46 [PATCH v2 1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 Matt Roper
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
2022-03-04 23:46 ` [PATCH v2 2/2] drm/i915/dg2: Add debugfs to control global preemption setting Matt Roper
2022-03-04 23:46 ` [Intel-gfx] " Matt Roper
2022-03-07 9:46 ` Tvrtko Ursulin
2022-03-07 9:46 ` [Intel-gfx] " Tvrtko Ursulin
2022-03-05 0:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 Patchwork
2022-03-05 0:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-05 0:36 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-17 17:05 ` [Intel-gfx] [PATCH v2 1/2] " Srivatsa, Anusha
2022-03-17 17:05 ` Srivatsa, Anusha
2022-03-17 22:44 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v2,1/2] drm/i915/dg2: Add preemption changes for Wa_14015141709 (rev2) Patchwork
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