[Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase

[Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase

[Anusha Srivatsa]

This version splits the original patch into simpler units.

The intention is to check for squashing, crawling conditions
at atomic check phase and prepare for commit phase. This basically
means the in-flight cdclk state is available. intel_cdclk_can_squash(),
intel_cdclk_can_crawl() and intel_cdclk_needs_modeset() have changes
to accommodate this.

v2: Introduce intel_cdclk_modeset() instead of cramming
all changes into intel_cdclk_needs_modeset().

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

Anusha Srivatsa (5):
  drm/i915/display: Add CDCLK actions to intel_cdclk_state
  drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
  drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
  drm/i915/display: Add drm_i915_private to intel_cdclk_needs_modeset()
  drm/i915/display: Add cdclk checks to atomic check

 drivers/gpu/drm/i915/display/intel_cdclk.c    | 172 +++++++++++-------
 drivers/gpu/drm/i915/display/intel_cdclk.h    |  16 +-
 .../drm/i915/display/intel_display_power.c    |   2 +-
 3 files changed, 125 insertions(+), 65 deletions(-)

-- 
2.25.1

[Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

[Anusha Srivatsa]

This is a prep patch for what the rest of the series does.

Add existing actions that change cdclk - squash, crawl, modeset to
intel_cdclk_state so we have access to the cdclk values
that are in transition.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index df66f66fbad0..06d7f9f0b253 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -15,6 +15,14 @@ struct drm_i915_private;
 struct intel_atomic_state;
 struct intel_crtc_state;
 
+enum cdclk_actions {
+	INTEL_CDCLK_MODESET = 0,
+	INTEL_CDCLK_SQUASH,
+	INTEL_CDCLK_CRAWL,
+	INTEL_CDCLK_NOOP,
+	MAX_CDCLK_ACTIONS
+};
+
 struct intel_cdclk_config {
 	unsigned int cdclk, vco, ref, bypass;
 	u8 voltage_level;
@@ -49,6 +57,11 @@ struct intel_cdclk_state {
 
 	/* bitmask of active pipes */
 	u8 active_pipes;
+
+	struct cdclk_step {
+		enum cdclk_actions action;
+		u32 cdclk;
+	} steps[MAX_CDCLK_ACTIONS];
 };
 
 int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
-- 
2.25.1

[Intel-gfx] [PATCH 2/4] drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash

[Anusha Srivatsa]

Apart from checking if squashing can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 8888fda8b701..1f879af15d87 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1973,10 +1973,11 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 		a->ref == b->ref;
 }
 
-static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
-				   const struct intel_cdclk_config *a,
-				   const struct intel_cdclk_config *b)
+static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
+			       const struct intel_cdclk_state *a,
+			       struct intel_cdclk_state *b)
 {
+
 	/*
 	 * FIXME should store a bit more state in intel_cdclk_config
 	 * to differentiate squasher vs. cd2x divider properly. For
@@ -1986,10 +1987,10 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
 	if (!has_cdclk_squasher(dev_priv))
 		return false;
 
-	return a->cdclk != b->cdclk &&
-		a->vco != 0 &&
-		a->vco == b->vco &&
-		a->ref == b->ref;
+	return a->actual.cdclk != b->actual.cdclk &&
+		a->actual.vco != 0 &&
+		a->actual.vco == b->actual.vco &&
+		a->actual.ref == b->actual.ref;
 }
 
 /**
@@ -2776,9 +2777,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			pipe = INVALID_PIPE;
 	}
 
-	if (intel_cdclk_can_squash(dev_priv,
-				   &old_cdclk_state->actual,
-				   &new_cdclk_state->actual)) {
+	if (intel_cdclk_squash(dev_priv,
+			       old_cdclk_state,
+			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
 	} else if (intel_cdclk_can_crawl(dev_priv,
-- 
2.25.1

[Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

[Anusha Srivatsa]

Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 1f879af15d87..3007710984d4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1951,9 +1951,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
 		skl_cdclk_uninit_hw(i915);
 }
 
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
-				  const struct intel_cdclk_config *a,
-				  const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+				  const struct intel_cdclk_state *a,
+				  struct intel_cdclk_state *b)
 {
 	int a_div, b_div;
 
@@ -1964,13 +1964,13 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
 	 */
-	a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
-	b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
-	return a->vco != 0 && b->vco != 0 &&
-		a->vco != b->vco &&
+	return a->actual.vco != 0 && b->actual.vco != 0 &&
+		a->actual.vco != b->actual.vco &&
 		a_div == b_div &&
-		a->ref == b->ref;
+		a->actual.ref == b->actual.ref;
 }
 
 static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2782,9 +2782,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
-	} else if (intel_cdclk_can_crawl(dev_priv,
-					 &old_cdclk_state->actual,
-					 &new_cdclk_state->actual)) {
+	} else if (intel_cdclk_crawl(dev_priv,
+				     old_cdclk_state,
+				     new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via crawl\n");
 	} else if (pipe != INVALID_PIPE) {
-- 
2.25.1

[Intel-gfx] [PATCH 4/4] drm/i915/display: Add cdclk checks to atomic check

[Anusha Srivatsa]

Checking cdclk conditions during atomic check and preparing
for commit phase so we can have atomic commit as simple
as possible. Add the specific steps to be taken during
cdclk changes, prepare for squashing, crawling and modeset
scenarios.

v2: Add intel_cdclk_modeset() similar to intel_cdclk_squash()
and intel_cdclk_crawl().

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 115 +++++++++++++++------
 1 file changed, 81 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 3007710984d4..1efeee4200f0 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1700,12 +1700,23 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 			  const struct intel_cdclk_config *cdclk_config,
 			  enum pipe pipe)
 {
+	struct intel_atomic_state *state;
+	struct intel_cdclk_state *new_cdclk_state;
+	struct cdclk_step *cdclk_steps;
+	struct intel_cdclk_state *cdclk_state;
 	int cdclk = cdclk_config->cdclk;
 	int vco = cdclk_config->vco;
+	u32 squash_ctl = 0;
 	u32 val;
 	u16 waveform;
 	int clock;
 	int ret;
+	int i;
+
+	cdclk_state =  to_intel_cdclk_state(dev_priv->cdclk.obj.state);
+	state = cdclk_state->base.state;
+	new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
+	cdclk_steps = new_cdclk_state->steps;
 
 	/* Inform power controller of upcoming frequency change. */
 	if (DISPLAY_VER(dev_priv) >= 11)
@@ -1728,45 +1739,48 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 		return;
 	}
 
-	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->cdclk.hw.vco > 0 && vco > 0) {
-		if (dev_priv->cdclk.hw.vco != vco)
+	for (i = 0; i < MAX_CDCLK_ACTIONS; i++) {
+		switch (cdclk_steps[i].action) {
+		case INTEL_CDCLK_MODESET:
+			if (DISPLAY_VER(dev_priv) >= 11) {
+				if (dev_priv->cdclk.hw.vco != 0 &&
+				    dev_priv->cdclk.hw.vco != vco)
+					icl_cdclk_pll_disable(dev_priv);
+
+				if (dev_priv->cdclk.hw.vco != vco)
+					icl_cdclk_pll_enable(dev_priv, vco);
+			} else {
+				if (dev_priv->cdclk.hw.vco != 0 &&
+				    dev_priv->cdclk.hw.vco != vco)
+					bxt_de_pll_disable(dev_priv);
+
+				if (dev_priv->cdclk.hw.vco != vco)
+					bxt_de_pll_enable(dev_priv, vco);
+			}
+			clock = cdclk;
+			break;
+		case INTEL_CDCLK_CRAWL:
 			adlp_cdclk_pll_crawl(dev_priv, vco);
-	} else if (DISPLAY_VER(dev_priv) >= 11) {
-		if (dev_priv->cdclk.hw.vco != 0 &&
-		    dev_priv->cdclk.hw.vco != vco)
-			icl_cdclk_pll_disable(dev_priv);
-
-		if (dev_priv->cdclk.hw.vco != vco)
-			icl_cdclk_pll_enable(dev_priv, vco);
-	} else {
-		if (dev_priv->cdclk.hw.vco != 0 &&
-		    dev_priv->cdclk.hw.vco != vco)
-			bxt_de_pll_disable(dev_priv);
-
-		if (dev_priv->cdclk.hw.vco != vco)
-			bxt_de_pll_enable(dev_priv, vco);
-	}
-
-	waveform = cdclk_squash_waveform(dev_priv, cdclk);
-
-	if (waveform)
-		clock = vco / 2;
-	else
-		clock = cdclk;
-
-	if (has_cdclk_squasher(dev_priv)) {
-		u32 squash_ctl = 0;
-
-		if (waveform)
+			clock = cdclk;
+			break;
+		case INTEL_CDCLK_SQUASH:
+			waveform =  cdclk_squash_waveform(dev_priv, cdclk_steps[i].cdclk);
+			clock = vco / 2;
 			squash_ctl = CDCLK_SQUASH_ENABLE |
-				CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
-
-		intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
+			CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
+			intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
+			break;
+		case INTEL_CDCLK_NOOP:
+			break;
+		default:
+			MISSING_CASE(cdclk_steps[i].action);
+			break;
+		}
 	}
 
 	val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
-		bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
-		skl_cdclk_decimal(cdclk);
+	      bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
+	      skl_cdclk_decimal(cdclk);
 
 	/*
 	 * Disable SSA Precharge when CD clock frequency < 500 MHz,
@@ -1956,6 +1970,7 @@ static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
 				  struct intel_cdclk_state *b)
 {
 	int a_div, b_div;
+	struct cdclk_step *cdclk_transition = b->steps;
 
 	if (!HAS_CDCLK_CRAWL(dev_priv))
 		return false;
@@ -1967,6 +1982,11 @@ static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
 	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
 	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
+	cdclk_transition[0].action = INTEL_CDCLK_CRAWL;
+	cdclk_transition[0].cdclk = b->actual.cdclk;
+	cdclk_transition[1].action = INTEL_CDCLK_NOOP;
+	cdclk_transition[1].cdclk = b->actual.cdclk;
+
 	return a->actual.vco != 0 && b->actual.vco != 0 &&
 		a->actual.vco != b->actual.vco &&
 		a_div == b_div &&
@@ -1978,6 +1998,7 @@ static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
 			       struct intel_cdclk_state *b)
 {
 
+	struct cdclk_step *cdclk_transition = b->steps;
 	/*
 	 * FIXME should store a bit more state in intel_cdclk_config
 	 * to differentiate squasher vs. cd2x divider properly. For
@@ -1987,12 +2008,35 @@ static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
 	if (!has_cdclk_squasher(dev_priv))
 		return false;
 
+	cdclk_transition[0].action = INTEL_CDCLK_SQUASH;
+	cdclk_transition[0].cdclk = b->actual.cdclk;
+	cdclk_transition[1].action = INTEL_CDCLK_NOOP;
+	cdclk_transition[1].cdclk = b->actual.cdclk;
+
 	return a->actual.cdclk != b->actual.cdclk &&
 		a->actual.vco != 0 &&
 		a->actual.vco == b->actual.vco &&
 		a->actual.ref == b->actual.ref;
 }
 
+static void intel_cdclk_modeset(struct drm_i915_private *i915,
+				const struct intel_cdclk_config *a,
+				const struct intel_cdclk_config *b)
+{
+	struct intel_cdclk_state *new_cdclk_state;
+	struct cdclk_step *cdclk_transition;
+	struct intel_cdclk_state *cdclk_state =  to_intel_cdclk_state(i915->cdclk.obj.state);
+	struct intel_atomic_state *state = cdclk_state->base.state;
+
+	new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
+	cdclk_transition = new_cdclk_state->steps;
+
+	cdclk_transition[0].action = INTEL_CDCLK_MODESET;
+	cdclk_transition[0].cdclk = b->cdclk;
+	cdclk_transition[1].action = INTEL_CDCLK_NOOP;
+	cdclk_transition[1].cdclk = b->cdclk;
+}
+
 /**
  * intel_cdclk_needs_modeset - Determine if changong between the CDCLK
  *                             configurations requires a modeset on all pipes
@@ -2006,6 +2050,7 @@ static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
 bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
 			       const struct intel_cdclk_config *b)
 {
+
 	return a->cdclk != b->cdclk ||
 		a->vco != b->vco ||
 		a->ref != b->ref;
@@ -2795,6 +2840,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			    pipe_name(pipe));
 	} else if (intel_cdclk_needs_modeset(&old_cdclk_state->actual,
 					     &new_cdclk_state->actual)) {
+		intel_cdclk_modeset(dev_priv, &old_cdclk_state->actual,
+				    &new_cdclk_state->actual);
 		/* All pipes must be switched off while we change the cdclk. */
 		ret = intel_modeset_all_pipes(state);
 		if (ret)
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add CDCLK checks to atomic check phase (rev3)

[Patchwork]

== Series Details ==

Series: Add CDCLK checks to atomic check phase (rev3)
URL   : https://patchwork.freedesktop.org/series/101068/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3b1e63bbb7d4 drm/i915/display: Add CDCLK actions to intel_cdclk_state
798f018d5ec0 drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
-:28: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#28: FILE: drivers/gpu/drm/i915/display/intel_cdclk.c:1980:
 {
+

total: 0 errors, 0 warnings, 1 checks, 40 lines checked
140920b39b44 drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
-:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#25: FILE: drivers/gpu/drm/i915/display/intel_cdclk.c:1955:
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+				  const struct intel_cdclk_state *a,

total: 0 errors, 0 warnings, 1 checks, 42 lines checked
d6445335bc35 drm/i915/display: Add cdclk checks to atomic check
-:197: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#197: FILE: drivers/gpu/drm/i915/display/intel_cdclk.c:2053:
 {
+

total: 0 errors, 0 warnings, 1 checks, 180 lines checked

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add CDCLK checks to atomic check phase (rev3)

[Patchwork]

== Series Details ==

Series: Add CDCLK checks to atomic check phase (rev3)
URL   : https://patchwork.freedesktop.org/series/101068/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 9322 bytes --]

== Series Details ==

Series: Add CDCLK checks to atomic check phase (rev3)
URL   : https://patchwork.freedesktop.org/series/101068/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11350 -> Patchwork_22540
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_22540 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_22540, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html

Participating hosts (48 -> 27)
------------------------------

  Additional (2): fi-kbl-soraka fi-pnv-d510 
  Missing    (23): fi-rkl-11600 bat-dg1-6 bat-dg1-5 fi-icl-u2 fi-apl-guc bat-rpls-2 shard-dg1 fi-bdw-5557u shard-tglu fi-adl-ddr5 fi-glk-dsi fi-kbl-7500u fi-ctg-p8600 fi-skl-6700k2 fi-skl-guc fi-cfl-8700k fi-hsw-4200u fi-bsw-cyan fi-cfl-guc fi-kbl-x1275 fi-cfl-8109u shard-rkl fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22540:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - fi-bsw-nick:        [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-glk-j4005:       [PASS][3] -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-rkl-guc:         [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-bsw-kefka:       [PASS][7] -> [INCOMPLETE][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-bsw-n3050:       [PASS][9] -> [INCOMPLETE][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-bxt-dsi:         [PASS][11] -> [INCOMPLETE][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s0@smem:
    - {fi-ehl-2}:         [PASS][13] -> [INCOMPLETE][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
    - {fi-jsl-1}:         [PASS][15] -> [INCOMPLETE][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html
    - {fi-tgl-dsi}:       [PASS][17] -> [INCOMPLETE][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html
    - {bat-adlp-6}:       [PASS][19] -> [INCOMPLETE][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@runner@aborted:
    - {bat-jsl-1}:        NOTRUN -> [FAIL][21]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-jsl-1/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_22540 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-hsw-4770:        NOTRUN -> [SKIP][22] ([fdo#109271] / [fdo#109315]) +17 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@gem_exec_fence@basic-busy@bcs0:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][23] ([fdo#109271]) +9 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#2190])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#4613]) +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][26] ([i915#1886])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][27] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#533])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@prime_vgem@basic-userptr:
    - fi-pnv-d510:        NOTRUN -> [SKIP][29] ([fdo#109271]) +58 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-pnv-d510/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-tgl-1115g4:      NOTRUN -> [FAIL][30] ([i915#3690])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-1115g4/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-bwr-2160:        [FAIL][31] ([i915#3194]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][33] ([i915#3303]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5185]: https://gitlab.freedesktop.org/drm/intel/issues/5185
  [i915#5193]: https://gitlab.freedesktop.org/drm/intel/issues/5193
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * Linux: CI_DRM_11350 -> Patchwork_22540

  CI-20190529: 20190529
  CI_DRM_11350: 925314164278701a48bb63b89a95d6c7e179a02e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6375: aa6eb64bac510b7d617436997171bfe388943d89 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22540: d6445335bc35715241430601cc6d7c80dd1eab59 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d6445335bc35 drm/i915/display: Add cdclk checks to atomic check
140920b39b44 drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
798f018d5ec0 drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
3b1e63bbb7d4 drm/i915/display: Add CDCLK actions to intel_cdclk_state

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html

[-- Attachment #2: Type: text/html, Size: 10728 bytes --]

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)

[Srivatsa, Anusha]

[-- Attachment #1: Type: text/plain, Size: 9131 bytes --]

Checked the logs, a lot of machines not showing tests results even though igt_run.txt shows as PASS for most. The boot log shows ACL errors in /var/log/journal/ , sending the series again.

Anusha

From: Patchwork <patchwork@emeril.freedesktop.org>
Sent: Friday, March 11, 2022 12:55 AM
To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)

Patch Details
Series:

Add CDCLK checks to atomic check phase (rev3)

URL:

https://patchwork.freedesktop.org/series/101068/

State:

failure

Details:

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html

CI Bug Log - changes from CI_DRM_11350 -> Patchwork_22540
Summary

FAILURE

Serious unknown changes coming with Patchwork_22540 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22540, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html

Participating hosts (48 -> 27)

Additional (2): fi-kbl-soraka fi-pnv-d510
Missing (23): fi-rkl-11600 bat-dg1-6 bat-dg1-5 fi-icl-u2 fi-apl-guc bat-rpls-2 shard-dg1 fi-bdw-5557u shard-tglu fi-adl-ddr5 fi-glk-dsi fi-kbl-7500u fi-ctg-p8600 fi-skl-6700k2 fi-skl-guc fi-cfl-8700k fi-hsw-4200u fi-bsw-cyan fi-cfl-guc fi-kbl-x1275 fi-cfl-8109u shard-rkl fi-bdw-samus

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22540:

IGT changes
Possible regressions

  *   igt@gem_exec_suspend@basic-s0@smem:

     *   fi-bsw-nick: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html>
     *   fi-glk-j4005: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html>
     *   fi-rkl-guc: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html>
     *   fi-bsw-kefka: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html>
     *   fi-bsw-n3050: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html>
     *   fi-bxt-dsi: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html>

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *   igt@gem_exec_suspend@basic-s0@smem:

     *   {fi-ehl-2}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html>
     *   {fi-jsl-1}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html>
     *   {fi-tgl-dsi}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html>
     *   {bat-adlp-6}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html>

  *   igt@runner@aborted:

     *   {bat-jsl-1}: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-jsl-1/igt@runner@aborted.html>

Known issues

Here are the changes found in Patchwork_22540 that come from known issues:

IGT changes
Issues hit

  *   igt@amdgpu/amd_basic@cs-gfx:

     *   fi-hsw-4770: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#109315<https://bugs.freedesktop.org/show_bug.cgi?id=109315>) +17 similar issues

  *   igt@gem_exec_fence@basic-busy@bcs0:

     *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +9 similar issues

  *   igt@gem_huc_copy@huc-copy:

     *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#2190<https://gitlab.freedesktop.org/drm/intel/issues/2190>)

  *   igt@gem_lmem_swapping@basic:

     *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#4613<https://gitlab.freedesktop.org/drm/intel/issues/4613>) +3 similar issues

  *   igt@i915_selftest@live@gt_pm:

     *   fi-kbl-soraka: NOTRUN -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html> (i915#1886<https://gitlab.freedesktop.org/drm/intel/issues/1886>)

  *   igt@kms_chamelium@common-hpd-after-suspend:

     *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +8 similar issues

  *   igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:

     *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#533<https://gitlab.freedesktop.org/drm/intel/issues/533>)

  *   igt@prime_vgem@basic-userptr:

     *   fi-pnv-d510: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-pnv-d510/igt@prime_vgem@basic-userptr.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +58 similar issues

  *   igt@runner@aborted:

     *   fi-tgl-1115g4: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-1115g4/igt@runner@aborted.html> (i915#3690<https://gitlab.freedesktop.org/drm/intel/issues/3690>)

Possible fixes

  *   igt@core_hotunplug@unbind-rebind:

     *   fi-bwr-2160: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html> (i915#3194<https://gitlab.freedesktop.org/drm/intel/issues/3194>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html>

  *   igt@i915_selftest@live@hangcheck:

     *   fi-hsw-4770: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html> (i915#3303<https://gitlab.freedesktop.org/drm/intel/issues/3303>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html>

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Build changes

  *   Linux: CI_DRM_11350 -> Patchwork_22540

CI-20190529: 20190529
CI_DRM_11350: 925314164278701a48bb63b89a95d6c7e179a02e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6375: aa6eb64bac510b7d617436997171bfe388943d89 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22540: d6445335bc35715241430601cc6d7c80dd1eab59 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

d6445335bc35 drm/i915/display: Add cdclk checks to atomic check
140920b39b44 drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
798f018d5ec0 drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
3b1e63bbb7d4 drm/i915/display: Add CDCLK actions to intel_cdclk_state

[-- Attachment #2: Type: text/html, Size: 29365 bytes --]

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)

[Jani Nikula]

On Tue, 15 Mar 2022, "Srivatsa, Anusha" <anusha.srivatsa@intel.com> wrote:
> Checked the logs, a lot of machines not showing tests results even though igt_run.txt shows as PASS for most. The boot log shows ACL errors in /var/log/journal/ , sending the series again.

If you don't need a rebase or change anything, you know you can just hit
the retest button via the patchwork link.

BR,
Jani.

>
> Anusha
>
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Friday, March 11, 2022 12:55 AM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BAT: failure for Add CDCLK checks to atomic check phase (rev3)
>
> Patch Details
> Series:
>
> Add CDCLK checks to atomic check phase (rev3)
>
> URL:
>
> https://patchwork.freedesktop.org/series/101068/
>
> State:
>
> failure
>
> Details:
>
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html
>
> CI Bug Log - changes from CI_DRM_11350 -> Patchwork_22540
> Summary
>
> FAILURE
>
> Serious unknown changes coming with Patchwork_22540 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_22540, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/index.html
>
> Participating hosts (48 -> 27)
>
> Additional (2): fi-kbl-soraka fi-pnv-d510
> Missing (23): fi-rkl-11600 bat-dg1-6 bat-dg1-5 fi-icl-u2 fi-apl-guc bat-rpls-2 shard-dg1 fi-bdw-5557u shard-tglu fi-adl-ddr5 fi-glk-dsi fi-kbl-7500u fi-ctg-p8600 fi-skl-6700k2 fi-skl-guc fi-cfl-8700k fi-hsw-4200u fi-bsw-cyan fi-cfl-guc fi-kbl-x1275 fi-cfl-8109u shard-rkl fi-bdw-samus
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in Patchwork_22540:
>
> IGT changes
> Possible regressions
>
>   *   igt@gem_exec_suspend@basic-s0@smem:
>
>      *   fi-bsw-nick: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   fi-glk-j4005: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-glk-j4005/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   fi-rkl-guc: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-rkl-guc/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   fi-bsw-kefka: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-kefka/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   fi-bsw-n3050: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   fi-bxt-dsi: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bxt-dsi/igt@gem_exec_suspend@basic-s0@smem.html>
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
>   *   igt@gem_exec_suspend@basic-s0@smem:
>
>      *   {fi-ehl-2}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   {fi-jsl-1}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-jsl-1/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   {fi-tgl-dsi}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-dsi/igt@gem_exec_suspend@basic-s0@smem.html>
>      *   {bat-adlp-6}: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-adlp-6/igt@gem_exec_suspend@basic-s0@smem.html>
>
>   *   igt@runner@aborted:
>
>      *   {bat-jsl-1}: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/bat-jsl-1/igt@runner@aborted.html>
>
> Known issues
>
> Here are the changes found in Patchwork_22540 that come from known issues:
>
> IGT changes
> Issues hit
>
>   *   igt@amdgpu/amd_basic@cs-gfx:
>
>      *   fi-hsw-4770: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#109315<https://bugs.freedesktop.org/show_bug.cgi?id=109315>) +17 similar issues
>
>   *   igt@gem_exec_fence@basic-busy@bcs0:
>
>      *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +9 similar issues
>
>   *   igt@gem_huc_copy@huc-copy:
>
>      *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#2190<https://gitlab.freedesktop.org/drm/intel/issues/2190>)
>
>   *   igt@gem_lmem_swapping@basic:
>
>      *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#4613<https://gitlab.freedesktop.org/drm/intel/issues/4613>) +3 similar issues
>
>   *   igt@i915_selftest@live@gt_pm:
>
>      *   fi-kbl-soraka: NOTRUN -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html> (i915#1886<https://gitlab.freedesktop.org/drm/intel/issues/1886>)
>
>   *   igt@kms_chamelium@common-hpd-after-suspend:
>
>      *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +8 similar issues
>
>   *   igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
>
>      *   fi-kbl-soraka: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#533<https://gitlab.freedesktop.org/drm/intel/issues/533>)
>
>   *   igt@prime_vgem@basic-userptr:
>
>      *   fi-pnv-d510: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-pnv-d510/igt@prime_vgem@basic-userptr.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +58 similar issues
>
>   *   igt@runner@aborted:
>
>      *   fi-tgl-1115g4: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-tgl-1115g4/igt@runner@aborted.html> (i915#3690<https://gitlab.freedesktop.org/drm/intel/issues/3690>)
>
> Possible fixes
>
>   *   igt@core_hotunplug@unbind-rebind:
>
>      *   fi-bwr-2160: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html> (i915#3194<https://gitlab.freedesktop.org/drm/intel/issues/3194>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html>
>
>   *   igt@i915_selftest@live@hangcheck:
>
>      *   fi-hsw-4770: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11350/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html> (i915#3303<https://gitlab.freedesktop.org/drm/intel/issues/3303>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22540/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html>
>
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> Build changes
>
>   *   Linux: CI_DRM_11350 -> Patchwork_22540
>
> CI-20190529: 20190529
> CI_DRM_11350: 925314164278701a48bb63b89a95d6c7e179a02e @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_6375: aa6eb64bac510b7d617436997171bfe388943d89 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_22540: d6445335bc35715241430601cc6d7c80dd1eab59 @ git://anongit.freedesktop.org/gfx-ci/linux
>
> == Linux commits ==
>
> d6445335bc35 drm/i915/display: Add cdclk checks to atomic check
> 140920b39b44 drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
> 798f018d5ec0 drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
> 3b1e63bbb7d4 drm/i915/display: Add CDCLK actions to intel_cdclk_state

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

[Anusha Srivatsa]

Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

v2: Move crawling steps to a switch case (anusha)
Cc: Matt Roper <matthew.d.roper@intel.com>

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 45 +++++++++++++---------
 1 file changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index f98fd48fe905..7bba10635c5e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -38,6 +38,7 @@
 #include "intel_psr.h"
 #include "vlv_sideband.h"
 
+#define ADLP_CDCLK_CRAWL(dev_priv, vco)	(HAS_CDCLK_CRAWL(dev_priv) && dev_priv->cdclk.hw.vco > 0 && vco > 0)
 /**
  * DOC: CDCLK / RAWCLK
  *
@@ -1727,10 +1728,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 		return;
 	}
 
-	if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->cdclk.hw.vco > 0 && vco > 0) {
-		if (dev_priv->cdclk.hw.vco != vco)
-			adlp_cdclk_pll_crawl(dev_priv, vco);
-	} else if (DISPLAY_VER(dev_priv) >= 11) {
+	if (!ADLP_CDCLK_CRAWL(dev_priv, vco) && DISPLAY_VER(dev_priv) >= 11) {
 		if (dev_priv->cdclk.hw.vco != 0 &&
 		    dev_priv->cdclk.hw.vco != vco)
 			icl_cdclk_pll_disable(dev_priv);
@@ -1748,18 +1746,21 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
 
 	waveform = cdclk_squash_waveform(dev_priv, cdclk);
 
-	if (waveform && has_cdclk_squasher(dev_priv)) {
-		clock = vco / 2;
+	if ((waveform && has_cdclk_squasher(dev_priv)) || ADLP_CDCLK_CRAWL(dev_priv, vco)) {
 		for (i = 0; i < MAX_CDCLK_ACTIONS; i++) {
 			switch (cdclk_steps[i].action) {
+			case INTEL_CDCLK_CRAWL:
+				adlp_cdclk_pll_crawl(dev_priv, vco);
+				clock = cdclk;
+				break;
 			case INTEL_CDCLK_SQUASH:
 				waveform =  cdclk_squash_waveform(dev_priv, cdclk_steps[i].cdclk);
 				squash_ctl = CDCLK_SQUASH_ENABLE |
 					     CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
 				intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
+				clock = vco / 2;
 				break;
 			case INTEL_CDCLK_NOOP:
-			case INTEL_CDCLK_CRAWL:
 			case INTEL_CDCLK_MODESET:
 				break;
 			default:
@@ -1956,10 +1957,11 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
 		skl_cdclk_uninit_hw(i915);
 }
 
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
-				  const struct intel_cdclk_config *a,
-				  const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+			      const struct intel_cdclk_state *a,
+			      struct intel_cdclk_state *b)
 {
+	struct cdclk_step *cdclk_transition = b->steps;
 	int a_div, b_div;
 
 	if (!HAS_CDCLK_CRAWL(dev_priv))
@@ -1969,13 +1971,18 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
 	 */
-	a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
-	b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
-	return a->vco != 0 && b->vco != 0 &&
-		a->vco != b->vco &&
-		a_div == b_div &&
-		a->ref == b->ref;
+	cdclk_transition[0].action = INTEL_CDCLK_CRAWL;
+	cdclk_transition[0].cdclk = b->actual.cdclk;
+	cdclk_transition[1].action = INTEL_CDCLK_NOOP;
+	cdclk_transition[1].cdclk = b->actual.cdclk;
+
+	return a->actual.vco != 0 && b->actual.vco != 0 &&
+		a->actual.vco != b->actual.vco &&
+ 		a_div == b_div && 
+		a->actual.ref == b->actual.ref;
 }
 
 static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2781,9 +2788,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
-	} else if (intel_cdclk_can_crawl(dev_priv,
-					 &old_cdclk_state->actual,
-					 &new_cdclk_state->actual)) {
+	} else if (intel_cdclk_crawl(dev_priv,
+				     old_cdclk_state,
+				     new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via crawl\n");
 	} else if (pipe != INVALID_PIPE) {
-- 
2.25.1

[Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

[Anusha Srivatsa]

Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 4081b880a6ef..cb6e419562dd 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1944,9 +1944,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
 		skl_cdclk_uninit_hw(i915);
 }
 
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
-				  const struct intel_cdclk_config *a,
-				  const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+				  const struct intel_cdclk_state *a,
+				  struct intel_cdclk_state *b)
 {
 	int a_div, b_div;
 
@@ -1957,13 +1957,13 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
 	 */
-	a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
-	b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
-	return a->vco != 0 && b->vco != 0 &&
-		a->vco != b->vco &&
+	return a->actual.vco != 0 && b->actual.vco != 0 &&
+		a->actual.vco != b->actual.vco &&
 		a_div == b_div &&
-		a->ref == b->ref;
+		a->actual.ref == b->actual.ref;
 }
 
 static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2764,9 +2764,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
-	} else if (intel_cdclk_can_crawl(dev_priv,
-					 &old_cdclk_state->actual,
-					 &new_cdclk_state->actual)) {
+	} else if (intel_cdclk_crawl(dev_priv,
+				     old_cdclk_state,
+				     new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via crawl\n");
 	} else if (pipe != INVALID_PIPE) {
-- 
2.25.1

[Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

[Anusha Srivatsa]

Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 1f879af15d87..3007710984d4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1951,9 +1951,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
 		skl_cdclk_uninit_hw(i915);
 }
 
-static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
-				  const struct intel_cdclk_config *a,
-				  const struct intel_cdclk_config *b)
+static bool intel_cdclk_crawl(struct drm_i915_private *dev_priv,
+				  const struct intel_cdclk_state *a,
+				  struct intel_cdclk_state *b)
 {
 	int a_div, b_div;
 
@@ -1964,13 +1964,13 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 	 * The vco and cd2x divider will change independently
 	 * from each, so we disallow cd2x change when crawling.
 	 */
-	a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
-	b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+	a_div = DIV_ROUND_CLOSEST(a->actual.vco, a->actual.cdclk);
+	b_div = DIV_ROUND_CLOSEST(b->actual.vco, b->actual.cdclk);
 
-	return a->vco != 0 && b->vco != 0 &&
-		a->vco != b->vco &&
+	return a->actual.vco != 0 && b->actual.vco != 0 &&
+		a->actual.vco != b->actual.vco &&
 		a_div == b_div &&
-		a->ref == b->ref;
+		a->actual.ref == b->actual.ref;
 }
 
 static bool intel_cdclk_squash(struct drm_i915_private *dev_priv,
@@ -2782,9 +2782,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 			       new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
-	} else if (intel_cdclk_can_crawl(dev_priv,
-					 &old_cdclk_state->actual,
-					 &new_cdclk_state->actual)) {
+	} else if (intel_cdclk_crawl(dev_priv,
+				     old_cdclk_state,
+				     new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via crawl\n");
 	} else if (pipe != INVALID_PIPE) {
-- 
2.25.1