* [PATCH v1 00/14] ARM: dts: imx6dl-colibri: Misc improvements and newly added carriers
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alexander Stein, Alistair Francis, Ariel D'Alessandro,
Arnd Bergmann, Christoph Niedermaier, Douglas Anderson,
Fabio Estevam, Johann Neuhauser, Krzysztof Kozlowski, Li Yang,
Lucas Stach, Marcel Ziswiler, Matthias Schiffer, NXP Linux Team,
Oleksij Rempel, Olof Johansson, Pascal Zimmermann,
Pengutronix Kernel Team, Philippe Schenker, Rob Herring,
Russell King, Sascha Hauer, Sebastian Reichel, Shawn Guo,
Tim Harvey, devicetree, linux-arm-kernel, linux-kernel, soc
This is a general update of the Colibri iMX6 device tree files.
The Toradex Colibri family is composed of a SoM that can be plugged on
various carrier boards, with carrier boards allowing multiple optional
accessories (e.g. display, camera, ...).
The device tree sources are structured into a SoM dtsi and a carrier dts
which then includes the SoM dtsi. The SoM dtsi defines and enables the
functionality self contained on the SoM and prepares for functionality
provided by the carrier HW or accessories, so that the carrier dts then
can enable or amend nodes provided. Accessories are enabled in overlays
depending on HW configuration.
The series improves the existing Colibri Evaluation Board device tree and
adds new device trees for the Aster, Iris, and Iris V2 carrier boards.
Additionally it drops the dedicated device tree for SoM V1.1 HW used in a
Evaluation board. The regular device tree works well in that combination.
The higher SD card speed possible with SoM V1.1 would require HW
modification on the carrier board.
Improvements:
- Specifies GPIO line names for use with libgpiod.
- Disables optional accessories. They would be enabled in overlays
depending on HW configuration.
- Lower power consumption after poweroff.
- Move more functionality into the SoM dtsi file to reduce code
duplication.
- General cleanup to adhere to dtbs bindings and missed alphabetically
ordering.
Fixes:
- Copy/paste error in i2c2 pinmuxing resulting in i2c2 being
nonfunctional.
Adds:
- imx6dl-colibri-aster.dtb: used for a Colibri iMX6 mated in an Aster
carrier board.
- imx6dl-colibri-iris.dtb: used for a Colibri iMX6 mated in an
Iris V1.x carrier board.
- imx6dl-colibri-iris-v2.dtb: used for a Colibri iMX6 mated in an
Iris V2.x carrier board.
Drops:
- imx6dl-colibri-v1_1-eval-v3.dtb, imx6dl-colibri-eval-v3.dtb is good
enough.
Max Krummenacher (13):
dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl
ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree
ARM: dts: imx6dl-colibri: Fix I2C pinmuxing
ARM: dts: imx6dl-colibri: Disable add-on accessories
ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff
ARM: dts: imx6dl-colibri: Add additional pingroups
ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi
ARM: dts: imx6dl-colibri: Cleanup
ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration
ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards
ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board
ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD
Oleksandr Suvorov (1):
ARM: dts: imx6dl-colibri: Add gpio-line-names
.../devicetree/bindings/arm/fsl.yaml | 11 +-
arch/arm/boot/dts/Makefile | 4 +-
arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 110 +--
arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++
arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 ++++
.../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 -
.../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 -
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 771 ++++++++++++++----
arch/arm/configs/imx_v6_v7_defconfig | 1 +
10 files changed, 919 insertions(+), 364 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts
delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
--
2.20.1
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v1 00/14] ARM: dts: imx6dl-colibri: Misc improvements and newly added carriers
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alexander Stein, Alistair Francis, Ariel D'Alessandro,
Arnd Bergmann, Christoph Niedermaier, Douglas Anderson,
Fabio Estevam, Johann Neuhauser, Krzysztof Kozlowski, Li Yang,
Lucas Stach, Marcel Ziswiler, Matthias Schiffer, NXP Linux Team,
Oleksij Rempel, Olof Johansson, Pascal Zimmermann,
Pengutronix Kernel Team, Philippe Schenker, Rob Herring,
Russell King, Sascha Hauer, Sebastian Reichel, Shawn Guo,
Tim Harvey, devicetree, linux-arm-kernel, linux-kernel, soc
This is a general update of the Colibri iMX6 device tree files.
The Toradex Colibri family is composed of a SoM that can be plugged on
various carrier boards, with carrier boards allowing multiple optional
accessories (e.g. display, camera, ...).
The device tree sources are structured into a SoM dtsi and a carrier dts
which then includes the SoM dtsi. The SoM dtsi defines and enables the
functionality self contained on the SoM and prepares for functionality
provided by the carrier HW or accessories, so that the carrier dts then
can enable or amend nodes provided. Accessories are enabled in overlays
depending on HW configuration.
The series improves the existing Colibri Evaluation Board device tree and
adds new device trees for the Aster, Iris, and Iris V2 carrier boards.
Additionally it drops the dedicated device tree for SoM V1.1 HW used in a
Evaluation board. The regular device tree works well in that combination.
The higher SD card speed possible with SoM V1.1 would require HW
modification on the carrier board.
Improvements:
- Specifies GPIO line names for use with libgpiod.
- Disables optional accessories. They would be enabled in overlays
depending on HW configuration.
- Lower power consumption after poweroff.
- Move more functionality into the SoM dtsi file to reduce code
duplication.
- General cleanup to adhere to dtbs bindings and missed alphabetically
ordering.
Fixes:
- Copy/paste error in i2c2 pinmuxing resulting in i2c2 being
nonfunctional.
Adds:
- imx6dl-colibri-aster.dtb: used for a Colibri iMX6 mated in an Aster
carrier board.
- imx6dl-colibri-iris.dtb: used for a Colibri iMX6 mated in an
Iris V1.x carrier board.
- imx6dl-colibri-iris-v2.dtb: used for a Colibri iMX6 mated in an
Iris V2.x carrier board.
Drops:
- imx6dl-colibri-v1_1-eval-v3.dtb, imx6dl-colibri-eval-v3.dtb is good
enough.
Max Krummenacher (13):
dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl
ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree
ARM: dts: imx6dl-colibri: Fix I2C pinmuxing
ARM: dts: imx6dl-colibri: Disable add-on accessories
ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff
ARM: dts: imx6dl-colibri: Add additional pingroups
ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi
ARM: dts: imx6dl-colibri: Cleanup
ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration
ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards
ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board
ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD
Oleksandr Suvorov (1):
ARM: dts: imx6dl-colibri: Add gpio-line-names
.../devicetree/bindings/arm/fsl.yaml | 11 +-
arch/arm/boot/dts/Makefile | 4 +-
arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 110 +--
arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++
arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 ++++
.../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 -
.../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 -
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 771 ++++++++++++++----
arch/arm/configs/imx_v6_v7_defconfig | 1 +
10 files changed, 919 insertions(+), 364 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts
delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 31+ messages in thread
* [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
2022-03-14 16:29 ` Max Krummenacher
(?)
@ 2022-03-14 16:29 ` Max Krummenacher
2022-03-23 18:23 ` Rob Herring
2022-04-10 0:45 ` Shawn Guo
-1 siblings, 2 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alexander Stein, Ariel D'Alessandro, Christoph Niedermaier,
Fabio Estevam, Krzysztof Kozlowski, Li Yang, Lucas Stach,
Marcel Ziswiler, Matthias Schiffer, Oleksij Rempel, Rob Herring,
Sebastian Reichel, Shawn Guo, Tim Harvey, devicetree,
linux-kernel
The dedicated device tree for V1.1 modules has been dropped. Remove
its bindings too.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 8 --------
1 file changed, 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 97f6eebad76a..cf854203bfb1 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -411,7 +411,6 @@ properties:
- technologic,imx6dl-ts4900
- technologic,imx6dl-ts7970
- toradex,colibri_imx6dl # Colibri iMX6 Modules
- - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 V1.1 Modules
- udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board
- vdl,lanmcu # Van der Laan LANMCU board
- wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board
@@ -492,13 +491,6 @@ properties:
- const: toradex,colibri_imx6dl # Colibri iMX6DL/S Module
- const: fsl,imx6dl
- - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S V1.1 Modules
- items:
- - enum:
- - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6DL/S V1.1 M. on Colibri Evaluation Board V3
- - const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6DL/S V1.1 Module
- - const: fsl,imx6dl
-
- description: i.MX6S DHCOM DRC02 Board
items:
- const: dh,imx6s-dhcom-drc02
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl
2022-03-14 16:29 ` Max Krummenacher
(?)
(?)
@ 2022-03-14 16:29 ` Max Krummenacher
2022-03-23 18:23 ` Rob Herring
-1 siblings, 1 reply; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alexander Stein, Ariel D'Alessandro, Christoph Niedermaier,
Fabio Estevam, Krzysztof Kozlowski, Li Yang, Marcel Ziswiler,
Matthias Schiffer, Oleksij Rempel, Rob Herring,
Sebastian Reichel, Shawn Guo, Tim Harvey, devicetree,
linux-kernel
Add bindings for Aster, Iris and Iris V2 carrier boards our
Colibri iMX6S/DL may be mated with.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index cf854203bfb1..fefbc13f3928 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -487,7 +487,10 @@ properties:
- description: i.MX6DL Boards with Toradex Colibri iMX6DL/S Modules
items:
- enum:
+ - toradex,colibri_imx6dl-aster # Colibri iMX6DL/S Module on Aster Board
- toradex,colibri_imx6dl-eval-v3 # Colibri iMX6DL/S Module on Colibri Evaluation Board V3
+ - toradex,colibri_imx6dl-iris # Colibri iMX6DL/S Module on Iris Board
+ - toradex,colibri_imx6dl-iris-v2 # Colibri iMX6DL/S Module on Iris Board V2
- const: toradex,colibri_imx6dl # Colibri iMX6DL/S Module
- const: fsl,imx6dl
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 03/14] ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Drop Colibri V1.1 device tree, this is just a duplicate of Colibri V1.0
with the possibility to use SD cards in UHS mode if the carrier board
does not have 3.3V pull up resistor.
The dedicated device tree kept the feature switched of by setting
the no-1-8-v property and thus does not offer anything different
than what the regular device tree does.
Thus drop the dedicated device tree and merge the preparation to
allow enabling the feature should a carrier without pull ups
be used into the regular device tree.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 1 -
.../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 -------------
.../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 -------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 29 +++++++++++-
4 files changed, 27 insertions(+), 78 deletions(-)
delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 235ad559acb2..ee27bafa69be 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -453,7 +453,6 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-eval-v3.dtb \
- imx6dl-colibri-v1_1-eval-v3.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
deleted file mode 100644
index 223275f028f1..000000000000
--- a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright 2020 Toradex
- */
-
-/dts-v1/;
-
-#include "imx6dl-colibri-eval-v3.dts"
-#include "imx6qdl-colibri-v1_1-uhs.dtsi"
-
-/ {
- model = "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation Board V3";
- compatible = "toradex,colibri_imx6dl-v1_1-eval-v3",
- "toradex,colibri_imx6dl-v1_1",
- "toradex,colibri_imx6dl-eval-v3",
- "toradex,colibri_imx6dl",
- "fsl,imx6dl";
-};
-
-/* Colibri MMC */
-&usdhc1 {
- status = "okay";
- /*
- * Please make sure your carrier board does not pull-up any of
- * the MMC/SD signals to 3.3 volt before attempting to activate
- * UHS-I support.
- * To let signaling voltage be changed to 1.8V, please
- * delete no-1-8-v property (example below):
- * /delete-property/no-1-8-v;
- */
-};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi b/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
deleted file mode 100644
index 7672fbfc29be..000000000000
--- a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright 2020 Toradex
- */
-
-&iomuxc {
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
- >;
- };
-};
-
-/* Colibri MMC */
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
- vmmc-supply = <®_module_3v3>;
- vqmmc-supply = <&vgen3_reg>;
- wakeup-source;
- keep-power-in-suspend;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
-};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 4e2a309c93fa..16d38bc78b2a 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -370,11 +370,14 @@
/* Colibri MMC */
&usdhc1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
disable-wp;
- vqmmc-supply = <®_module_3v3>;
+ vmmc-supply = <®_module_3v3>;
+ vqmmc-supply = <&vgen3_reg>;
bus-width = <4>;
no-1-8-v;
status = "disabled";
@@ -692,6 +695,28 @@
>;
};
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 03/14] ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Drop Colibri V1.1 device tree, this is just a duplicate of Colibri V1.0
with the possibility to use SD cards in UHS mode if the carrier board
does not have 3.3V pull up resistor.
The dedicated device tree kept the feature switched of by setting
the no-1-8-v property and thus does not offer anything different
than what the regular device tree does.
Thus drop the dedicated device tree and merge the preparation to
allow enabling the feature should a carrier without pull ups
be used into the regular device tree.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 1 -
.../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 -------------
.../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 -------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 29 +++++++++++-
4 files changed, 27 insertions(+), 78 deletions(-)
delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 235ad559acb2..ee27bafa69be 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -453,7 +453,6 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-eval-v3.dtb \
- imx6dl-colibri-v1_1-eval-v3.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
deleted file mode 100644
index 223275f028f1..000000000000
--- a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright 2020 Toradex
- */
-
-/dts-v1/;
-
-#include "imx6dl-colibri-eval-v3.dts"
-#include "imx6qdl-colibri-v1_1-uhs.dtsi"
-
-/ {
- model = "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation Board V3";
- compatible = "toradex,colibri_imx6dl-v1_1-eval-v3",
- "toradex,colibri_imx6dl-v1_1",
- "toradex,colibri_imx6dl-eval-v3",
- "toradex,colibri_imx6dl",
- "fsl,imx6dl";
-};
-
-/* Colibri MMC */
-&usdhc1 {
- status = "okay";
- /*
- * Please make sure your carrier board does not pull-up any of
- * the MMC/SD signals to 3.3 volt before attempting to activate
- * UHS-I support.
- * To let signaling voltage be changed to 1.8V, please
- * delete no-1-8-v property (example below):
- * /delete-property/no-1-8-v;
- */
-};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi b/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
deleted file mode 100644
index 7672fbfc29be..000000000000
--- a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright 2020 Toradex
- */
-
-&iomuxc {
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
- >;
- };
-};
-
-/* Colibri MMC */
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
- vmmc-supply = <®_module_3v3>;
- vqmmc-supply = <&vgen3_reg>;
- wakeup-source;
- keep-power-in-suspend;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
-};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 4e2a309c93fa..16d38bc78b2a 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -370,11 +370,14 @@
/* Colibri MMC */
&usdhc1 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
disable-wp;
- vqmmc-supply = <®_module_3v3>;
+ vmmc-supply = <®_module_3v3>;
+ vqmmc-supply = <&vgen3_reg>;
bus-width = <4>;
no-1-8-v;
status = "disabled";
@@ -692,6 +695,28 @@
>;
};
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 04/14] ARM: dts: imx6dl-colibri: Fix I2C pinmuxing
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Philippe Schenker, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel
Fix names of extra pingroup node and property for gpio bus recovery.
Without the change i2c2 is not functional.
Fixes: 56f0df6b6b58 ("ARM: dts: imx*(colibri|apalis): add missing
recovery modes to i2c")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 16d38bc78b2a..c6112b1bffd4 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Copyright 2014-2020 Toradex
+ * Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
@@ -132,7 +132,7 @@
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
- pinctrl-0 = <&pinctrl_i2c2_gpio>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
@@ -491,7 +491,7 @@
>;
};
- pinctrl_i2c2_gpio: i2c2grp {
+ pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 04/14] ARM: dts: imx6dl-colibri: Fix I2C pinmuxing
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Philippe Schenker, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel
Fix names of extra pingroup node and property for gpio bus recovery.
Without the change i2c2 is not functional.
Fixes: 56f0df6b6b58 ("ARM: dts: imx*(colibri|apalis): add missing
recovery modes to i2c")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 16d38bc78b2a..c6112b1bffd4 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Copyright 2014-2020 Toradex
+ * Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
@@ -132,7 +132,7 @@
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
- pinctrl-0 = <&pinctrl_i2c2_gpio>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
@@ -491,7 +491,7 @@
>;
};
- pinctrl_i2c2_gpio: i2c2grp {
+ pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 05/14] ARM: dts: imx6dl-colibri: Add gpio-line-names
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Oleksandr Suvorov, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel
From: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Add GPIO line names on module level. Those are all GPIOs which a user
might use on his custom carrier board. If more meaningful names are
available on the carrier board, the user can overwrite the line names
in the carrier board level device tree.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 218 +++++++++++++++++++++++++
1 file changed, 218 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index c6112b1bffd4..c92887f6af61 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -118,6 +118,224 @@
};
};
+&gpio1 {
+ gpio-line-names = "",
+ "SODIMM_67",
+ "SODIMM_180",
+ "SODIMM_196",
+ "SODIMM_174",
+ "SODIMM_176",
+ "SODIMM_194",
+ "SODIMM_55",
+ "SODIMM_63",
+ "SODIMM_28",
+ "SODIMM_93",
+ "SODIMM_69",
+ "SODIMM_99",
+ "SODIMM_130",
+ "SODIMM_106",
+ "SODIMM_98",
+ "SODIMM_192",
+ "SODIMM_49",
+ "SODIMM_190",
+ "SODIMM_51",
+ "SODIMM_47",
+ "SODIMM_53",
+ "",
+ "SODIMM_22";
+};
+
+&gpio2 {
+ gpio-line-names = "SODIMM_132",
+ "SODIMM_134",
+ "SODIMM_135",
+ "SODIMM_133",
+ "SODIMM_102",
+ "SODIMM_43",
+ "SODIMM_127",
+ "SODIMM_37",
+ "SODIMM_104",
+ "SODIMM_59",
+ "SODIMM_30",
+ "SODIMM_100",
+ "SODIMM_38",
+ "SODIMM_34",
+ "SODIMM_32",
+ "SODIMM_36",
+ "SODIMM_59",
+ "SODIMM_67",
+ "SODIMM_97",
+ "SODIMM_79",
+ "SODIMM_103",
+ "SODIMM_101",
+ "SODIMM_45",
+ "SODIMM_105",
+ "SODIMM_107",
+ "SODIMM_91",
+ "SODIMM_89",
+ "SODIMM_150",
+ "SODIMM_126",
+ "SODIMM_128",
+ "",
+ "SODIMM_94";
+};
+
+&gpio3 {
+ gpio-line-names = "SODIMM_111",
+ "SODIMM_113",
+ "SODIMM_115",
+ "SODIMM_117",
+ "SODIMM_119",
+ "SODIMM_121",
+ "SODIMM_123",
+ "SODIMM_125",
+ "SODIMM_110",
+ "SODIMM_112",
+ "SODIMM_114",
+ "SODIMM_116",
+ "SODIMM_118",
+ "SODIMM_120",
+ "SODIMM_122",
+ "SODIMM_124",
+ "",
+ "SODIMM_96",
+ "SODIMM_77",
+ "SODIMM_25",
+ "SODIMM_27",
+ "SODIMM_88",
+ "SODIMM_90",
+ "SODIMM_31",
+ "SODIMM_23",
+ "SODIMM_29",
+ "SODIMM_71",
+ "SODIMM_73",
+ "SODIMM_92",
+ "SODIMM_81",
+ "SODIMM_131",
+ "SODIMM_129";
+};
+
+&gpio4 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_168",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_184",
+ "SODIMM_186",
+ "HDMI_15",
+ "HDMI_16",
+ "SODIMM_178",
+ "SODIMM_188",
+ "SODIMM_56",
+ "SODIMM_44",
+ "SODIMM_68",
+ "SODIMM_82",
+ "SODIMM_24",
+ "SODIMM_76",
+ "SODIMM_70",
+ "SODIMM_60",
+ "SODIMM_58",
+ "SODIMM_78",
+ "SODIMM_72",
+ "SODIMM_80",
+ "SODIMM_46",
+ "SODIMM_62",
+ "SODIMM_48",
+ "SODIMM_74";
+};
+
+&gpio5 {
+ gpio-line-names = "SODIMM_95",
+ "",
+ "SODIMM_86",
+ "",
+ "SODIMM_65",
+ "SODIMM_50",
+ "SODIMM_52",
+ "SODIMM_54",
+ "SODIMM_66",
+ "SODIMM_64",
+ "SODIMM_57",
+ "SODIMM_61",
+ "SODIMM_136",
+ "SODIMM_138",
+ "SODIMM_140",
+ "SODIMM_142",
+ "SODIMM_144",
+ "SODIMM_146",
+ "SODIMM_172",
+ "SODIMM_170",
+ "SODIMM_149",
+ "SODIMM_151",
+ "SODIMM_153",
+ "SODIMM_155",
+ "SODIMM_157",
+ "SODIMM_159",
+ "SODIMM_161",
+ "SODIMM_163",
+ "SODIMM_33",
+ "SODIMM_35",
+ "SODIMM_165",
+ "SODIMM_167";
+};
+
+&gpio6 {
+ gpio-line-names = "SODIMM_169",
+ "SODIMM_171",
+ "SODIMM_173",
+ "SODIMM_175",
+ "SODIMM_177",
+ "SODIMM_179",
+ "SODIMM_85",
+ "SODIMM_166",
+ "SODIMM_160",
+ "SODIMM_162",
+ "SODIMM_158",
+ "SODIMM_164",
+ "",
+ "",
+ "SODIMM_156",
+ "SODIMM_75",
+ "SODIMM_154",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_152";
+};
+
+&gpio7 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_19",
+ "SODIMM_21",
+ "",
+ "SODIMM_137";
+};
+
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_ddc>;
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 05/14] ARM: dts: imx6dl-colibri: Add gpio-line-names
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Oleksandr Suvorov, Fabio Estevam, NXP Linux Team,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel
From: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Add GPIO line names on module level. Those are all GPIOs which a user
might use on his custom carrier board. If more meaningful names are
available on the carrier board, the user can overwrite the line names
in the carrier board level device tree.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 218 +++++++++++++++++++++++++
1 file changed, 218 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index c6112b1bffd4..c92887f6af61 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -118,6 +118,224 @@
};
};
+&gpio1 {
+ gpio-line-names = "",
+ "SODIMM_67",
+ "SODIMM_180",
+ "SODIMM_196",
+ "SODIMM_174",
+ "SODIMM_176",
+ "SODIMM_194",
+ "SODIMM_55",
+ "SODIMM_63",
+ "SODIMM_28",
+ "SODIMM_93",
+ "SODIMM_69",
+ "SODIMM_99",
+ "SODIMM_130",
+ "SODIMM_106",
+ "SODIMM_98",
+ "SODIMM_192",
+ "SODIMM_49",
+ "SODIMM_190",
+ "SODIMM_51",
+ "SODIMM_47",
+ "SODIMM_53",
+ "",
+ "SODIMM_22";
+};
+
+&gpio2 {
+ gpio-line-names = "SODIMM_132",
+ "SODIMM_134",
+ "SODIMM_135",
+ "SODIMM_133",
+ "SODIMM_102",
+ "SODIMM_43",
+ "SODIMM_127",
+ "SODIMM_37",
+ "SODIMM_104",
+ "SODIMM_59",
+ "SODIMM_30",
+ "SODIMM_100",
+ "SODIMM_38",
+ "SODIMM_34",
+ "SODIMM_32",
+ "SODIMM_36",
+ "SODIMM_59",
+ "SODIMM_67",
+ "SODIMM_97",
+ "SODIMM_79",
+ "SODIMM_103",
+ "SODIMM_101",
+ "SODIMM_45",
+ "SODIMM_105",
+ "SODIMM_107",
+ "SODIMM_91",
+ "SODIMM_89",
+ "SODIMM_150",
+ "SODIMM_126",
+ "SODIMM_128",
+ "",
+ "SODIMM_94";
+};
+
+&gpio3 {
+ gpio-line-names = "SODIMM_111",
+ "SODIMM_113",
+ "SODIMM_115",
+ "SODIMM_117",
+ "SODIMM_119",
+ "SODIMM_121",
+ "SODIMM_123",
+ "SODIMM_125",
+ "SODIMM_110",
+ "SODIMM_112",
+ "SODIMM_114",
+ "SODIMM_116",
+ "SODIMM_118",
+ "SODIMM_120",
+ "SODIMM_122",
+ "SODIMM_124",
+ "",
+ "SODIMM_96",
+ "SODIMM_77",
+ "SODIMM_25",
+ "SODIMM_27",
+ "SODIMM_88",
+ "SODIMM_90",
+ "SODIMM_31",
+ "SODIMM_23",
+ "SODIMM_29",
+ "SODIMM_71",
+ "SODIMM_73",
+ "SODIMM_92",
+ "SODIMM_81",
+ "SODIMM_131",
+ "SODIMM_129";
+};
+
+&gpio4 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_168",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_184",
+ "SODIMM_186",
+ "HDMI_15",
+ "HDMI_16",
+ "SODIMM_178",
+ "SODIMM_188",
+ "SODIMM_56",
+ "SODIMM_44",
+ "SODIMM_68",
+ "SODIMM_82",
+ "SODIMM_24",
+ "SODIMM_76",
+ "SODIMM_70",
+ "SODIMM_60",
+ "SODIMM_58",
+ "SODIMM_78",
+ "SODIMM_72",
+ "SODIMM_80",
+ "SODIMM_46",
+ "SODIMM_62",
+ "SODIMM_48",
+ "SODIMM_74";
+};
+
+&gpio5 {
+ gpio-line-names = "SODIMM_95",
+ "",
+ "SODIMM_86",
+ "",
+ "SODIMM_65",
+ "SODIMM_50",
+ "SODIMM_52",
+ "SODIMM_54",
+ "SODIMM_66",
+ "SODIMM_64",
+ "SODIMM_57",
+ "SODIMM_61",
+ "SODIMM_136",
+ "SODIMM_138",
+ "SODIMM_140",
+ "SODIMM_142",
+ "SODIMM_144",
+ "SODIMM_146",
+ "SODIMM_172",
+ "SODIMM_170",
+ "SODIMM_149",
+ "SODIMM_151",
+ "SODIMM_153",
+ "SODIMM_155",
+ "SODIMM_157",
+ "SODIMM_159",
+ "SODIMM_161",
+ "SODIMM_163",
+ "SODIMM_33",
+ "SODIMM_35",
+ "SODIMM_165",
+ "SODIMM_167";
+};
+
+&gpio6 {
+ gpio-line-names = "SODIMM_169",
+ "SODIMM_171",
+ "SODIMM_173",
+ "SODIMM_175",
+ "SODIMM_177",
+ "SODIMM_179",
+ "SODIMM_85",
+ "SODIMM_166",
+ "SODIMM_160",
+ "SODIMM_162",
+ "SODIMM_158",
+ "SODIMM_164",
+ "",
+ "",
+ "SODIMM_156",
+ "SODIMM_75",
+ "SODIMM_154",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_152";
+};
+
+&gpio7 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_19",
+ "SODIMM_21",
+ "",
+ "SODIMM_137";
+};
+
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_ddc>;
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 06/14] ARM: dts: imx6dl-colibri: Disable add-on accessories
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex Colibri family is composed of SoM that can be plugged in
various carrier board, with carrier boards allowing multiple optional
add-on (e.g. display, camera, ...).
Keep all the SoM specific part into the module .dtsi, disabling
everything that is not self-contained on the board. The carrier board
dts can reuse/enable anything that is defined in the module dtsi.
Additional device tree overlays can be used for any accessories that
are plugged in the carrier board.
Disable parallel RGB:
The parallel RGB interface (lcd_display) and all related nodes can
be enabled in an overlay if used. Keep all nodes disabled in the
module-level device tree.
Rename display interface node to match imx6qdl-apalis
to make it easier to use overlays.
The pwm-backlight binding now requires the power-supply property,
add it.
Disable stmpe touchscreen:
The touchscreen can be enabled in an overlay if used.
Add labels to the stmpe sub nodes.
Disable hdmi interface:
HDMI can be enabled in an overlay if used.
Update SPDX-License spelling to latest convention.
Update Copyright year.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 59 +-------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 57 ++++++++++++++++++-
2 files changed, 56 insertions(+), 60 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 7da74e6f46d9..535b5c156229 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2014-2020 Toradex
+ * Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
@@ -58,53 +58,6 @@
wakeup-source;
};
};
-
- lcd_display: disp0 {
- compatible = "fsl,imx-parallel-display";
- #address-cells = <1>;
- #size-cells = <0>;
- interface-pix-fmt = "bgr666";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu1_lcdif>;
- status = "okay";
-
- port@0 {
- reg = <0>;
-
- lcd_display_in: endpoint {
- remote-endpoint = <&ipu1_di0_disp0>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lcd_display_out: endpoint {
- remote-endpoint = <&lcd_panel_in>;
- };
- };
- };
-
- panel: panel {
- /*
- * edt,et057090dhu: EDT 5.7" LCD TFT
- * edt,et070080dh6: EDT 7.0" LCD TFT
- */
- compatible = "edt,et057090dhu";
- backlight = <&backlight>;
-
- port {
- lcd_panel_in: endpoint {
- remote-endpoint = <&lcd_display_out>;
- };
- };
- };
-};
-
-&backlight {
- brightness-levels = <0 127 191 223 239 247 251 255>;
- default-brightness-level = <1>;
- status = "okay";
};
/* Colibri SSP */
@@ -122,10 +75,6 @@
};
};
-&hdmi {
- status = "okay";
-};
-
/*
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
@@ -178,10 +127,6 @@
};
};
-&ipu1_di0_disp0 {
- remote-endpoint = <&lcd_display_in>;
-};
-
&pwm1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index c92887f6af61..f6243762e918 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -13,13 +13,59 @@
backlight: backlight {
compatible = "pwm-backlight";
+ brightness-levels = <0 127 191 223 239 247 251 255>;
+ default-brightness-level = <1>;
+ enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_bl_on>;
+ power-supply = <®_module_3v3>;
pwms = <&pwm3 0 5000000>;
- enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
status = "disabled";
};
+ lcd_display: disp0 {
+ compatible = "fsl,imx-parallel-display";
+ interface-pix-fmt = "bgr666";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_lcdif>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lcd_display_in: endpoint {
+ remote-endpoint = <&ipu1_di0_disp0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lcd_display_out: endpoint {
+ remote-endpoint = <&lcd_panel_in>;
+ };
+ };
+ };
+
+ panel_dpi: panel-dpi {
+ /*
+ * edt,et057090dhu: EDT 5.7" LCD TFT
+ * edt,et070080dh6: EDT 7.0" LCD TFT
+ */
+ compatible = "edt,et057090dhu";
+ backlight = <&backlight>;
+ status = "disabled";
+
+ port {
+ lcd_panel_in: endpoint {
+ remote-endpoint = <&lcd_display_out>;
+ };
+ };
+ };
+
reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
regulator-name = "+V3.3";
@@ -476,7 +522,7 @@
/* ADC converstion time: 80 clocks */
st,sample-time = <4>;
- stmpe_touchscreen {
+ stmpe_ts: stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 8 sample average control */
st,ave-ctrl = <3>;
@@ -491,9 +537,10 @@
st,settling = <3>;
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
+ status = "disabled";
};
- stmpe_adc {
+ stmpe_adc: stmpe_adc {
compatible = "st,stmpe-adc";
/* forbid to use ADC channels 3-0 (touch) */
st,norequest-mask = <0x0F>;
@@ -514,6 +561,10 @@
status = "disabled";
};
+&ipu1_di0_disp0 {
+ remote-endpoint = <&lcd_display_in>;
+};
+
/* Colibri PWM<B> */
&pwm1 {
pinctrl-names = "default";
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 06/14] ARM: dts: imx6dl-colibri: Disable add-on accessories
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex Colibri family is composed of SoM that can be plugged in
various carrier board, with carrier boards allowing multiple optional
add-on (e.g. display, camera, ...).
Keep all the SoM specific part into the module .dtsi, disabling
everything that is not self-contained on the board. The carrier board
dts can reuse/enable anything that is defined in the module dtsi.
Additional device tree overlays can be used for any accessories that
are plugged in the carrier board.
Disable parallel RGB:
The parallel RGB interface (lcd_display) and all related nodes can
be enabled in an overlay if used. Keep all nodes disabled in the
module-level device tree.
Rename display interface node to match imx6qdl-apalis
to make it easier to use overlays.
The pwm-backlight binding now requires the power-supply property,
add it.
Disable stmpe touchscreen:
The touchscreen can be enabled in an overlay if used.
Add labels to the stmpe sub nodes.
Disable hdmi interface:
HDMI can be enabled in an overlay if used.
Update SPDX-License spelling to latest convention.
Update Copyright year.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 59 +-------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 57 ++++++++++++++++++-
2 files changed, 56 insertions(+), 60 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 7da74e6f46d9..535b5c156229 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
- * Copyright 2014-2020 Toradex
+ * Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
@@ -58,53 +58,6 @@
wakeup-source;
};
};
-
- lcd_display: disp0 {
- compatible = "fsl,imx-parallel-display";
- #address-cells = <1>;
- #size-cells = <0>;
- interface-pix-fmt = "bgr666";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ipu1_lcdif>;
- status = "okay";
-
- port@0 {
- reg = <0>;
-
- lcd_display_in: endpoint {
- remote-endpoint = <&ipu1_di0_disp0>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lcd_display_out: endpoint {
- remote-endpoint = <&lcd_panel_in>;
- };
- };
- };
-
- panel: panel {
- /*
- * edt,et057090dhu: EDT 5.7" LCD TFT
- * edt,et070080dh6: EDT 7.0" LCD TFT
- */
- compatible = "edt,et057090dhu";
- backlight = <&backlight>;
-
- port {
- lcd_panel_in: endpoint {
- remote-endpoint = <&lcd_display_out>;
- };
- };
- };
-};
-
-&backlight {
- brightness-levels = <0 127 191 223 239 247 251 255>;
- default-brightness-level = <1>;
- status = "okay";
};
/* Colibri SSP */
@@ -122,10 +75,6 @@
};
};
-&hdmi {
- status = "okay";
-};
-
/*
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
@@ -178,10 +127,6 @@
};
};
-&ipu1_di0_disp0 {
- remote-endpoint = <&lcd_display_in>;
-};
-
&pwm1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index c92887f6af61..f6243762e918 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -13,13 +13,59 @@
backlight: backlight {
compatible = "pwm-backlight";
+ brightness-levels = <0 127 191 223 239 247 251 255>;
+ default-brightness-level = <1>;
+ enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_bl_on>;
+ power-supply = <®_module_3v3>;
pwms = <&pwm3 0 5000000>;
- enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
status = "disabled";
};
+ lcd_display: disp0 {
+ compatible = "fsl,imx-parallel-display";
+ interface-pix-fmt = "bgr666";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_lcdif>;
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lcd_display_in: endpoint {
+ remote-endpoint = <&ipu1_di0_disp0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ lcd_display_out: endpoint {
+ remote-endpoint = <&lcd_panel_in>;
+ };
+ };
+ };
+
+ panel_dpi: panel-dpi {
+ /*
+ * edt,et057090dhu: EDT 5.7" LCD TFT
+ * edt,et070080dh6: EDT 7.0" LCD TFT
+ */
+ compatible = "edt,et057090dhu";
+ backlight = <&backlight>;
+ status = "disabled";
+
+ port {
+ lcd_panel_in: endpoint {
+ remote-endpoint = <&lcd_display_out>;
+ };
+ };
+ };
+
reg_module_3v3: regulator-module-3v3 {
compatible = "regulator-fixed";
regulator-name = "+V3.3";
@@ -476,7 +522,7 @@
/* ADC converstion time: 80 clocks */
st,sample-time = <4>;
- stmpe_touchscreen {
+ stmpe_ts: stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 8 sample average control */
st,ave-ctrl = <3>;
@@ -491,9 +537,10 @@
st,settling = <3>;
/* 5 ms touch detect interrupt delay */
st,touch-det-delay = <5>;
+ status = "disabled";
};
- stmpe_adc {
+ stmpe_adc: stmpe_adc {
compatible = "st,stmpe-adc";
/* forbid to use ADC channels 3-0 (touch) */
st,norequest-mask = <0x0F>;
@@ -514,6 +561,10 @@
status = "disabled";
};
+&ipu1_di0_disp0 {
+ remote-endpoint = <&lcd_display_in>;
+};
+
/* Colibri PWM<B> */
&pwm1 {
pinctrl-names = "default";
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 07/14] ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for
poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC
into a low power mode in poweroff.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index f6243762e918..da52a71bb6e7 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -138,6 +138,10 @@
status = "disabled";
};
+&clks {
+ fsl,pmic-stby-poweroff;
+};
+
/* Colibri SSP */
&ecspi4 {
cs-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
@@ -403,6 +407,7 @@
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
+ fsl,pmic-stby-poweroff;
reg = <0x08>;
regulators {
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 07/14] ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for
poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC
into a low power mode in poweroff.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index f6243762e918..da52a71bb6e7 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -138,6 +138,10 @@
status = "disabled";
};
+&clks {
+ fsl,pmic-stby-poweroff;
+};
+
/* Colibri SSP */
&ecspi4 {
cs-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
@@ -403,6 +407,7 @@
pmic: pfuze100@8 {
compatible = "fsl,pfuze100";
+ fsl,pmic-stby-poweroff;
reg = <0x08>;
regulators {
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 08/14] ARM: dts: imx6dl-colibri: Add additional pingroups
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex board Iris V2 has an LVDS transceiver which is
configured with 4 signals. Add corresponding pins into the
separate pingroup to be able to manage the transceiver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 52 ++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index da52a71bb6e7..3459bfb5c60b 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -700,6 +700,30 @@
>;
};
+ /* CSI pins used as GPIOs */
+ pinctrl_csi_gpio_1: csigpio1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0
+ MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x1b0b0
+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
+ MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_csi_gpio_2: csigpio2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0
+ >;
+ };
+
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
@@ -739,6 +763,25 @@
>;
};
+ pinctrl_gpio_1: gpio1grp {
+ fsl,pins = <
+ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+ pinctrl_gpio_2: gpio2grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+ >;
+ };
+
pinctrl_gpio_bl_on: gpioblon {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
@@ -832,6 +875,15 @@
>;
};
+ pinctrl_lvds_transceiver: lvdstxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x03030 /* SODIMM 95 */
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b030 /* SODIMM 55 */
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x03030 /* SODIMM 63 */
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x03030 /* SODIMM 99 */
+ >;
+ };
+
pinctrl_mic_gnd: gpiomicgnd {
fsl,pins = <
/* Controls Mic GND, PU or '1' pull Mic GND to GND */
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 08/14] ARM: dts: imx6dl-colibri: Add additional pingroups
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex board Iris V2 has an LVDS transceiver which is
configured with 4 signals. Add corresponding pins into the
separate pingroup to be able to manage the transceiver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 52 ++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index da52a71bb6e7..3459bfb5c60b 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -700,6 +700,30 @@
>;
};
+ /* CSI pins used as GPIOs */
+ pinctrl_csi_gpio_1: csigpio1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0
+ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0
+ MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x1b0b0
+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
+ MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_csi_gpio_2: csigpio2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0
+ >;
+ };
+
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
@@ -739,6 +763,25 @@
>;
};
+ pinctrl_gpio_1: gpio1grp {
+ fsl,pins = <
+ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0
+ MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+ pinctrl_gpio_2: gpio2grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
+ >;
+ };
+
pinctrl_gpio_bl_on: gpioblon {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
@@ -832,6 +875,15 @@
>;
};
+ pinctrl_lvds_transceiver: lvdstxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x03030 /* SODIMM 95 */
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b030 /* SODIMM 55 */
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x03030 /* SODIMM 63 */
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x03030 /* SODIMM 99 */
+ >;
+ };
+
pinctrl_mic_gnd: gpiomicgnd {
fsl,pins = <
/* Controls Mic GND, PU or '1' pull Mic GND to GND */
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 09/14] ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The following two nodes define module level functionality, move
them from the carrier board dts file to the SoM file.
While at it, reorder the properties in the gpio-keys node alphabetical.
- gpio-keys defining the wakeup pin
- memory node
The atmel touchscreen node can be used on any carrier board.
Move it from the carrier board to the module-level device tree and
keep it disabled.
Set the default pinmuxing to the dedicated connector available
on newer carrier boards and rename the pinctrl labels specifying
the INT/Reset signal to a common pattern.
pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector
pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 49 ------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 53 ++++++++++++++++++++
2 files changed, 53 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 535b5c156229..dff2d35e693b 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -17,12 +17,6 @@
compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
"fsl,imx6dl";
- /* Will be filled by the bootloader */
- memory@10000000 {
- device_type = "memory";
- reg = <0x10000000 0>;
- };
-
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
@@ -44,20 +38,6 @@
clock-frequency = <16000000>;
clock-output-names = "clk16m";
};
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
-
- wakeup {
- label = "Wake-Up";
- gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
};
/* Colibri SSP */
@@ -81,21 +61,6 @@
&i2c3 {
status = "okay";
- /*
- * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
- * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
- */
- touchscreen@4a {
- compatible = "atmel,maxtouch";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcap_1>;
- reg = <0x4a>;
- interrupt-parent = <&gpio1>;
- interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
- status = "disabled";
- };
-
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
@@ -111,20 +76,6 @@
&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
>;
-
- pinctrl_pcap_1: pcap1grp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */
- MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */
- >;
- };
-
- pinctrl_mxt_ts: mxttsgrp {
- fsl,pins = <
- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */
- MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */
- >;
- };
};
&pwm1 {
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 3459bfb5c60b..1c49fd3e6286 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -23,6 +23,20 @@
status = "disabled";
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ wakeup {
+ debounce-interval = <10>;
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
+ label = "Wake-Up";
+ linux,code = <KEY_WAKEUP>;
+ wakeup-source;
+ };
+ };
+
lcd_display: disp0 {
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "bgr666";
@@ -50,6 +64,12 @@
};
};
+ /* Will be filled by the bootloader */
+ memory@10000000 {
+ device_type = "memory";
+ reg = <0x10000000 0>;
+ };
+
panel_dpi: panel-dpi {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
@@ -564,6 +584,17 @@
scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
+
+ atmel_mxt_ts: touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ interrupt-parent = <&gpio2>;
+ interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_atmel_conn>;
+ reg = <0x4a>;
+ reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
+ status = "disabled";
+ };
};
&ipu1_di0_disp0 {
@@ -682,6 +713,28 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh_oc_1>;
+ /* Atmel MXT touchsceen + Capacitive Touch Adapter */
+ /* NOTE: This pin group conflicts with pin groups
+ * pinctrl_pwm1/pinctrl_pwm4. Don't use them simultaneously.
+ */
+ pinctrl_atmel_adap: atmeladaptergrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb0b1 /* SODIMM 28 */
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0xb0b1 /* SODIMM 30 */
+ >;
+ };
+
+ /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
+ /* NOTE: This pin group conflicts with pin groups pinctrl_weim_cs1 and
+ * pinctrl_weim_cs2. Don't use them simultaneously.
+ */
+ pinctrl_atmel_conn: atmelconnectorgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0xb0b1 /* SODIMM_107 */
+ MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0xb0b1 /* SODIMM_106 */
+ >;
+ };
+
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 09/14] ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The following two nodes define module level functionality, move
them from the carrier board dts file to the SoM file.
While at it, reorder the properties in the gpio-keys node alphabetical.
- gpio-keys defining the wakeup pin
- memory node
The atmel touchscreen node can be used on any carrier board.
Move it from the carrier board to the module-level device tree and
keep it disabled.
Set the default pinmuxing to the dedicated connector available
on newer carrier boards and rename the pinctrl labels specifying
the INT/Reset signal to a common pattern.
pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector
pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 49 ------------------
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 53 ++++++++++++++++++++
2 files changed, 53 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 535b5c156229..dff2d35e693b 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -17,12 +17,6 @@
compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
"fsl,imx6dl";
- /* Will be filled by the bootloader */
- memory@10000000 {
- device_type = "memory";
- reg = <0x10000000 0>;
- };
-
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
@@ -44,20 +38,6 @@
clock-frequency = <16000000>;
clock-output-names = "clk16m";
};
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
-
- wakeup {
- label = "Wake-Up";
- gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
- linux,code = <KEY_WAKEUP>;
- debounce-interval = <10>;
- wakeup-source;
- };
- };
};
/* Colibri SSP */
@@ -81,21 +61,6 @@
&i2c3 {
status = "okay";
- /*
- * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>,
- * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms
- */
- touchscreen@4a {
- compatible = "atmel,maxtouch";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcap_1>;
- reg = <0x4a>;
- interrupt-parent = <&gpio1>;
- interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */
- status = "disabled";
- };
-
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
@@ -111,20 +76,6 @@
&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
>;
-
- pinctrl_pcap_1: pcap1grp {
- fsl,pins = <
- MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */
- MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */
- >;
- };
-
- pinctrl_mxt_ts: mxttsgrp {
- fsl,pins = <
- MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */
- MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */
- >;
- };
};
&pwm1 {
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 3459bfb5c60b..1c49fd3e6286 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -23,6 +23,20 @@
status = "disabled";
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ wakeup {
+ debounce-interval = <10>;
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */
+ label = "Wake-Up";
+ linux,code = <KEY_WAKEUP>;
+ wakeup-source;
+ };
+ };
+
lcd_display: disp0 {
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "bgr666";
@@ -50,6 +64,12 @@
};
};
+ /* Will be filled by the bootloader */
+ memory@10000000 {
+ device_type = "memory";
+ reg = <0x10000000 0>;
+ };
+
panel_dpi: panel-dpi {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
@@ -564,6 +584,17 @@
scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled";
+
+ atmel_mxt_ts: touchscreen@4a {
+ compatible = "atmel,maxtouch";
+ interrupt-parent = <&gpio2>;
+ interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_atmel_conn>;
+ reg = <0x4a>;
+ reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
+ status = "disabled";
+ };
};
&ipu1_di0_disp0 {
@@ -682,6 +713,28 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh_oc_1>;
+ /* Atmel MXT touchsceen + Capacitive Touch Adapter */
+ /* NOTE: This pin group conflicts with pin groups
+ * pinctrl_pwm1/pinctrl_pwm4. Don't use them simultaneously.
+ */
+ pinctrl_atmel_adap: atmeladaptergrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb0b1 /* SODIMM 28 */
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0xb0b1 /* SODIMM 30 */
+ >;
+ };
+
+ /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */
+ /* NOTE: This pin group conflicts with pin groups pinctrl_weim_cs1 and
+ * pinctrl_weim_cs2. Don't use them simultaneously.
+ */
+ pinctrl_atmel_conn: atmelconnectorgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0xb0b1 /* SODIMM_107 */
+ MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0xb0b1 /* SODIMM_106 */
+ >;
+ };
+
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
--
2.20.1
_______________________________________________
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^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 10/14] ARM: dts: imx6dl-colibri: Cleanup
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
- Sort pinctrl nodes alphabetically
- End all pinctrl node names in grp and avoid using dashes
- Change pinctrl_usbc_id_1's node name to not use underscores
- Change the pmic's node name to pmic@8 per binding requirement
- Add sound-dai-cells to the codec node per binding requirement
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 340 ++++++++++---------
2 files changed, 172 insertions(+), 170 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index dff2d35e693b..7272edd85a49 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -46,10 +46,10 @@
mcp251x0: mcp251x@0 {
compatible = "microchip,mcp2515";
- reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio3>;
interrupts = <27 0x2>;
+ reg = <0>;
spi-max-frequency = <10000000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 1c49fd3e6286..1c3c34bbfe98 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -104,36 +104,36 @@
reg_usb_host_vbus: regulator-usb-host-vbus {
compatible = "regulator-fixed";
+ gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
- regulator-name = "usb_host_vbus";
- regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb_host_vbus";
status = "disabled";
};
sound {
compatible = "fsl,imx-audio-sgtl5000";
- model = "imx6dl-colibri-sgtl5000";
- ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HP_OUT",
"LINE_IN", "Line In Jack",
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias";
+ model = "imx6dl-colibri-sgtl5000";
mux-int-port = <1>;
mux-ext-port = <5>;
+ ssi-controller = <&ssi1>;
};
/* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */
sound_spdif: sound-spdif {
compatible = "fsl,imx-audio-spdif";
- model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-in;
spdif-out;
+ model = "imx-spdif";
status = "disabled";
};
};
@@ -171,10 +171,10 @@
};
&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-handle = <ðphy>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
status = "okay";
mdio {
@@ -425,61 +425,61 @@
sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
- pmic: pfuze100@8 {
+ pmic: pmic@8 {
compatible = "fsl,pfuze100";
fsl,pmic-stby-poweroff;
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1875000>;
+ regulator-min-microvolt = <300000>;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1875000>;
+ regulator-min-microvolt = <300000>;
regulator-ramp-delay = <6250>;
};
sw3a_reg: sw3a {
- regulator-min-microvolt = <400000>;
- regulator-max-microvolt = <1975000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1975000>;
+ regulator-min-microvolt = <400000>;
};
swbst_reg: swbst {
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5150000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5150000>;
+ regulator-min-microvolt = <5000000>;
};
snvs_reg: vsnvs {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <3000000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <1000000>;
};
vref_reg: vrefddr {
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
};
/* vgen1: unused */
vgen2_reg: vgen2 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1550000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1550000>;
+ regulator-min-microvolt = <800000>;
};
/*
@@ -487,57 +487,58 @@
* the i.MX 6 NVCC_SD1.
*/
vgen3_reg: vgen3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
vgen4_reg: vgen4 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
};
vgen5_reg: vgen5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
vgen6_reg: vgen6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
};
};
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
- reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
+ lrclk-strength = <3>;
+ reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDIO-supply = <®_module_3v3>;
VDDD-supply = <&vgen4_reg>;
- lrclk-strength = <3>;
};
/* STMPE811 touch screen controller */
stmpe811@41 {
compatible = "st,stmpe811";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_touch_int>;
- reg = <0x41>;
+ blocks = <0x5>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio6>;
interrupt-controller;
id = <0>;
- blocks = <0x5>;
irq-trigger = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_touch_int>;
+ reg = <0x41>;
/* 3.25 MHz ADC clock speed */
st,adc-freq = <1>;
/* 12-bit ADC */
@@ -643,27 +644,27 @@
/* Colibri UART_A */
&uart1 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
- fsl,dte-mode;
uart-has-rtscts;
status = "disabled";
};
/* Colibri UART_B */
&uart2 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_dte>;
- fsl,dte-mode;
uart-has-rtscts;
status = "disabled";
};
/* Colibri UART_C */
&uart3 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_dte>;
- fsl,dte-mode;
status = "disabled";
};
@@ -675,27 +676,27 @@
/* Colibri MMC */
&usdhc1 {
+ cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
+ bus-width = <4>;
+ no-1-8-v;
+ disable-wp;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
- cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
- disable-wp;
vmmc-supply = <®_module_3v3>;
vqmmc-supply = <&vgen3_reg>;
- bus-width = <4>;
- no-1-8-v;
status = "disabled";
};
/* eMMC */
&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- vqmmc-supply = <®_module_3v3>;
bus-width = <8>;
no-1-8-v;
non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ vqmmc-supply = <®_module_3v3>;
status = "okay";
};
@@ -737,12 +738,12 @@
pinctrl_audmux: audmuxgrp {
fsl,pins = <
+ /* SGTL5000 sys_mclk */
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0
- /* SGTL5000 sys_mclk */
- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
>;
};
@@ -779,26 +780,26 @@
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
+ /* SPI CS */
+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
- /* SPI CS */
- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
- MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
- MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
- MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
>;
};
@@ -835,13 +836,13 @@
>;
};
- pinctrl_gpio_bl_on: gpioblon {
+ pinctrl_gpio_bl_on: gpioblongrp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
>;
};
- pinctrl_gpio_keys: gpiokeys {
+ pinctrl_gpio_keys: gpiokeysgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
>;
@@ -856,15 +857,15 @@
pinctrl_i2c2: i2c2grp {
fsl,pins = <
- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
+ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
>;
};
@@ -896,8 +897,8 @@
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1
/* Disable PWM pins on camera interface */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40
+ MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
>;
};
@@ -937,14 +938,14 @@
>;
};
- pinctrl_mic_gnd: gpiomicgnd {
+ pinctrl_mic_gnd: micgndgrp {
fsl,pins = <
/* Controls Mic GND, PU or '1' pull Mic GND to GND */
MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0
>;
};
- pinctrl_mmc_cd: gpiommccd {
+ pinctrl_mmc_cd: mmccdgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1
>;
@@ -958,15 +959,15 @@
pinctrl_pwm2: pwm2grp {
fsl,pins = <
- MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040
+ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
- MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040
+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
>;
};
@@ -983,13 +984,6 @@
>;
};
- pinctrl_usbh_oc_1: usbhoc1grp {
- fsl,pins = <
- /* USBH_OC */
- MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
- >;
- };
-
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
@@ -1032,9 +1026,9 @@
pinctrl_uart2_dte: uart2dtegrp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
- MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
- MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
>;
};
@@ -1049,20 +1043,27 @@
fsl,pins = <
/* USBC_DET */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
- /* USBC_DET_EN */
- MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
/* USBC_DET_OVERWRITE */
MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058
+ /* USBC_DET_EN */
+ MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
>;
};
- pinctrl_usbc_id_1: usbc_id-1 {
+ pinctrl_usbc_id_1: usbcid1grp {
fsl,pins = <
/* USBC_ID */
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
+ pinctrl_usbh_oc_1: usbhoc1grp {
+ fsl,pins = <
+ /* USBH_OC */
+ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
@@ -1074,7 +1075,7 @@
>;
};
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
@@ -1085,7 +1086,7 @@
>;
};
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
@@ -1134,135 +1135,136 @@
>;
};
- pinctrl_weim_sram: weimsramgrp {
- fsl,pins = <
- MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
- MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
- /* Data */
- MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
- MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
- MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
- MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
- MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
- MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
- MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
- MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
- MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
- MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
- MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
- MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
- MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
- MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
- MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
- MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
- /* Address */
- MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
- MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
- MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
- MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
- MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
- MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
- MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
- MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
- MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
- MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
- MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
- MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
- MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
- MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
- MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
- MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
- >;
- };
-
- pinctrl_weim_rdnwr: weimrdnwr {
- fsl,pins = <
- MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
- MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
- >;
- };
-
- pinctrl_weim_npwe: weimnpwe {
- fsl,pins = <
- MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
- MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
- >;
- };
-
/* ADDRESS[16:18] [25] used as GPIO */
- pinctrl_weim_gpio_1: weimgpio-1 {
+ pinctrl_weim_gpio_1: weimgpio1grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
>;
};
/* ADDRESS[19:24] used as GPIO */
- pinctrl_weim_gpio_2: weimgpio-2 {
+ pinctrl_weim_gpio_2: weimgpio2grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
- MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
- MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
- MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
- MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
- MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
>;
};
/* DATA[16:31] used as GPIO */
- pinctrl_weim_gpio_3: weimgpio-3 {
+ pinctrl_weim_gpio_3: weimgpio3grp {
fsl,pins = <
+ MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
- MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
- MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
- MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
- MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
- MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
- MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
- MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+ MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
+ MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
>;
};
/* DQM[0:3] used as GPIO */
- pinctrl_weim_gpio_4: weimgpio-4 {
+ pinctrl_weim_gpio_4: weimgpio4grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0
- MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
+ MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
>;
};
/* RDY used as GPIO */
- pinctrl_weim_gpio_5: weimgpio-5 {
+ pinctrl_weim_gpio_5: weimgpio5grp {
fsl,pins = <
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0
>;
};
/* ADDRESS[16] DATA[30] used as GPIO */
- pinctrl_weim_gpio_6: weimgpio-6 {
+ pinctrl_weim_gpio_6: weimgpio6grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_weim_npwe: weimnpwegrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
+ >;
+ };
+
+ pinctrl_weim_sram: weimsramgrp {
+ fsl,pins = <
+ /* Data */
+ MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
+ MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
+ MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
+ /* Address */
+ MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
+ MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
+ MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
+ MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
+ MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
+ MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
+ MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
+ MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
+ MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
+ MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
+ MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
+ MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
+ MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
+ MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
+ MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
+ MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
+ /* Ctrl */
+ MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
+ MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
+ >;
+ };
+
+ pinctrl_weim_rdnwr: weimrdnwrgrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
+ MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
>;
};
};
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 10/14] ARM: dts: imx6dl-colibri: Cleanup
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
- Sort pinctrl nodes alphabetically
- End all pinctrl node names in grp and avoid using dashes
- Change pinctrl_usbc_id_1's node name to not use underscores
- Change the pmic's node name to pmic@8 per binding requirement
- Add sound-dai-cells to the codec node per binding requirement
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 2 +-
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 340 ++++++++++---------
2 files changed, 172 insertions(+), 170 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index dff2d35e693b..7272edd85a49 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -46,10 +46,10 @@
mcp251x0: mcp251x@0 {
compatible = "microchip,mcp2515";
- reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio3>;
interrupts = <27 0x2>;
+ reg = <0>;
spi-max-frequency = <10000000>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 1c49fd3e6286..1c3c34bbfe98 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -104,36 +104,36 @@
reg_usb_host_vbus: regulator-usb-host-vbus {
compatible = "regulator-fixed";
+ gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
- regulator-name = "usb_host_vbus";
- regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb_host_vbus";
status = "disabled";
};
sound {
compatible = "fsl,imx-audio-sgtl5000";
- model = "imx6dl-colibri-sgtl5000";
- ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HP_OUT",
"LINE_IN", "Line In Jack",
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias";
+ model = "imx6dl-colibri-sgtl5000";
mux-int-port = <1>;
mux-ext-port = <5>;
+ ssi-controller = <&ssi1>;
};
/* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */
sound_spdif: sound-spdif {
compatible = "fsl,imx-audio-spdif";
- model = "imx-spdif";
spdif-controller = <&spdif>;
spdif-in;
spdif-out;
+ model = "imx-spdif";
status = "disabled";
};
};
@@ -171,10 +171,10 @@
};
&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-handle = <ðphy>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
status = "okay";
mdio {
@@ -425,61 +425,61 @@
sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
- pmic: pfuze100@8 {
+ pmic: pmic@8 {
compatible = "fsl,pfuze100";
fsl,pmic-stby-poweroff;
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1875000>;
+ regulator-min-microvolt = <300000>;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
- regulator-min-microvolt = <300000>;
- regulator-max-microvolt = <1875000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1875000>;
+ regulator-min-microvolt = <300000>;
regulator-ramp-delay = <6250>;
};
sw3a_reg: sw3a {
- regulator-min-microvolt = <400000>;
- regulator-max-microvolt = <1975000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1975000>;
+ regulator-min-microvolt = <400000>;
};
swbst_reg: swbst {
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5150000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5150000>;
+ regulator-min-microvolt = <5000000>;
};
snvs_reg: vsnvs {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <3000000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <1000000>;
};
vref_reg: vrefddr {
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
};
/* vgen1: unused */
vgen2_reg: vgen2 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1550000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1550000>;
+ regulator-min-microvolt = <800000>;
};
/*
@@ -487,57 +487,58 @@
* the i.MX 6 NVCC_SD1.
*/
vgen3_reg: vgen3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
vgen4_reg: vgen4 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
};
vgen5_reg: vgen5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
vgen6_reg: vgen6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
};
};
};
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
- reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
+ lrclk-strength = <3>;
+ reg = <0x0a>;
+ #sound-dai-cells = <0>;
VDDA-supply = <®_module_3v3_audio>;
VDDIO-supply = <®_module_3v3>;
VDDD-supply = <&vgen4_reg>;
- lrclk-strength = <3>;
};
/* STMPE811 touch screen controller */
stmpe811@41 {
compatible = "st,stmpe811";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_touch_int>;
- reg = <0x41>;
+ blocks = <0x5>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio6>;
interrupt-controller;
id = <0>;
- blocks = <0x5>;
irq-trigger = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_touch_int>;
+ reg = <0x41>;
/* 3.25 MHz ADC clock speed */
st,adc-freq = <1>;
/* 12-bit ADC */
@@ -643,27 +644,27 @@
/* Colibri UART_A */
&uart1 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
- fsl,dte-mode;
uart-has-rtscts;
status = "disabled";
};
/* Colibri UART_B */
&uart2 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_dte>;
- fsl,dte-mode;
uart-has-rtscts;
status = "disabled";
};
/* Colibri UART_C */
&uart3 {
+ fsl,dte-mode;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_dte>;
- fsl,dte-mode;
status = "disabled";
};
@@ -675,27 +676,27 @@
/* Colibri MMC */
&usdhc1 {
+ cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
+ bus-width = <4>;
+ no-1-8-v;
+ disable-wp;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
- cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
- disable-wp;
vmmc-supply = <®_module_3v3>;
vqmmc-supply = <&vgen3_reg>;
- bus-width = <4>;
- no-1-8-v;
status = "disabled";
};
/* eMMC */
&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- vqmmc-supply = <®_module_3v3>;
bus-width = <8>;
no-1-8-v;
non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ vqmmc-supply = <®_module_3v3>;
status = "okay";
};
@@ -737,12 +738,12 @@
pinctrl_audmux: audmuxgrp {
fsl,pins = <
+ /* SGTL5000 sys_mclk */
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0
- /* SGTL5000 sys_mclk */
- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
>;
};
@@ -779,26 +780,26 @@
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
+ /* SPI CS */
+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
- /* SPI CS */
- MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
+ MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+ MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
- MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
- MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
- MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
>;
};
@@ -835,13 +836,13 @@
>;
};
- pinctrl_gpio_bl_on: gpioblon {
+ pinctrl_gpio_bl_on: gpioblongrp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
>;
};
- pinctrl_gpio_keys: gpiokeys {
+ pinctrl_gpio_keys: gpiokeysgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
>;
@@ -856,15 +857,15 @@
pinctrl_i2c2: i2c2grp {
fsl,pins = <
- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
+ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
- MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
+ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
>;
};
@@ -896,8 +897,8 @@
MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1
MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1
/* Disable PWM pins on camera interface */
- MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40
+ MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40
>;
};
@@ -937,14 +938,14 @@
>;
};
- pinctrl_mic_gnd: gpiomicgnd {
+ pinctrl_mic_gnd: micgndgrp {
fsl,pins = <
/* Controls Mic GND, PU or '1' pull Mic GND to GND */
MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0
>;
};
- pinctrl_mmc_cd: gpiommccd {
+ pinctrl_mmc_cd: mmccdgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1
>;
@@ -958,15 +959,15 @@
pinctrl_pwm2: pwm2grp {
fsl,pins = <
- MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040
+ MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
- MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040
+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
>;
};
@@ -983,13 +984,6 @@
>;
};
- pinctrl_usbh_oc_1: usbhoc1grp {
- fsl,pins = <
- /* USBH_OC */
- MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
- >;
- };
-
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
@@ -1032,9 +1026,9 @@
pinctrl_uart2_dte: uart2dtegrp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
- MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
- MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
>;
};
@@ -1049,20 +1043,27 @@
fsl,pins = <
/* USBC_DET */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
- /* USBC_DET_EN */
- MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
/* USBC_DET_OVERWRITE */
MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058
+ /* USBC_DET_EN */
+ MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058
>;
};
- pinctrl_usbc_id_1: usbc_id-1 {
+ pinctrl_usbc_id_1: usbcid1grp {
fsl,pins = <
/* USBC_ID */
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
+ pinctrl_usbh_oc_1: usbhoc1grp {
+ fsl,pins = <
+ /* USBH_OC */
+ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
@@ -1074,7 +1075,7 @@
>;
};
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1
@@ -1085,7 +1086,7 @@
>;
};
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1
@@ -1134,135 +1135,136 @@
>;
};
- pinctrl_weim_sram: weimsramgrp {
- fsl,pins = <
- MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
- MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
- /* Data */
- MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
- MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
- MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
- MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
- MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
- MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
- MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
- MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
- MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
- MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
- MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
- MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
- MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
- MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
- MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
- MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
- /* Address */
- MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
- MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
- MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
- MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
- MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
- MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
- MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
- MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
- MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
- MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
- MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
- MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
- MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
- MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
- MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
- MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
- >;
- };
-
- pinctrl_weim_rdnwr: weimrdnwr {
- fsl,pins = <
- MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
- MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
- >;
- };
-
- pinctrl_weim_npwe: weimnpwe {
- fsl,pins = <
- MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
- MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
- >;
- };
-
/* ADDRESS[16:18] [25] used as GPIO */
- pinctrl_weim_gpio_1: weimgpio-1 {
+ pinctrl_weim_gpio_1: weimgpio1grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
>;
};
/* ADDRESS[19:24] used as GPIO */
- pinctrl_weim_gpio_2: weimgpio-2 {
+ pinctrl_weim_gpio_2: weimgpio2grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
- MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
- MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
- MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
- MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
- MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
- MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0
+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
>;
};
/* DATA[16:31] used as GPIO */
- pinctrl_weim_gpio_3: weimgpio-3 {
+ pinctrl_weim_gpio_3: weimgpio3grp {
fsl,pins = <
+ MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
- MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
- MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
- MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
- MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
+ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
- MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
- MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
- MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0
- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
- MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
+ MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0
+ MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0
>;
};
/* DQM[0:3] used as GPIO */
- pinctrl_weim_gpio_4: weimgpio-4 {
+ pinctrl_weim_gpio_4: weimgpio4grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0
- MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
+ MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
>;
};
/* RDY used as GPIO */
- pinctrl_weim_gpio_5: weimgpio-5 {
+ pinctrl_weim_gpio_5: weimgpio5grp {
fsl,pins = <
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0
>;
};
/* ADDRESS[16] DATA[30] used as GPIO */
- pinctrl_weim_gpio_6: weimgpio-6 {
+ pinctrl_weim_gpio_6: weimgpio6grp {
fsl,pins = <
- MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_weim_npwe: weimnpwegrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0
+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040
+ >;
+ };
+
+ pinctrl_weim_sram: weimsramgrp {
+ fsl,pins = <
+ /* Data */
+ MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
+ MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
+ MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
+ MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
+ /* Address */
+ MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
+ MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
+ MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
+ MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
+ MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
+ MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
+ MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
+ MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
+ MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
+ MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
+ MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
+ MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
+ MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
+ MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
+ MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
+ MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
+ /* Ctrl */
+ MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
+ MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
+ >;
+ };
+
+ pinctrl_weim_rdnwr: weimrdnwrgrp {
+ fsl,pins = <
+ MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0
+ MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040
>;
};
};
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 11/14] ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex board Iris V2 has a SD-card slot with switchable
power.
Add a pinctrl sleep used when the card power is off to avoid
backfeeding to the card and add the "sleep" pinctrl to the
usdhc1 controller.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 1c3c34bbfe98..c383e0e4110c 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -680,10 +680,11 @@
bus-width = <4>;
no-1-8-v;
disable-wp;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
+ pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_mmc_cd_sleep>;
vmmc-supply = <®_module_3v3>;
vqmmc-supply = <&vgen3_reg>;
status = "disabled";
@@ -951,6 +952,12 @@
>;
};
+ pinctrl_mmc_cd_sleep: mmccdslpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0
+ >;
+ };
+
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
@@ -1097,6 +1104,18 @@
>;
};
+ /* avoid backfeeding with removed card power */
+ pinctrl_usdhc1_sleep: usdhc1sleepgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 11/14] ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Fabio Estevam, NXP Linux Team, Pengutronix Kernel Team,
Rob Herring, Sascha Hauer, Shawn Guo, devicetree,
linux-arm-kernel, linux-kernel
The Toradex board Iris V2 has a SD-card slot with switchable
power.
Add a pinctrl sleep used when the card power is off to avoid
backfeeding to the card and add the "sleep" pinctrl to the
usdhc1 controller.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 1c3c34bbfe98..c383e0e4110c 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -680,10 +680,11 @@
bus-width = <4>;
no-1-8-v;
disable-wp;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>;
+ pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_mmc_cd_sleep>;
vmmc-supply = <®_module_3v3>;
vqmmc-supply = <&vgen3_reg>;
status = "disabled";
@@ -951,6 +952,12 @@
>;
};
+ pinctrl_mmc_cd_sleep: mmccdslpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0
+ >;
+ };
+
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
@@ -1097,6 +1104,18 @@
>;
};
+ /* avoid backfeeding with removed card power */
+ pinctrl_usdhc1_sleep: usdhc1sleepgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 12/14] ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm
Computer Module family Carrier Board.
Additional details available at
https://www.toradex.com/products/carrier-board/iris-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++++++
arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 +++++++++++++++++++
3 files changed, 200 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ee27bafa69be..b636bae2b281 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -453,6 +453,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-eval-v3.dtb \
+ imx6dl-colibri-iris.dtb \
+ imx6dl-colibri-iris-v2.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
new file mode 100644
index 000000000000..3a6d3889760d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx6dl-colibri-iris.dts"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board";
+ compatible = "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ reg_3v3_vmmc: regulator-3v3-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
+ regulator-name = "3v3_vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <100>;
+ enable-active-high;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
+
+ pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ cap-power-off-card;
+ /* uncomment the following to enable SD card UHS mode if you have a V1.1 module */
+ /* /delete-property/ no-1-8-v; */
+ vmmc-supply = <®_3v3_vmmc>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
new file mode 100644
index 000000000000..cf77d894f6d7
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Iris Board";
+ compatible = "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ aliases {
+ i2c0 = &i2c2;
+ i2c1 = &i2c3;
+ };
+
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = &snvs_rtc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* Colibri SSP */
+&ecspi4 {
+ status = "okay";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>;
+
+ /*
+ * uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one
+ * wants to turn the transceiver off, that property has to be deleted
+ * and the gpio handled in userspace.
+ * The same applies to uart-b-c-on-x14-enable where the UART_B and
+ * UART_C transceiver is turned on.
+ */
+ uart-a-on-x13-enable-hog {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
+ output-high;
+ };
+
+ uart-b-c-on-x14-enable-hog {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
+ output-high;
+ };
+};
+
+/*
+ * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
+ */
+&i2c3 {
+ status = "okay";
+
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pinctrl_gpio_iris
+ &pinctrl_usbh_oc_1
+ &pinctrl_usbc_id_1
+ >;
+
+ pinctrl_gpio_iris: gpioirisgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart1_forceoff: uart1forceoffgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart23_forceoff: uart23forceoffgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ >;
+ };
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+®_usb_host_vbus {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_host_vbus>;
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ status = "okay";
+};
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 12/14] ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm
Computer Module family Carrier Board.
Additional details available at
https://www.toradex.com/products/carrier-board/iris-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++++++
arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 +++++++++++++++++++
3 files changed, 200 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ee27bafa69be..b636bae2b281 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -453,6 +453,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-eval-v3.dtb \
+ imx6dl-colibri-iris.dtb \
+ imx6dl-colibri-iris-v2.dtb \
imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
new file mode 100644
index 000000000000..3a6d3889760d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include "imx6dl-colibri-iris.dts"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board";
+ compatible = "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ reg_3v3_vmmc: regulator-3v3-vmmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
+ regulator-name = "3v3_vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <100>;
+ enable-active-high;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
+
+ pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ cap-power-off-card;
+ /* uncomment the following to enable SD card UHS mode if you have a V1.1 module */
+ /* /delete-property/ no-1-8-v; */
+ vmmc-supply = <®_3v3_vmmc>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
new file mode 100644
index 000000000000..cf77d894f6d7
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Iris Board";
+ compatible = "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ aliases {
+ i2c0 = &i2c2;
+ i2c1 = &i2c3;
+ };
+
+ aliases {
+ rtc0 = &rtc_i2c;
+ rtc1 = &snvs_rtc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* Colibri SSP */
+&ecspi4 {
+ status = "okay";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>;
+
+ /*
+ * uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one
+ * wants to turn the transceiver off, that property has to be deleted
+ * and the gpio handled in userspace.
+ * The same applies to uart-b-c-on-x14-enable where the UART_B and
+ * UART_C transceiver is turned on.
+ */
+ uart-a-on-x13-enable-hog {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
+ output-high;
+ };
+
+ uart-b-c-on-x14-enable-hog {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
+ output-high;
+ };
+};
+
+/*
+ * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
+ */
+&i2c3 {
+ status = "okay";
+
+ rtc_i2c: rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pinctrl_gpio_iris
+ &pinctrl_usbh_oc_1
+ &pinctrl_usbc_id_1
+ >;
+
+ pinctrl_gpio_iris: gpioirisgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
+ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0
+ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0
+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart1_forceoff: uart1forceoffgrp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+ >;
+ };
+
+ pinctrl_uart23_forceoff: uart23forceoffgrp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ >;
+ };
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+®_usb_host_vbus {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_host_vbus>;
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ status = "okay";
+};
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 13/14] ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Add support for Toradex Aster, small form-factor with header compatible
with Arduino Uno and Raspberry Pi (RPi) maker boards.
Additional detail available at
https://www.toradex.com/products/carrier-boards/aster-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++++++++++++++++++++
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b636bae2b281..4802c8b0ee1a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -452,6 +452,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos_7.dtb \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
+ imx6dl-colibri-aster.dtb \
imx6dl-colibri-eval-v3.dtb \
imx6dl-colibri-iris.dtb \
imx6dl-colibri-iris-v2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts/imx6dl-colibri-aster.dts
new file mode 100644
index 000000000000..74e8a6cd8bed
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Aster Board";
+ compatible = "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ aliases {
+ i2c0 = &i2c2;
+ i2c1 = &i2c3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* Colibri SSP */
+&ecspi4 {
+ cs-gpios = <
+ &gpio5 2 GPIO_ACTIVE_HIGH
+ &gpio5 4 GPIO_ACTIVE_HIGH
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>;
+ status = "okay";
+};
+
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
+&i2c3 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pinctrl_csi_gpio_1
+ &pinctrl_gpio_2
+ &pinctrl_gpio_aster
+ &pinctrl_usbh_oc_1
+ &pinctrl_usbc_id_1
+ &pinctrl_weim_gpio_5
+ >;
+
+ pinctrl_gpio_aster: gpioaster {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+®_usb_host_vbus {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_host_vbus>;
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ status = "okay";
+};
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 13/14] ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Arnd Bergmann, Fabio Estevam, NXP Linux Team, Olof Johansson,
Pengutronix Kernel Team, Rob Herring, Sascha Hauer, Shawn Guo,
devicetree, linux-arm-kernel, linux-kernel, soc
Add support for Toradex Aster, small form-factor with header compatible
with Arduino Uno and Raspberry Pi (RPi) maker boards.
Additional detail available at
https://www.toradex.com/products/carrier-boards/aster-carrier-board
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++++++++++++++++++++
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b636bae2b281..4802c8b0ee1a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -452,6 +452,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos_7.dtb \
imx6dl-aristainetos2_4.dtb \
imx6dl-aristainetos2_7.dtb \
+ imx6dl-colibri-aster.dtb \
imx6dl-colibri-eval-v3.dtb \
imx6dl-colibri-iris.dtb \
imx6dl-colibri-iris-v2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts/imx6dl-colibri-aster.dts
new file mode 100644
index 000000000000..74e8a6cd8bed
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2022 Toradex
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX6DL/S on Colibri Aster Board";
+ compatible = "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl",
+ "fsl,imx6dl";
+
+ aliases {
+ i2c0 = &i2c2;
+ i2c1 = &i2c3;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/* Colibri SSP */
+&ecspi4 {
+ cs-gpios = <
+ &gpio5 2 GPIO_ACTIVE_HIGH
+ &gpio5 4 GPIO_ACTIVE_HIGH
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>;
+ status = "okay";
+};
+
+/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
+&i2c3 {
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pinctrl_csi_gpio_1
+ &pinctrl_gpio_2
+ &pinctrl_gpio_aster
+ &pinctrl_usbh_oc_1
+ &pinctrl_usbc_id_1
+ &pinctrl_weim_gpio_5
+ >;
+
+ pinctrl_gpio_aster: gpioaster {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
+ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
+ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
+ MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
+ >;
+ };
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&pwm3 {
+ status = "okay";
+};
+
+&pwm4 {
+ status = "okay";
+};
+
+®_usb_host_vbus {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&usbh1 {
+ vbus-supply = <®_usb_host_vbus>;
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+};
+
+/* Colibri MMC */
+&usdhc1 {
+ status = "okay";
+};
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 14/14] ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD
2022-03-14 16:29 ` Max Krummenacher
@ 2022-03-14 16:29 ` Max Krummenacher
-1 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alistair Francis, Douglas Anderson, Fabio Estevam,
Johann Neuhauser, Marcel Ziswiler, NXP Linux Team,
Pascal Zimmermann, Pengutronix Kernel Team, Russell King,
Sascha Hauer, Shawn Guo, linux-arm-kernel, linux-kernel
The SoM Apalis/Colibri iMX6 use the ADC of a STMPE 811. Enable
its driver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index f7498df08dfe..88a3602c4e58 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -402,6 +402,7 @@ CONFIG_IIO=y
CONFIG_MMA8452=y
CONFIG_IMX7D_ADC=y
CONFIG_RN5T618_ADC=y
+CONFIG_STMPE_ADC=y
CONFIG_VF610_ADC=y
CONFIG_SENSORS_ISL29018=y
CONFIG_MAG3110=y
--
2.20.1
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [PATCH v1 14/14] ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD
@ 2022-03-14 16:29 ` Max Krummenacher
0 siblings, 0 replies; 31+ messages in thread
From: Max Krummenacher @ 2022-03-14 16:29 UTC (permalink / raw)
To: max.krummenacher
Cc: Alistair Francis, Douglas Anderson, Fabio Estevam,
Johann Neuhauser, Marcel Ziswiler, NXP Linux Team,
Pascal Zimmermann, Pengutronix Kernel Team, Russell King,
Sascha Hauer, Shawn Guo, linux-arm-kernel, linux-kernel
The SoM Apalis/Colibri iMX6 use the ADC of a STMPE 811. Enable
its driver.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index f7498df08dfe..88a3602c4e58 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -402,6 +402,7 @@ CONFIG_IIO=y
CONFIG_MMA8452=y
CONFIG_IMX7D_ADC=y
CONFIG_RN5T618_ADC=y
+CONFIG_STMPE_ADC=y
CONFIG_VF610_ADC=y
CONFIG_SENSORS_ISL29018=y
CONFIG_MAG3110=y
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
2022-03-14 16:29 ` [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings Max Krummenacher
@ 2022-03-23 18:23 ` Rob Herring
2022-04-10 0:45 ` Shawn Guo
1 sibling, 0 replies; 31+ messages in thread
From: Rob Herring @ 2022-03-23 18:23 UTC (permalink / raw)
To: Max Krummenacher
Cc: Ariel D'Alessandro, Lucas Stach, Rob Herring, devicetree,
Marcel Ziswiler, Tim Harvey, Li Yang, Krzysztof Kozlowski,
Christoph Niedermaier, max.krummenacher, Sebastian Reichel,
Matthias Schiffer, Fabio Estevam, Oleksij Rempel, Shawn Guo,
Alexander Stein, linux-kernel
On Mon, 14 Mar 2022 17:29:45 +0100, Max Krummenacher wrote:
> The dedicated device tree for V1.1 modules has been dropped. Remove
> its bindings too.
>
> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
> ---
>
> Documentation/devicetree/bindings/arm/fsl.yaml | 8 --------
> 1 file changed, 8 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v1 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl
2022-03-14 16:29 ` [PATCH v1 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl Max Krummenacher
@ 2022-03-23 18:23 ` Rob Herring
0 siblings, 0 replies; 31+ messages in thread
From: Rob Herring @ 2022-03-23 18:23 UTC (permalink / raw)
To: Max Krummenacher
Cc: max.krummenacher, linux-kernel, Matthias Schiffer, Tim Harvey,
Marcel Ziswiler, Sebastian Reichel, devicetree, Shawn Guo,
Rob Herring, Fabio Estevam, Ariel D'Alessandro,
Alexander Stein, Krzysztof Kozlowski, Christoph Niedermaier,
Oleksij Rempel, Li Yang
On Mon, 14 Mar 2022 17:29:46 +0100, Max Krummenacher wrote:
> Add bindings for Aster, Iris and Iris V2 carrier boards our
> Colibri iMX6S/DL may be mated with.
>
> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
> ---
>
> Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings
2022-03-14 16:29 ` [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings Max Krummenacher
2022-03-23 18:23 ` Rob Herring
@ 2022-04-10 0:45 ` Shawn Guo
1 sibling, 0 replies; 31+ messages in thread
From: Shawn Guo @ 2022-04-10 0:45 UTC (permalink / raw)
To: Max Krummenacher
Cc: max.krummenacher, Alexander Stein, Ariel D'Alessandro,
Christoph Niedermaier, Fabio Estevam, Krzysztof Kozlowski,
Li Yang, Lucas Stach, Marcel Ziswiler, Matthias Schiffer,
Oleksij Rempel, Rob Herring, Sebastian Reichel, Tim Harvey,
devicetree, linux-kernel
On Mon, Mar 14, 2022 at 05:29:45PM +0100, Max Krummenacher wrote:
> The dedicated device tree for V1.1 modules has been dropped. Remove
> its bindings too.
>
> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Please fix your email client to avoid the checkpatch warning below.
WARNING: From:/Signed-off-by: email address mismatch: 'From: Max Krummenacher <max.oss.09@gmail.com>' != 'Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>'
Shawn
> ---
>
> Documentation/devicetree/bindings/arm/fsl.yaml | 8 --------
> 1 file changed, 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index 97f6eebad76a..cf854203bfb1 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -411,7 +411,6 @@ properties:
> - technologic,imx6dl-ts4900
> - technologic,imx6dl-ts7970
> - toradex,colibri_imx6dl # Colibri iMX6 Modules
> - - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 V1.1 Modules
> - udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board
> - vdl,lanmcu # Van der Laan LANMCU board
> - wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board
> @@ -492,13 +491,6 @@ properties:
> - const: toradex,colibri_imx6dl # Colibri iMX6DL/S Module
> - const: fsl,imx6dl
>
> - - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S V1.1 Modules
> - items:
> - - enum:
> - - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6DL/S V1.1 M. on Colibri Evaluation Board V3
> - - const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6DL/S V1.1 Module
> - - const: fsl,imx6dl
> -
> - description: i.MX6S DHCOM DRC02 Board
> items:
> - const: dh,imx6s-dhcom-drc02
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 31+ messages in thread
end of thread, other threads:[~2022-04-10 0:45 UTC | newest]
Thread overview: 31+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-14 16:29 [PATCH v1 00/14] ARM: dts: imx6dl-colibri: Misc improvements and newly added carriers Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings Max Krummenacher
2022-03-23 18:23 ` Rob Herring
2022-04-10 0:45 ` Shawn Guo
2022-03-14 16:29 ` [PATCH v1 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl Max Krummenacher
2022-03-23 18:23 ` Rob Herring
2022-03-14 16:29 ` [PATCH v1 03/14] ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 04/14] ARM: dts: imx6dl-colibri: Fix I2C pinmuxing Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 05/14] ARM: dts: imx6dl-colibri: Add gpio-line-names Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 06/14] ARM: dts: imx6dl-colibri: Disable add-on accessories Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 07/14] ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 08/14] ARM: dts: imx6dl-colibri: Add additional pingroups Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 09/14] ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 10/14] ARM: dts: imx6dl-colibri: Cleanup Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 11/14] ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 12/14] ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 13/14] ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
2022-03-14 16:29 ` [PATCH v1 14/14] ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD Max Krummenacher
2022-03-14 16:29 ` Max Krummenacher
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