* [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()
@ 2022-03-16 15:57 Anup Patel
0 siblings, 0 replies; 5+ messages in thread
From: Anup Patel @ 2022-03-16 15:57 UTC (permalink / raw)
To: ventana-sw-patches; +Cc: Anup Patel, stable
We might have RISC-V systems (such as QEMU) where VMID is not part
of the TLB entry tag so these systems will have to flush all TLB
enteries upon any change in hgatp.VMID.
Currently, we zero-out hgatp CSR in kvm_arch_vcpu_put() and we
re-program hgatp CSR in kvm_arch_vcpu_load(). For above described
systems, this will flush all TLB enteries whenever VCPU exits to
user-space hence reducing performance.
This patch fixes above described performance issue by not clearing
hgatp CSR in kvm_arch_vcpu_put().
Fixes: 34bde9d8b9e6 ("RISC-V: KVM: Implement VCPU world-switch")
Cc: stable@vger.kernel.org
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 624166004e36..6785aef4cbd4 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -653,8 +653,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
vcpu->arch.isa);
kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
- csr_write(CSR_HGATP, 0);
-
csr->vsstatus = csr_read(CSR_VSSTATUS);
csr->vsie = csr_read(CSR_VSIE);
csr->vstvec = csr_read(CSR_VSTVEC);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()
2022-03-17 3:55 ` Anup Patel
@ 2022-04-04 3:50 ` Anup Patel
-1 siblings, 0 replies; 5+ messages in thread
From: Anup Patel @ 2022-04-04 3:50 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Palmer Dabbelt, Paul Walmsley,
Albert Ou, Alistair Francis, KVM General,
open list:KERNEL VIRTUAL MACHINE FOR RISC-V (KVM/riscv),
linux-riscv, linux-kernel@vger.kernel.org List, stable
On Thu, Mar 17, 2022 at 9:25 AM Anup Patel <apatel@ventanamicro.com> wrote:
>
> We might have RISC-V systems (such as QEMU) where VMID is not part
> of the TLB entry tag so these systems will have to flush all TLB
> entries upon any change in hgatp.VMID.
>
> Currently, we zero-out hgatp CSR in kvm_arch_vcpu_put() and we
> re-program hgatp CSR in kvm_arch_vcpu_load(). For above described
> systems, this will flush all TLB entries whenever VCPU exits to
> user-space hence reducing performance.
>
> This patch fixes above described performance issue by not clearing
> hgatp CSR in kvm_arch_vcpu_put().
>
> Fixes: 34bde9d8b9e6 ("RISC-V: KVM: Implement VCPU world-switch")
> Cc: stable@vger.kernel.org
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
I have queued this patch for RC fixes.
Thanks,
Anup
> ---
> arch/riscv/kvm/vcpu.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 624166004e36..6785aef4cbd4 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -653,8 +653,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
> vcpu->arch.isa);
> kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
>
> - csr_write(CSR_HGATP, 0);
> -
> csr->vsstatus = csr_read(CSR_VSSTATUS);
> csr->vsie = csr_read(CSR_VSIE);
> csr->vstvec = csr_read(CSR_VSTVEC);
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()
@ 2022-04-04 3:50 ` Anup Patel
0 siblings, 0 replies; 5+ messages in thread
From: Anup Patel @ 2022-04-04 3:50 UTC (permalink / raw)
To: Anup Patel
Cc: Paolo Bonzini, Atish Patra, Palmer Dabbelt, Paul Walmsley,
Albert Ou, Alistair Francis, KVM General,
open list:KERNEL VIRTUAL MACHINE FOR RISC-V (KVM/riscv),
linux-riscv, linux-kernel@vger.kernel.org List, stable
On Thu, Mar 17, 2022 at 9:25 AM Anup Patel <apatel@ventanamicro.com> wrote:
>
> We might have RISC-V systems (such as QEMU) where VMID is not part
> of the TLB entry tag so these systems will have to flush all TLB
> entries upon any change in hgatp.VMID.
>
> Currently, we zero-out hgatp CSR in kvm_arch_vcpu_put() and we
> re-program hgatp CSR in kvm_arch_vcpu_load(). For above described
> systems, this will flush all TLB entries whenever VCPU exits to
> user-space hence reducing performance.
>
> This patch fixes above described performance issue by not clearing
> hgatp CSR in kvm_arch_vcpu_put().
>
> Fixes: 34bde9d8b9e6 ("RISC-V: KVM: Implement VCPU world-switch")
> Cc: stable@vger.kernel.org
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
I have queued this patch for RC fixes.
Thanks,
Anup
> ---
> arch/riscv/kvm/vcpu.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 624166004e36..6785aef4cbd4 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -653,8 +653,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
> vcpu->arch.isa);
> kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
>
> - csr_write(CSR_HGATP, 0);
> -
> csr->vsstatus = csr_read(CSR_VSSTATUS);
> csr->vsie = csr_read(CSR_VSIE);
> csr->vstvec = csr_read(CSR_VSTVEC);
> --
> 2.25.1
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()
@ 2022-03-17 3:55 ` Anup Patel
0 siblings, 0 replies; 5+ messages in thread
From: Anup Patel @ 2022-03-17 3:55 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra
Cc: Palmer Dabbelt, Paul Walmsley, Albert Ou, Alistair Francis,
Anup Patel, kvm, kvm-riscv, linux-riscv, linux-kernel,
Anup Patel, stable
We might have RISC-V systems (such as QEMU) where VMID is not part
of the TLB entry tag so these systems will have to flush all TLB
enteries upon any change in hgatp.VMID.
Currently, we zero-out hgatp CSR in kvm_arch_vcpu_put() and we
re-program hgatp CSR in kvm_arch_vcpu_load(). For above described
systems, this will flush all TLB enteries whenever VCPU exits to
user-space hence reducing performance.
This patch fixes above described performance issue by not clearing
hgatp CSR in kvm_arch_vcpu_put().
Fixes: 34bde9d8b9e6 ("RISC-V: KVM: Implement VCPU world-switch")
Cc: stable@vger.kernel.org
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 624166004e36..6785aef4cbd4 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -653,8 +653,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
vcpu->arch.isa);
kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
- csr_write(CSR_HGATP, 0);
-
csr->vsstatus = csr_read(CSR_VSSTATUS);
csr->vsie = csr_read(CSR_VSIE);
csr->vstvec = csr_read(CSR_VSTVEC);
--
2.25.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()
@ 2022-03-17 3:55 ` Anup Patel
0 siblings, 0 replies; 5+ messages in thread
From: Anup Patel @ 2022-03-17 3:55 UTC (permalink / raw)
To: Paolo Bonzini, Atish Patra
Cc: Palmer Dabbelt, Paul Walmsley, Albert Ou, Alistair Francis,
Anup Patel, kvm, kvm-riscv, linux-riscv, linux-kernel,
Anup Patel, stable
We might have RISC-V systems (such as QEMU) where VMID is not part
of the TLB entry tag so these systems will have to flush all TLB
enteries upon any change in hgatp.VMID.
Currently, we zero-out hgatp CSR in kvm_arch_vcpu_put() and we
re-program hgatp CSR in kvm_arch_vcpu_load(). For above described
systems, this will flush all TLB enteries whenever VCPU exits to
user-space hence reducing performance.
This patch fixes above described performance issue by not clearing
hgatp CSR in kvm_arch_vcpu_put().
Fixes: 34bde9d8b9e6 ("RISC-V: KVM: Implement VCPU world-switch")
Cc: stable@vger.kernel.org
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kvm/vcpu.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 624166004e36..6785aef4cbd4 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -653,8 +653,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
vcpu->arch.isa);
kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context);
- csr_write(CSR_HGATP, 0);
-
csr->vsstatus = csr_read(CSR_VSSTATUS);
csr->vsie = csr_read(CSR_VSIE);
csr->vstvec = csr_read(CSR_VSTVEC);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-04-04 3:51 UTC | newest]
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2022-03-16 15:57 [PATCH] RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put() Anup Patel
2022-03-17 3:55 Anup Patel
2022-03-17 3:55 ` Anup Patel
2022-04-04 3:50 ` Anup Patel
2022-04-04 3:50 ` Anup Patel
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