* [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests
@ 2022-03-18 7:30 Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-18 7:30 UTC (permalink / raw)
To: igt-dev
Introduce two new subtests - ctrl-surf-copy-new-ctx + suspend-resume.
ctrl-surf-copy-new-ctx checks ccs data is binded to physical mem.
suspend-resume checks S0 suspend state.
v2 Adding separate allocator handle for new context (Zbigniew)
Apoorva Singh (2):
tests/i915/gem_ccs: Check ctrl-surf-copy in new context
tests/i915/gem_ccs: Add suspend-resume subtest
tests/i915/gem_ccs.c | 93 +++++++++++++++++++++++++++++++++++++-------
1 file changed, 78 insertions(+), 15 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-18 7:30 ` Zbigniew Kempczyński
2022-03-18 9:45 ` Kamil Konieczny
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
` (2 subsequent siblings)
3 siblings, 1 reply; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-18 7:30 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..7e104f6ad8 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-18 7:30 ` Zbigniew Kempczyński
2022-03-18 10:29 ` Kamil Konieczny
2022-03-18 8:28 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev2) Patchwork
2022-03-18 9:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 1 reply; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-18 7:30 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 45 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 7e104f6ad8..eaa8e043b0 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,24 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
+ char *orig, *orig2, *new, *new2;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +197,27 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ new = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ new2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_assert(!strcmp(orig, new));
+ igt_assert(!strcmp(orig2, new2));
+ munmap(ccsmap2, ccssize);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +234,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +337,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -508,6 +535,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev2)
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-18 8:28 ` Patchwork
2022-03-18 9:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-03-18 8:28 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 6679 bytes --]
== Series Details ==
Series: Add two gem-ccs subtests (rev2)
URL : https://patchwork.freedesktop.org/series/101472/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11380 -> IGTPW_6799
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/index.html
Participating hosts (47 -> 44)
------------------------------
Additional (2): bat-jsl-2 fi-pnv-d510
Missing (5): fi-kbl-soraka shard-tglu fi-bsw-cyan shard-rkl fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_6799:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@gem:
- {bat-rpls-2}: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/bat-rpls-2/igt@i915_selftest@live@gem.html
* igt@i915_selftest@live@gt_lrc:
- {bat-dg2-8}: [INCOMPLETE][2] ([i915#5270] / [i915#5356]) -> [INCOMPLETE][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
Known issues
------------
Here are the changes found in IGTPW_6799 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-pnv-d510: NOTRUN -> [SKIP][4] ([fdo#109271]) +57 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-n3050: [PASS][5] -> [DMESG-FAIL][6] ([i915#2927] / [i915#3428])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-pnv-d510: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#5341])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/fi-pnv-d510/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
* igt@runner@aborted:
- fi-bsw-n3050: NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#1436] / [i915#3428] / [i915#4312])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/fi-bsw-n3050/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@gtt:
- {bat-rpls-2}: [INCOMPLETE][9] ([i915#4391] / [i915#5337]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/bat-rpls-2/igt@i915_selftest@live@gtt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/bat-rpls-2/igt@i915_selftest@live@gtt.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-5: [DMESG-FAIL][11] ([i915#4494] / [i915#4957]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@objects:
- {bat-rpls-2}: [DMESG-WARN][13] ([i915#4391]) -> [PASS][14] +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/bat-rpls-2/igt@i915_selftest@live@objects.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/bat-rpls-2/igt@i915_selftest@live@objects.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5270]: https://gitlab.freedesktop.org/drm/intel/issues/5270
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5337]: https://gitlab.freedesktop.org/drm/intel/issues/5337
[i915#5339]: https://gitlab.freedesktop.org/drm/intel/issues/5339
[i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
[i915#5342]: https://gitlab.freedesktop.org/drm/intel/issues/5342
[i915#5356]: https://gitlab.freedesktop.org/drm/intel/issues/5356
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6385 -> IGTPW_6799
CI-20190529: 20190529
CI_DRM_11380: fe83949cd4316608ea785fc376b6ed444224adad @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_6799: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/index.html
IGT_6385: f3df40281d93d5a63ee98fa30e90852d780673c9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Testlist changes ==
+igt@gem_ccs@ctrl-surf-copy-new-ctx
+igt@gem_ccs@suspend-resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/index.html
[-- Attachment #2: Type: text/html, Size: 6292 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-18 9:45 ` Kamil Konieczny
0 siblings, 0 replies; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-18 9:45 UTC (permalink / raw)
To: igt-dev
Dnia 2022-03-18 at 08:30:17 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify ccs data is binded to physical memory by using
> XY_CTRL_SURF_COPY_BLT command in separate context.
>
> v2: add separate allocator handle for new context (Zbigniew)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
> 1 file changed, 39 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index fdf1fe75f5..7e104f6ad8 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -39,6 +39,7 @@ struct test_config {
> bool compression;
> bool inplace;
> bool surfcopy;
> + bool new_ctx;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -234,9 +235,8 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling, bool compression,
> - bool inplace,
> - bool surfcopy)
> + enum blt_tiling mid_tiling,
> + const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {}, *pext = &ext;
> @@ -249,7 +249,7 @@ static void block_copy(int i915,
> uint32_t run_id = mid_tiling;
> uint32_t mid_region = region2, bb;
> uint32_t width = param.width, height = param.height;
> - enum blt_compression mid_compression = compression;
> + enum blt_compression mid_compression = config->compression;
> int mid_compression_format = param.compression_format;
> enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> @@ -293,8 +293,31 @@ static void block_copy(int i915,
> WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
> WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
>
> - if (surfcopy && pext)
> - surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
> + if (config->surfcopy && pext) {
> + const intel_ctx_t *surf_ctx = ctx;
> + uint64_t surf_ahnd = ahnd;
> + struct intel_execution_engine2 surf_e = *e;
> +
> + if (config->new_ctx) {
> + intel_ctx_cfg_t cfg = {};
> +
> + cfg.num_engines = 1;
> + cfg.engines[0].engine_class = e->class;
> + cfg.engines[0].engine_instance = e->instance;
> + surf_ctx = intel_ctx_create(i915, &cfg);
> + surf_e.flags = 0;
> + ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + }
> +
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> +
> + if (surf_ctx != ctx) {
> + intel_ctx_destroy(i915, surf_ctx);
> + put_ahnd(surf_ahnd);
> + }
> + }
>
> memset(&blt, 0, sizeof(blt));
> blt.color_depth = CD_32bit;
> @@ -303,7 +326,7 @@ static void block_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
> - if (inplace) {
> + if (config->inplace) {
> set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
> T_LINEAR, COMPRESSION_DISABLED, comp_type);
> blt.dst.ptr = mid->ptr;
> @@ -367,10 +390,7 @@ static void block_copy_test(int i915,
> param.compression_format, regtxt) {
> block_copy(i915, ctx, e,
> region1, region2,
> - tiling,
> - config->compression,
> - config->inplace,
> - config->surfcopy);
> + tiling, config);
> }
> free(regtxt);
> }
> @@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .new_ctx = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
--
Kamil
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Add two gem-ccs subtests (rev2)
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
` (2 preceding siblings ...)
2022-03-18 8:28 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev2) Patchwork
@ 2022-03-18 9:47 ` Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2022-03-18 9:47 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 30250 bytes --]
== Series Details ==
Series: Add two gem-ccs subtests (rev2)
URL : https://patchwork.freedesktop.org/series/101472/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11380_full -> IGTPW_6799_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/index.html
Participating hosts (12 -> 8)
------------------------------
Missing (4): pig-skl-6260u pig-kbl-iris shard-rkl pig-glk-j5005
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_6799_full:
### IGT changes ###
#### Possible regressions ####
* {igt@gem_ccs@ctrl-surf-copy-new-ctx} (NEW):
- shard-iclb: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
- {shard-tglu}: NOTRUN -> [SKIP][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglu-5/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
- shard-tglb: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
New tests
---------
New tests have been introduced between CI_DRM_11380_full and IGTPW_6799_full:
### New IGT tests (1) ###
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_6799_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* {igt@gem_ccs@ctrl-surf-copy-new-ctx} (NEW):
- shard-glk: NOTRUN -> [SKIP][4] ([fdo#109271]) +63 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk5/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_eio@in-flight-contexts-1us:
- shard-tglb: [PASS][5] -> [TIMEOUT][6] ([i915#3063])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-tglb1/igt@gem_eio@in-flight-contexts-1us.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@gem_eio@in-flight-contexts-1us.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#4525])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-iclb2/igt@gem_exec_balancer@parallel-balancer.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2846])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: NOTRUN -> [FAIL][11] ([i915#2842]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842]) +5 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-apl: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-apl3/igt@gem_exec_fair@basic-none@vecs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl2/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][17] ([i915#2842]) +5 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_schedule@u-semaphore-user:
- shard-snb: NOTRUN -> [SKIP][18] ([fdo#109271]) +109 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-snb7/igt@gem_exec_schedule@u-semaphore-user.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl7/igt@gem_lmem_swapping@heavy-multi.html
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#4613]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@gem_lmem_swapping@heavy-multi.html
- shard-glk: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk5/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-kbl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl4/igt@gem_lmem_swapping@heavy-verify-random.html
- shard-tglb: NOTRUN -> [SKIP][23] ([i915#4613]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_pxp@create-valid-protected-context:
- shard-iclb: NOTRUN -> [SKIP][24] ([i915#4270])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb2/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@reject-modify-context-protection-off-2:
- shard-tglb: NOTRUN -> [SKIP][25] ([i915#4270]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@gem_pxp@reject-modify-context-protection-off-2.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-kbl: NOTRUN -> [SKIP][26] ([fdo#109271]) +181 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl4/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][27] ([i915#768]) +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_softpin@allocator-evict-all-engines:
- shard-glk: [PASS][28] -> [FAIL][29] ([i915#4171])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-glk1/igt@gem_softpin@allocator-evict-all-engines.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk1/igt@gem_softpin@allocator-evict-all-engines.html
* igt@gem_softpin@evict-snoop:
- shard-iclb: NOTRUN -> [SKIP][30] ([fdo#109312])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@gem_softpin@evict-snoop.html
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#109312])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@gem_softpin@evict-snoop.html
* igt@gem_userptr_blits@coherency-sync:
- shard-tglb: NOTRUN -> [SKIP][32] ([fdo#110542])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@gem_userptr_blits@coherency-sync.html
- shard-iclb: NOTRUN -> [SKIP][33] ([fdo#109290])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-kbl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3323])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl4/igt@gem_userptr_blits@dmabuf-sync.html
- shard-iclb: NOTRUN -> [SKIP][35] ([i915#3323])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb4/igt@gem_userptr_blits@dmabuf-sync.html
- shard-tglb: NOTRUN -> [SKIP][36] ([i915#3323])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-tglb: NOTRUN -> [SKIP][37] ([i915#3297]) +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-iclb: NOTRUN -> [SKIP][38] ([i915#3297]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb6/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gen3_render_linear_blits:
- shard-tglb: NOTRUN -> [SKIP][39] ([fdo#109289]) +2 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@gen3_render_linear_blits.html
* igt@gen7_exec_parse@batch-without-end:
- shard-iclb: NOTRUN -> [SKIP][40] ([fdo#109289])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb4/igt@gen7_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@allowed-all:
- shard-tglb: NOTRUN -> [SKIP][41] ([i915#2527] / [i915#2856])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#1904])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
- shard-iclb: NOTRUN -> [SKIP][43] ([i915#658])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-psr:
- shard-tglb: NOTRUN -> [FAIL][44] ([i915#454])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb7/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-tglb: NOTRUN -> [WARN][45] ([i915#2681] / [i915#2684])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@i915_pm_rc6_residency@rc6-idle.html
- shard-iclb: NOTRUN -> [WARN][46] ([i915#1804] / [i915#2684])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109293] / [fdo#109506])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb1/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
- shard-tglb: NOTRUN -> [SKIP][48] ([fdo#109506] / [i915#2411])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb7/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@i915_pm_sseu@full-enable:
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#4387])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@i915_pm_sseu@full-enable.html
- shard-iclb: NOTRUN -> [SKIP][50] ([i915#4387])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb4/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-tglb: NOTRUN -> [SKIP][51] ([fdo#109303])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_selftest@live@gt_lrc:
- shard-tglb: NOTRUN -> [DMESG-FAIL][52] ([i915#2373])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- shard-tglb: NOTRUN -> [DMESG-FAIL][53] ([i915#1759])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][54] -> [INCOMPLETE][55] ([i915#3921])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-snb4/igt@i915_selftest@live@hangcheck.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-snb4/igt@i915_selftest@live@hangcheck.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][56] ([i915#5286]) +3 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][57] ([i915#5286]) +5 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@linear-32bpp-rotate-180:
- shard-glk: NOTRUN -> [DMESG-WARN][58] ([i915#118])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk9/igt@kms_big_fb@linear-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#111614])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
- shard-iclb: NOTRUN -> [SKIP][60] ([fdo#110725] / [fdo#111614])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb4/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-kbl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#3777]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-apl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#3777]) +3 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_joiner@invalid-modeset:
- shard-iclb: NOTRUN -> [SKIP][63] ([i915#2705])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb5/igt@kms_big_joiner@invalid-modeset.html
- shard-tglb: NOTRUN -> [SKIP][64] ([i915#2705])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-bad-aux-stride-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][65] ([fdo#111615] / [i915#3689]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_ccs@pipe-a-bad-aux-stride-yf_tiled_ccs.html
* igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][66] ([i915#3689]) +5 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_ccs.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#3886]) +10 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl3/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109278] / [i915#3886]) +8 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][69] ([i915#3689] / [i915#3886]) +4 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#3886]) +7 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl6/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
- shard-glk: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#3886]) +6 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk7/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-iclb: NOTRUN -> [SKIP][72] ([i915#3742])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@kms_cdclk@plane-scaling.html
- shard-tglb: NOTRUN -> [SKIP][73] ([i915#3742])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-glk: NOTRUN -> [SKIP][74] ([fdo#109271] / [fdo#111827]) +3 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk5/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@dp-hpd-with-enabled-mode:
- shard-iclb: NOTRUN -> [SKIP][75] ([fdo#109284] / [fdo#111827]) +6 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb2/igt@kms_chamelium@dp-hpd-with-enabled-mode.html
* igt@kms_chamelium@hdmi-audio-edid:
- shard-kbl: NOTRUN -> [SKIP][76] ([fdo#109271] / [fdo#111827]) +12 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl7/igt@kms_chamelium@hdmi-audio-edid.html
* igt@kms_chamelium@vga-hpd:
- shard-apl: NOTRUN -> [SKIP][77] ([fdo#109271] / [fdo#111827]) +6 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl3/igt@kms_chamelium@vga-hpd.html
- shard-tglb: NOTRUN -> [SKIP][78] ([fdo#109284] / [fdo#111827]) +12 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_chamelium@vga-hpd.html
* igt@kms_color@pipe-b-deep-color:
- shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109278] / [i915#3555])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb4/igt@kms_color@pipe-b-deep-color.html
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#3555]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@kms_color@pipe-b-deep-color.html
* igt@kms_color@pipe-d-ctm-negative:
- shard-iclb: NOTRUN -> [SKIP][81] ([fdo#109278] / [i915#1149]) +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb7/igt@kms_color@pipe-d-ctm-negative.html
* igt@kms_color_chamelium@pipe-c-ctm-limited-range:
- shard-snb: NOTRUN -> [SKIP][82] ([fdo#109271] / [fdo#111827]) +3 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-snb4/igt@kms_color_chamelium@pipe-c-ctm-limited-range.html
* igt@kms_color_chamelium@pipe-d-gamma:
- shard-iclb: NOTRUN -> [SKIP][83] ([fdo#109278] / [fdo#109284] / [fdo#111827]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb7/igt@kms_color_chamelium@pipe-d-gamma.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-iclb: NOTRUN -> [SKIP][84] ([i915#3116])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb5/igt@kms_content_protection@dp-mst-type-1.html
- shard-tglb: NOTRUN -> [SKIP][85] ([i915#3116] / [i915#3299])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_cursor_crc@pipe-a-cursor-max-size-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][86] ([i915#3359]) +6 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@kms_cursor_crc@pipe-a-cursor-max-size-rapid-movement.html
* igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen:
- shard-iclb: NOTRUN -> [SKIP][87] ([fdo#109278] / [fdo#109279]) +3 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-random:
- shard-tglb: NOTRUN -> [SKIP][88] ([fdo#109279] / [i915#3359]) +7 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement:
- shard-iclb: NOTRUN -> [SKIP][89] ([fdo#109278]) +31 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_cursor_crc@pipe-d-cursor-256x256-rapid-movement.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- shard-glk: [PASS][90] -> [DMESG-WARN][91] ([i915#118] / [i915#1888])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-glk5/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk6/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
- shard-iclb: [PASS][92] -> [DMESG-WARN][93] ([i915#1888])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-iclb6/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-tglb: NOTRUN -> [SKIP][94] ([fdo#109274] / [fdo#111825]) +8 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
- shard-iclb: NOTRUN -> [SKIP][95] ([fdo#109274] / [fdo#109278])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglb: NOTRUN -> [SKIP][96] ([i915#3528])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb3/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-4tiled:
- shard-iclb: NOTRUN -> [SKIP][97] ([i915#5287]) +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-4tiled.html
* igt@kms_draw_crc@draw-method-xrgb8888-render-4tiled:
- shard-tglb: NOTRUN -> [SKIP][98] ([i915#5287]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@kms_draw_crc@draw-method-xrgb8888-render-4tiled.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][99] -> [INCOMPLETE][100] ([i915#180] / [i915#1982])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-iclb: NOTRUN -> [SKIP][101] ([fdo#109274]) +3 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-tglb: NOTRUN -> [SKIP][102] ([i915#2587])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-cpu:
- shard-iclb: NOTRUN -> [SKIP][103] ([fdo#109280]) +24 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][104] ([fdo#109280] / [fdo#111825]) +34 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_hdr@static-toggle:
- shard-iclb: NOTRUN -> [SKIP][105] ([i915#3555])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb7/igt@kms_hdr@static-toggle.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-tglb: NOTRUN -> [SKIP][106] ([i915#1839])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
- shard-iclb: NOTRUN -> [SKIP][107] ([i915#1839])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-kbl: NOTRUN -> [SKIP][108] ([fdo#109271] / [i915#533]) +1 similar issue
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl3/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
- shard-glk: NOTRUN -> [SKIP][109] ([fdo#109271] / [i915#533])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-glk5/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-apl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#533]) +2 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl8/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [PASS][111] -> [DMESG-WARN][112] ([i915#180]) +3 similar issues
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][113] ([i915#265])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: NOTRUN -> [SKIP][114] ([i915#3536])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html
- shard-tglb: NOTRUN -> [SKIP][115] ([i915#3536]) +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][116] ([fdo#111615]) +5 similar issues
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@kms_plane_multiple@atomic-pipe-b-tiling-yf.html
* igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-25@pipe-a-edp-1-downscale-with-pixel-format:
- shard-iclb: NOTRUN -> [SKIP][117] ([i915#5176]) +8 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb3/igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-25@pipe-a-edp-1-downscale-with-pixel-format.html
* igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-75@pipe-b-edp-1-downscale-with-pixel-format:
- shard-iclb: [PASS][118] -> [INCOMPLETE][119] ([i915#5293])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-iclb8/igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-75@pipe-b-edp-1-downscale-with-pixel-format.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb2/igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-75@pipe-b-edp-1-downscale-with-pixel-format.html
* igt@kms_plane_scaling@downscale-with-rotation-factor-0-5@pipe-b-edp-1-downscale-with-rotation:
- shard-tglb: NOTRUN -> [SKIP][120] ([i915#5176]) +11 similar issues
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb2/igt@kms_plane_scaling@downscale-with-rotation-factor-0-5@pipe-b-edp-1-downscale-with-rotation.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-edp-1-planes-downscale:
- shard-iclb: NOTRUN -> [SKIP][121] ([i915#5235]) +2 similar issues
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb6/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-edp-1-planes-downscale.html
- shard-tglb: NOTRUN -> [SKIP][122] ([i915#5235]) +3 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-tglb5/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b-edp-1-planes-downscale.html
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-b-edp-1-scaler-with-clipping-clamping:
- shard-iclb: [PASS][123] -> [INCOMPLETE][124] ([i915#5243])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11380/shard-iclb5/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-b-edp-1-scaler-with-clipping-clamping.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb2/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-b-edp-1-scaler-with-clipping-clamping.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#658]) +1 similar issue
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-apl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-iclb: NOTRUN -> [SKIP][126] ([fdo#111068] / [i915#658])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-iclb8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
- shard-kbl: NOTRUN -> [SKIP][127] ([fdo#109271] / [i915#658]) +2 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/shard-kbl3/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
- shard-tglb: NOTRUN -> [SKIP][128] ([i915#2920])
[128]: https://intel-gfx-ci
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6799/index.html
[-- Attachment #2: Type: text/html, Size: 33885 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-18 10:29 ` Kamil Konieczny
2022-03-21 6:18 ` Zbigniew Kempczyński
0 siblings, 1 reply; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-18 10:29 UTC (permalink / raw)
To: igt-dev
Hi,
Dnia 2022-03-18 at 08:30:18 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify flatccs data won't be corrupted when device will be put
> to S0 (s2idle) state.
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 45 +++++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 40 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 7e104f6ad8..eaa8e043b0 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -4,6 +4,7 @@
> */
>
> #include <errno.h>
> +#include <glib.h>
> #include <sys/ioctl.h>
> #include <sys/time.h>
> #include <malloc.h>
> @@ -40,6 +41,7 @@ struct test_config {
> bool inplace;
> bool surfcopy;
> bool new_ctx;
> + bool suspend_resume;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -162,22 +164,24 @@ static void surf_copy(int i915,
> const struct blt_copy_object *src,
> const struct blt_copy_object *mid,
> const struct blt_copy_object *dst,
> - int run_id)
> + int run_id, bool suspend_resume)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {};
> struct blt_ctrl_surf_copy_data surf = {};
> - uint32_t bb, ccs, *ccsmap;
> - uint64_t bb_size = 4096;
Please keep it here so number of changes will be lower.
> - uint64_t ccssize = mid->size / CCS_RATIO;
> + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
No need to move bb_size here.
> uint32_t *ccscopy;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> int result;
> + char *orig, *orig2, *new, *new2;
These are used only in suspend_resume block, so move it there.
>
> igt_assert(mid->compression);
> ccscopy = (uint32_t *) malloc(ccssize);
> + bb_size = 4096;
May be removed (if you keep it above).
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> ccs = gem_create(i915, ccssize);
> + ccs2 = gem_create(i915, ccssize);
>
> surf.i915 = i915;
> surf.print_bb = param.print_bb;
> @@ -193,6 +197,27 @@ static void surf_copy(int i915,
> PROT_READ | PROT_WRITE);
> memcpy(ccscopy, ccsmap, ccssize);
>
> + if (suspend_resume) {
> + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> +
> + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> + 0, DIRECT_ACCESS);
> + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> + gem_sync(i915, surf.dst.handle);
> +
> + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> + PROT_READ | PROT_WRITE);
> + new = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> + new2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_assert(!strcmp(orig, new));
> + igt_assert(!strcmp(orig2, new2));
May you rename new and new2 into something meaningfull ? Like
newsum_ccs, newsum_ctrl ? It can help if assert triggers.
Checksums are pointers allocated by g_compute_checksum so they
need to be free after use.
> + munmap(ccsmap2, ccssize);
Move this before two asserts.
> + }
> +
> /* corrupt ccs */
> for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> ccsmap[i] = i;
> @@ -209,6 +234,7 @@ static void surf_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> + bb_size = 4096;
Looks strange here, remove this.
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> @@ -311,7 +337,8 @@ static void block_copy(int i915,
> ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> }
>
> - surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> + surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
This should be in first patch ?
Regards,
Kamil
> + config->suspend_resume);
>
> if (surf_ctx != ctx) {
> intel_ctx_destroy(i915, surf_ctx);
> @@ -508,6 +535,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_subtest_with_dynamic("suspend-resume") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .suspend_resume = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-18 10:29 ` Kamil Konieczny
@ 2022-03-21 6:18 ` Zbigniew Kempczyński
0 siblings, 0 replies; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-21 6:18 UTC (permalink / raw)
To: Kamil Konieczny, igt-dev, Apoorva Singh
On Fri, Mar 18, 2022 at 11:29:53AM +0100, Kamil Konieczny wrote:
> Hi,
>
> Dnia 2022-03-18 at 08:30:18 +0100, Zbigniew Kempczyński napisał(a):
> > From: Apoorva Singh <apoorva1.singh@intel.com>
> >
> > Verify flatccs data won't be corrupted when device will be put
> > to S0 (s2idle) state.
> >
> > Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> > Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> > ---
> > tests/i915/gem_ccs.c | 45 +++++++++++++++++++++++++++++++++++++++-----
> > 1 file changed, 40 insertions(+), 5 deletions(-)
> >
> > diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> > index 7e104f6ad8..eaa8e043b0 100644
> > --- a/tests/i915/gem_ccs.c
> > +++ b/tests/i915/gem_ccs.c
> > @@ -4,6 +4,7 @@
> > */
> >
> > #include <errno.h>
> > +#include <glib.h>
> > #include <sys/ioctl.h>
> > #include <sys/time.h>
> > #include <malloc.h>
> > @@ -40,6 +41,7 @@ struct test_config {
> > bool inplace;
> > bool surfcopy;
> > bool new_ctx;
> > + bool suspend_resume;
> > };
> >
> > static void set_object(struct blt_copy_object *obj,
> > @@ -162,22 +164,24 @@ static void surf_copy(int i915,
> > const struct blt_copy_object *src,
> > const struct blt_copy_object *mid,
> > const struct blt_copy_object *dst,
> > - int run_id)
> > + int run_id, bool suspend_resume)
> > {
> > struct blt_copy_data blt = {};
> > struct blt_block_copy_data_ext ext = {};
> > struct blt_ctrl_surf_copy_data surf = {};
> > - uint32_t bb, ccs, *ccsmap;
> > - uint64_t bb_size = 4096;
>
> Please keep it here so number of changes will be lower.
>
> > - uint64_t ccssize = mid->size / CCS_RATIO;
> > + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> > + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
>
> No need to move bb_size here.
>
> > uint32_t *ccscopy;
> > uint8_t uc_mocs = intel_get_uc_mocs(i915);
> > int result;
> > + char *orig, *orig2, *new, *new2;
>
> These are used only in suspend_resume block, so move it there.
Ack, makes sense.
>
> >
> > igt_assert(mid->compression);
> > ccscopy = (uint32_t *) malloc(ccssize);
> > + bb_size = 4096;
>
> May be removed (if you keep it above).
My intent was to point the reader that bb_size can alter by the driver
regarding created buffer size. For smem there's 4k, but for lmem can
vary. gem_create_from_pool() is new call, so I try to build some
patterns to avoid mismatch between sizes and allocator calls.
>
> > bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> > ccs = gem_create(i915, ccssize);
> > + ccs2 = gem_create(i915, ccssize);
> >
> > surf.i915 = i915;
> > surf.print_bb = param.print_bb;
> > @@ -193,6 +197,27 @@ static void surf_copy(int i915,
> > PROT_READ | PROT_WRITE);
> > memcpy(ccscopy, ccsmap, ccssize);
> >
> > + if (suspend_resume) {
> > + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> > + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> > +
> > + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> > +
> > + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> > + 0, DIRECT_ACCESS);
> > + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> > + gem_sync(i915, surf.dst.handle);
> > +
> > + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> > + PROT_READ | PROT_WRITE);
> > + new = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> > + new2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> > +
> > + igt_assert(!strcmp(orig, new));
> > + igt_assert(!strcmp(orig2, new2));
>
> May you rename new and new2 into something meaningfull ? Like
> newsum_ccs, newsum_ctrl ? It can help if assert triggers.
> Checksums are pointers allocated by g_compute_checksum so they
> need to be free after use.
Ok, will do.
>
> > + munmap(ccsmap2, ccssize);
>
> Move this before two asserts.
Ack.
>
> > + }
> > +
> > /* corrupt ccs */
> > for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> > ccsmap[i] = i;
> > @@ -209,6 +234,7 @@ static void surf_copy(int i915,
> > set_blt_object(&blt.dst, dst);
> > set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> > set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> > + bb_size = 4096;
>
> Looks strange here, remove this.
I'm not sure what bb_size is before gem_create_from_pool() - it may be altered by
previous call (not for smem but lmem likely).
>
> > bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> > set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> > blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> > @@ -311,7 +337,8 @@ static void block_copy(int i915,
> > ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> > }
> >
> > - surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> > + surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
>
> This should be in first patch ?
Hmm, likely not. First (new ctx) changes to use &surf_e. For suspend-resume there's
new option which is additional arg for surf_copy.
Thanks for the review, new series will be sent soon.
--
Zbigniew
>
> Regards,
> Kamil
>
> > + config->suspend_resume);
> >
> > if (surf_ctx != ctx) {
> > intel_ctx_destroy(i915, surf_ctx);
> > @@ -508,6 +535,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> > block_copy_test(i915, &config, ctx, set);
> > }
> >
> > + igt_subtest_with_dynamic("suspend-resume") {
> > + struct test_config config = { .compression = true,
> > + .surfcopy = true,
> > + .suspend_resume = true };
> > +
> > + block_copy_test(i915, &config, ctx, set);
> > + }
> > +
> > igt_fixture {
> > igt_disallow_hang(i915, hang);
> > close(i915);
> > --
> > 2.32.0
> >
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-22 11:56 ` Kamil Konieczny
0 siblings, 0 replies; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-22 11:56 UTC (permalink / raw)
To: igt-dev
Dnia 2022-03-22 at 09:25:18 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify flatccs data won't be corrupted when device will be put
> to S0 (s2idle) state.
>
> v2: addressing review comments (Kamil)
> v3: fix memory leak (Kamil)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 51 +++++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 46 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index b697ea56f9..4ecb3e36ac 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -4,6 +4,7 @@
> */
>
> #include <errno.h>
> +#include <glib.h>
> #include <sys/ioctl.h>
> #include <sys/time.h>
> #include <malloc.h>
> @@ -40,6 +41,7 @@ struct test_config {
> bool inplace;
> bool surfcopy;
> bool new_ctx;
> + bool suspend_resume;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -162,22 +164,23 @@ static void surf_copy(int i915,
> const struct blt_copy_object *src,
> const struct blt_copy_object *mid,
> const struct blt_copy_object *dst,
> - int run_id)
> + int run_id, bool suspend_resume)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {};
> struct blt_ctrl_surf_copy_data surf = {};
> - uint32_t bb, ccs, *ccsmap;
> - uint64_t bb_size = 4096;
> - uint64_t ccssize = mid->size / CCS_RATIO;
> + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
> uint32_t *ccscopy;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> int result;
>
> igt_assert(mid->compression);
> ccscopy = (uint32_t *) malloc(ccssize);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> ccs = gem_create(i915, ccssize);
> + ccs2 = gem_create(i915, ccssize);
>
> surf.i915 = i915;
> surf.print_bb = param.print_bb;
> @@ -193,6 +196,33 @@ static void surf_copy(int i915,
> PROT_READ | PROT_WRITE);
> memcpy(ccscopy, ccsmap, ccssize);
>
> + if (suspend_resume) {
> + char *orig, *orig2, *newsum, *newsum2;
> +
> + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> +
> + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> + 0, DIRECT_ACCESS);
> + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> + gem_sync(i915, surf.dst.handle);
> +
> + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> + PROT_READ | PROT_WRITE);
> + newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> + newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + munmap(ccsmap2, ccssize);
> + igt_assert(!strcmp(orig, newsum));
> + igt_assert(!strcmp(orig2, newsum2));
> + g_free(orig);
> + g_free(orig2);
> + g_free(newsum);
> + g_free(newsum2);
> + }
> +
> /* corrupt ccs */
> for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> ccsmap[i] = i;
> @@ -209,6 +239,7 @@ static void surf_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> @@ -311,7 +342,8 @@ static void block_copy(int i915,
> ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> }
>
> - surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id,
> + config->suspend_resume);
>
> if (surf_ctx != ctx) {
> intel_ctx_destroy(i915, surf_ctx);
> @@ -510,6 +542,15 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_describe("Check flatccs data persists after suspend / resume (S0)");
> + igt_subtest_with_dynamic("suspend-resume") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .suspend_resume = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
--
Kamil
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-22 8:25 ` Zbigniew Kempczyński
2022-03-22 11:56 ` Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 8:25 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
v2: addressing review comments (Kamil)
v3: fix memory leak (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 51 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index b697ea56f9..4ecb3e36ac 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,23 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +196,33 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ char *orig, *orig2, *newsum, *newsum2;
+
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ munmap(ccsmap2, ccssize);
+ igt_assert(!strcmp(orig, newsum));
+ igt_assert(!strcmp(orig2, newsum2));
+ g_free(orig);
+ g_free(orig2);
+ g_free(newsum);
+ g_free(newsum2);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +239,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +342,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -510,6 +542,15 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_describe("Check flatccs data persists after suspend / resume (S0)");
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-22 6:59 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-22 6:59 ` Zbigniew Kempczyński
0 siblings, 0 replies; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 6:59 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
v2: addressing review comments (Kamil)
v3: fix memory leak (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 51 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 28711bdc59..2747983925 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,23 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +196,33 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ char *orig, *orig2, *newsum, *newsum2;
+
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ munmap(ccsmap2, ccssize);
+ igt_assert(!strcmp(orig, newsum));
+ igt_assert(!strcmp(orig2, newsum2));
+ g_free(orig);
+ g_free(orig2);
+ g_free(newsum);
+ g_free(newsum2);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +239,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +342,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -510,6 +542,15 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_describe("Check flatccs data persists after suspend / resume (S0)");
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-21 11:11 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-21 16:04 ` Kamil Konieczny
0 siblings, 0 replies; 16+ messages in thread
From: Kamil Konieczny @ 2022-03-21 16:04 UTC (permalink / raw)
To: igt-dev
Hi,
only two comments, see below.
Dnia 2022-03-21 at 12:11:30 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify flatccs data won't be corrupted when device will be put
> to S0 (s2idle) state.
>
> v2: addressing review comments (Kamil)
> v3: fix memory leak (Kamil)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 50 +++++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 45 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 7e104f6ad8..1f8f98ce62 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -4,6 +4,7 @@
> */
>
> #include <errno.h>
> +#include <glib.h>
> #include <sys/ioctl.h>
> #include <sys/time.h>
> #include <malloc.h>
> @@ -40,6 +41,7 @@ struct test_config {
> bool inplace;
> bool surfcopy;
> bool new_ctx;
> + bool suspend_resume;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -162,22 +164,23 @@ static void surf_copy(int i915,
> const struct blt_copy_object *src,
> const struct blt_copy_object *mid,
> const struct blt_copy_object *dst,
> - int run_id)
> + int run_id, bool suspend_resume)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {};
> struct blt_ctrl_surf_copy_data surf = {};
> - uint32_t bb, ccs, *ccsmap;
> - uint64_t bb_size = 4096;
> - uint64_t ccssize = mid->size / CCS_RATIO;
> + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
> uint32_t *ccscopy;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> int result;
>
> igt_assert(mid->compression);
> ccscopy = (uint32_t *) malloc(ccssize);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> ccs = gem_create(i915, ccssize);
> + ccs2 = gem_create(i915, ccssize);
>
> surf.i915 = i915;
> surf.print_bb = param.print_bb;
> @@ -193,6 +196,33 @@ static void surf_copy(int i915,
> PROT_READ | PROT_WRITE);
> memcpy(ccscopy, ccsmap, ccssize);
>
> + if (suspend_resume) {
> + char *orig, *orig2, *newsum, *newsum2;
> +
> + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> +
> + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> + 0, DIRECT_ACCESS);
> + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> + gem_sync(i915, surf.dst.handle);
> +
> + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> + PROT_READ | PROT_WRITE);
> + newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> + newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + munmap(ccsmap2, ccssize);
> + igt_assert(!strcmp(orig, newsum));
> + igt_assert(!strcmp(orig2, newsum2));
> + g_free(orig);
> + g_free(orig2);
> + g_free(newsum);
> + g_free(newsum2);
> + }
> +
> /* corrupt ccs */
> for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> ccsmap[i] = i;
> @@ -209,6 +239,7 @@ static void surf_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> @@ -311,7 +342,8 @@ static void block_copy(int i915,
> ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> }
>
> - surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> + surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
-------------------------------------------------- ^
imho this change to ahand should be in 1/2,
> + config->suspend_resume);
so the only change will be adding suspend_resume option.
>
> if (surf_ctx != ctx) {
> intel_ctx_destroy(i915, surf_ctx);
> @@ -508,6 +540,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
Add description to new test.
> + igt_subtest_with_dynamic("suspend-resume") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .suspend_resume = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Regards,
Kamil
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-21 11:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-21 11:11 ` Zbigniew Kempczyński
2022-03-21 16:04 ` Kamil Konieczny
0 siblings, 1 reply; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-21 11:11 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
v2: addressing review comments (Kamil)
v3: fix memory leak (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 50 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 45 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 7e104f6ad8..1f8f98ce62 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,23 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +196,33 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ char *orig, *orig2, *newsum, *newsum2;
+
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ munmap(ccsmap2, ccssize);
+ igt_assert(!strcmp(orig, newsum));
+ igt_assert(!strcmp(orig2, newsum2));
+ g_free(orig);
+ g_free(orig2);
+ g_free(newsum);
+ g_free(newsum2);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +239,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +342,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -508,6 +540,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-21 7:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-21 7:11 ` Zbigniew Kempczyński
0 siblings, 0 replies; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-21 7:11 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
v2: addressing review comments (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 46 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 7e104f6ad8..1b58668ad0 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,23 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +196,29 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ char *orig, *orig2, *newsum, *newsum2;
+
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ munmap(ccsmap2, ccssize);
+ igt_assert(!strcmp(orig, newsum));
+ igt_assert(!strcmp(orig2, newsum2));
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +235,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +338,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -508,6 +536,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-17 10:20 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-17 16:46 ` Zbigniew Kempczyński
0 siblings, 0 replies; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-17 16:46 UTC (permalink / raw)
To: igt-dev
On Thu, Mar 17, 2022 at 11:20:02AM +0100, Zbigniew Kempczyński wrote:
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify flatccs data won't be corrupted when device will be put
> to S0 (s2idle) state.
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Looks good for me:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> ---
> tests/i915/gem_ccs.c | 45 +++++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 40 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index 1a21e24597..5bf11c9a8e 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -4,6 +4,7 @@
> */
>
> #include <errno.h>
> +#include <glib.h>
> #include <sys/ioctl.h>
> #include <sys/time.h>
> #include <malloc.h>
> @@ -40,6 +41,7 @@ struct test_config {
> bool inplace;
> bool surfcopy;
> bool new_ctx;
> + bool suspend_resume;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -162,22 +164,24 @@ static void surf_copy(int i915,
> const struct blt_copy_object *src,
> const struct blt_copy_object *mid,
> const struct blt_copy_object *dst,
> - int run_id)
> + int run_id, bool suspend_resume)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {};
> struct blt_ctrl_surf_copy_data surf = {};
> - uint32_t bb, ccs, *ccsmap;
> - uint64_t bb_size = 4096;
> - uint64_t ccssize = mid->size / CCS_RATIO;
> + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
> uint32_t *ccscopy;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> int result;
> + char *orig, *orig2, *new, *new2;
>
> igt_assert(mid->compression);
> ccscopy = (uint32_t *) malloc(ccssize);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> ccs = gem_create(i915, ccssize);
> + ccs2 = gem_create(i915, ccssize);
>
> surf.i915 = i915;
> surf.print_bb = param.print_bb;
> @@ -193,6 +197,27 @@ static void surf_copy(int i915,
> PROT_READ | PROT_WRITE);
> memcpy(ccscopy, ccsmap, ccssize);
>
> + if (suspend_resume) {
> + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> +
> + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> + 0, DIRECT_ACCESS);
> + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> + gem_sync(i915, surf.dst.handle);
> +
> + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> + PROT_READ | PROT_WRITE);
> + new = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> + new2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_assert(!strcmp(orig, new));
> + igt_assert(!strcmp(orig2, new2));
> + munmap(ccsmap2, ccssize);
> + }
> +
> /* corrupt ccs */
> for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> ccsmap[i] = i;
> @@ -209,6 +234,7 @@ static void surf_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> @@ -299,7 +325,8 @@ static void block_copy(int i915,
> if (config->new_ctx)
> surf_ctx = intel_ctx_create(i915, &ctx->cfg);
>
> - surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id);
> + surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id,
> + config->suspend_resume);
>
> if (surf_ctx != ctx)
> intel_ctx_destroy(i915, surf_ctx);
> @@ -494,6 +521,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_subtest_with_dynamic("suspend-resume") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .suspend_resume = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-17 10:20 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-17 10:20 ` Zbigniew Kempczyński
2022-03-17 16:46 ` Zbigniew Kempczyński
0 siblings, 1 reply; 16+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-17 10:20 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 45 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index 1a21e24597..5bf11c9a8e 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,24 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
+ char *orig, *orig2, *new, *new2;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +197,27 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ new = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ new2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_assert(!strcmp(orig, new));
+ igt_assert(!strcmp(orig2, new2));
+ munmap(ccsmap2, ccssize);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +234,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -299,7 +325,8 @@ static void block_copy(int i915,
if (config->new_ctx)
surf_ctx = intel_ctx_create(i915, &ctx->cfg);
- surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx)
intel_ctx_destroy(i915, surf_ctx);
@@ -494,6 +521,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 16+ messages in thread
end of thread, other threads:[~2022-03-22 11:56 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-18 9:45 ` Kamil Konieczny
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-18 10:29 ` Kamil Konieczny
2022-03-21 6:18 ` Zbigniew Kempczyński
2022-03-18 8:28 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev2) Patchwork
2022-03-18 9:47 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-22 11:56 ` Kamil Konieczny
2022-03-22 6:59 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 6:59 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-21 11:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-21 11:11 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-21 16:04 ` Kamil Konieczny
2022-03-21 7:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-21 7:11 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-17 10:20 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-17 10:20 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-17 16:46 ` Zbigniew Kempczyński
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