* [PATCH v7 0/2] Add watchdog driver for Sunplus SP7021 SoC @ 2022-03-04 8:12 Xiantao Hu 2022-03-04 8:12 ` [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 Xiantao Hu 2022-03-04 8:12 ` [PATCH v7 2/2] watchdog: Add watchdog driver " Xiantao Hu 0 siblings, 2 replies; 6+ messages in thread From: Xiantao Hu @ 2022-03-04 8:12 UTC (permalink / raw) To: wim, p.zabel, linux-kernel, linux-watchdog, linux, robh+dt, devicetree Cc: wells.lu, qinjian, Xiantao Hu This is a patch series for watchdog driver for Sunplus SP7021 SoC. Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a single chip. It is designed for industrial control. Refer to: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview https://tibbo.com/store/plus1.html Xiantao Hu (2): dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 watchdog: Add watchdog driver for Sunplus SP7021 .../bindings/watchdog/sunplus,sp7021-wdt.yaml | 47 ++++ MAINTAINERS | 7 + drivers/watchdog/Kconfig | 11 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sunplus_wdt.c | 220 ++++++++++++++++++ 5 files changed, 286 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml create mode 100644 drivers/watchdog/sunplus_wdt.c -- 2.33.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 2022-03-04 8:12 [PATCH v7 0/2] Add watchdog driver for Sunplus SP7021 SoC Xiantao Hu @ 2022-03-04 8:12 ` Xiantao Hu 2022-03-21 11:10 ` Krzysztof Kozlowski 2022-03-04 8:12 ` [PATCH v7 2/2] watchdog: Add watchdog driver " Xiantao Hu 1 sibling, 1 reply; 6+ messages in thread From: Xiantao Hu @ 2022-03-04 8:12 UTC (permalink / raw) To: wim, p.zabel, linux-kernel, linux-watchdog, linux, robh+dt, devicetree Cc: wells.lu, qinjian, Xiantao Hu, Rob Herring This adds the documentation for the devicetree bindings of the Sunplus SP7021 watchdog driver, found from SP7021 SoCs and newer. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> --- .../bindings/watchdog/sunplus,sp7021-wdt.yaml | 47 +++++++++++++++++++ MAINTAINERS | 6 +++ 2 files changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml new file mode 100644 index 000000000..9a9bfe150 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/sunplus,sp7021-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sunplus SoCs Watchdog Device Tree Bindings + +maintainers: + - XianTao Hu <xt.hu@cqplus1.com> + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + const: sunplus,sp7021-wdt + + reg: + items: + - description: watchdog registers regions + - description: miscellaneous control registers regions + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - resets + +additionalProperties: false + +examples: + - | + watchdog: watchdog@9c000630 { + compatible = "sunplus,sp7021-wdt"; + reg = <0x9c000630 0x08>, <0x9C000274 0x04>; + clocks = <&clkc 0x24>; + resets = <&rstc 0x14>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index fb18ce716..fe6cc971c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18242,6 +18242,12 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/dlink/sundance.c +SUNPLUS WATCHDOG DRIVER +M: Xiantao Hu <xt.hu@cqplus1.com> +L: linux-watchdog@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml + SUPERH M: Yoshinori Sato <ysato@users.sourceforge.jp> M: Rich Felker <dalias@libc.org> -- 2.33.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 2022-03-04 8:12 ` [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 Xiantao Hu @ 2022-03-21 11:10 ` Krzysztof Kozlowski 2022-03-21 12:20 ` xt.hu[胡先韬] 0 siblings, 1 reply; 6+ messages in thread From: Krzysztof Kozlowski @ 2022-03-21 11:10 UTC (permalink / raw) To: Xiantao Hu Cc: wim, p.zabel, linux-kernel, linux-watchdog, linux, robh+dt, devicetree, wells.lu, qinjian, Rob Herring On Fri, Mar 04, 2022 at 04:12:08PM +0800, Xiantao Hu wrote: > This adds the documentation for the devicetree bindings of the Sunplus > SP7021 watchdog driver, found from SP7021 SoCs and newer. > > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> > --- > .../bindings/watchdog/sunplus,sp7021-wdt.yaml | 47 +++++++++++++++++++ > MAINTAINERS | 6 +++ > 2 files changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml Please use scripts/get_maintainer.pl on recent kernel (newest mainline or recent linux-next) to get the list of people to CC. > > diff --git a/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > new file mode 100644 > index 000000000..9a9bfe150 > --- /dev/null > +++ b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > @@ -0,0 +1,47 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) Sunplus Co., Ltd. 2021 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/watchdog/sunplus,sp7021-wdt.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sunplus SoCs Watchdog Device Tree Bindings s/Device Tree Bindings// > + > +maintainers: > + - XianTao Hu <xt.hu@cqplus1.com> > + > +allOf: > + - $ref: watchdog.yaml# > + > +properties: > + compatible: > + const: sunplus,sp7021-wdt > + > + reg: > + items: > + - description: watchdog registers regions > + - description: miscellaneous control registers regions > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + > +additionalProperties: false > + > +examples: > + - | > + watchdog: watchdog@9c000630 { > + compatible = "sunplus,sp7021-wdt"; > + reg = <0x9c000630 0x08>, <0x9C000274 0x04>; lowercase hex (Second reg) Can be fixed while applying, so in such case: Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 2022-03-21 11:10 ` Krzysztof Kozlowski @ 2022-03-21 12:20 ` xt.hu[胡先韬] 0 siblings, 0 replies; 6+ messages in thread From: xt.hu[胡先韬] @ 2022-03-21 12:20 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: wim, p.zabel, linux-kernel, linux-watchdog, linux, robh+dt, devicetree, Wells Lu 呂芳騰, qinjian[覃健], Rob Herring Dear Krzysztof Thanks for your review. > -----Original Message----- > From: Krzysztof Kozlowski [mailto:krzk@kernel.org] > Sent: Monday, March 21, 2022 7:10 PM > To: xt.hu[胡先韬] <xt.hu@cqplus1.com> > Cc: wim@linux-watchdog.org; p.zabel@pengutronix.de; linux-kernel@vger.kernel.org; > linux-watchdog@vger.kernel.org; linux@roeck-us.net; robh+dt@kernel.org; devicetree@vger.kernel.org; > Wells Lu 呂芳騰 <wells.lu@sunplus.com>; qinjian[覃健] <qinjian@cqplus1.com>; Rob Herring > <robh@kernel.org> > Subject: Re: [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 > > On Fri, Mar 04, 2022 at 04:12:08PM +0800, Xiantao Hu wrote: > > This adds the documentation for the devicetree bindings of the Sunplus > > SP7021 watchdog driver, found from SP7021 SoCs and newer. > > > > Reviewed-by: Rob Herring <robh@kernel.org> > > Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> > > --- > > .../bindings/watchdog/sunplus,sp7021-wdt.yaml | 47 +++++++++++++++++++ > > MAINTAINERS | 6 +++ > > 2 files changed, 53 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > > Please use scripts/get_maintainer.pl on recent kernel (newest mainline or > recent linux-next) to get the list of people to CC. > I will do it in the next patch. > > > > diff --git a/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > > new file mode 100644 > > index 000000000..9a9bfe150 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > > @@ -0,0 +1,47 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +# Copyright (C) Sunplus Co., Ltd. 2021 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/watchdog/sunplus,sp7021-wdt.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Sunplus SoCs Watchdog Device Tree Bindings > > s/Device Tree Bindings// > I will drop the string "Device Tree Bindings". > > + > > +maintainers: > > + - XianTao Hu <xt.hu@cqplus1.com> > > + > > +allOf: > > + - $ref: watchdog.yaml# > > + > > +properties: > > + compatible: > > + const: sunplus,sp7021-wdt > > + > > + reg: > > + items: > > + - description: watchdog registers regions > > + - description: miscellaneous control registers regions > > + > > + clocks: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + - resets > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + watchdog: watchdog@9c000630 { > > + compatible = "sunplus,sp7021-wdt"; > > + reg = <0x9c000630 0x08>, <0x9C000274 0x04>; > > lowercase hex (Second reg) > I just realized the driver don't use second reg anymore. I will drop it and modify the description of reg. > Can be fixed while applying, so in such case: > Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> > I got it. Best regards, Xian-tao > Best regards, > Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v7 2/2] watchdog: Add watchdog driver for Sunplus SP7021 2022-03-04 8:12 [PATCH v7 0/2] Add watchdog driver for Sunplus SP7021 SoC Xiantao Hu 2022-03-04 8:12 ` [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 Xiantao Hu @ 2022-03-04 8:12 ` Xiantao Hu 2022-03-09 23:11 ` Guenter Roeck 1 sibling, 1 reply; 6+ messages in thread From: Xiantao Hu @ 2022-03-04 8:12 UTC (permalink / raw) To: wim, p.zabel, linux-kernel, linux-watchdog, linux, robh+dt, devicetree Cc: wells.lu, qinjian, Xiantao Hu Sunplus SP7021 requires watchdog timer support. Add watchdog driver to enable this. Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> --- Changes in v7: - Addressed all comments from Mr. Guenter Roeck. Fix sp_wdt_ping() and add comment to explain the calculation. MAINTAINERS | 1 + drivers/watchdog/Kconfig | 11 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sunplus_wdt.c | 220 +++++++++++++++++++++++++++++++++ 4 files changed, 233 insertions(+) create mode 100644 drivers/watchdog/sunplus_wdt.c diff --git a/MAINTAINERS b/MAINTAINERS index fe6cc971c..a1b3d76e2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18247,6 +18247,7 @@ M: Xiantao Hu <xt.hu@cqplus1.com> L: linux-watchdog@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml +F: drivers/watchdog/sunplus_wdt.c SUPERH M: Yoshinori Sato <ysato@users.sourceforge.jp> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 9d222ba17..d3dbe8695 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -976,6 +976,17 @@ config MSC313E_WATCHDOG To compile this driver as a module, choose M here: the module will be called msc313e_wdt. +config SUNPLUS_WATCHDOG + tristate "Sunplus watchdog support" + depends on ARCH_SUNPLUS || COMPILE_TEST + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer + in Sunplus SoCs. + + To compile this driver as a module, choose M here: the + module will be called sunplus_wdt. + # X86 (i386 + ia64 + x86_64) Architecture config ACQUIRE_WDT diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 2ee970641..0fa548ee6 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -93,6 +93,7 @@ obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o obj-$(CONFIG_ARM_SMC_WATCHDOG) += arm_smc_wdt.o obj-$(CONFIG_VISCONTI_WATCHDOG) += visconti_wdt.o obj-$(CONFIG_MSC313E_WATCHDOG) += msc313e_wdt.o +obj-$(CONFIG_SUNPLUS_WATCHDOG) += sunplus_wdt.o # X86 (i386 + ia64 + x86_64) Architecture obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o diff --git a/drivers/watchdog/sunplus_wdt.c b/drivers/watchdog/sunplus_wdt.c new file mode 100644 index 000000000..e2d8c532b --- /dev/null +++ b/drivers/watchdog/sunplus_wdt.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * sunplus Watchdog Driver + * + * Copyright (C) 2021 Sunplus Technology Co., Ltd. + * + */ + +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/reset.h> +#include <linux/watchdog.h> + +#define WDT_CTRL 0x00 +#define WDT_CNT 0x04 + +#define WDT_STOP 0x3877 +#define WDT_RESUME 0x4A4B +#define WDT_CLRIRQ 0x7482 +#define WDT_UNLOCK 0xAB00 +#define WDT_LOCK 0xAB01 +#define WDT_CONMAX 0xDEAF + +/* TIMEOUT_MAX = ffff0/90kHz =11.65, so longer than 11 seconds will time out. */ +#define SP_WDT_MAX_TIMEOUT 11U +#define SP_WDT_DEFAULT_TIMEOUT 10 + +#define STC_CLK 90000 + +#define DEVICE_NAME "sunplus-wdt" + +static unsigned int timeout; +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +struct sp_wdt_priv { + struct watchdog_device wdev; + void __iomem *base; + struct clk *clk; + struct reset_control *rstc; +}; + +static int sp_wdt_restart(struct watchdog_device *wdev, + unsigned long action, void *data) +{ + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); + void __iomem *base = priv->base; + + writel(WDT_STOP, base + WDT_CTRL); + writel(WDT_UNLOCK, base + WDT_CTRL); + writel(0x0001, base + WDT_CNT); + writel(WDT_LOCK, base + WDT_CTRL); + writel(WDT_RESUME, base + WDT_CTRL); + + return 0; +} + +static int sp_wdt_ping(struct watchdog_device *wdev) +{ + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); + void __iomem *base = priv->base; + u32 count; + + if (wdev->timeout > SP_WDT_MAX_TIMEOUT) { + /* WDT_CONMAX sets the count to the maximum (down-counting). */ + writel(WDT_CONMAX, base + WDT_CTRL); + } else { + writel(WDT_UNLOCK, base + WDT_CTRL); + /* + * Watchdog timer is a 20-bit down-counting based on STC_CLK. + * This register bits[16:0] is from bit[19:4] of the watchdog + * timer counter. + */ + count = (wdev->timeout * STC_CLK) >> 4; + writel(count, base + WDT_CNT); + writel(WDT_LOCK, base + WDT_CTRL); + } + + return 0; +} + +static int sp_wdt_stop(struct watchdog_device *wdev) +{ + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); + void __iomem *base = priv->base; + + writel(WDT_STOP, base + WDT_CTRL); + + return 0; +} + +static int sp_wdt_start(struct watchdog_device *wdev) +{ + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); + void __iomem *base = priv->base; + + writel(WDT_RESUME, base + WDT_CTRL); + + return 0; +} + +static unsigned int sp_wdt_get_timeleft(struct watchdog_device *wdev) +{ + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); + void __iomem *base = priv->base; + u32 val; + + val = readl(base + WDT_CNT); + val &= 0xffff; + val = val << 4; + + return val; +} + +static const struct watchdog_info sp_wdt_info = { + .identity = DEVICE_NAME, + .options = WDIOF_SETTIMEOUT | + WDIOF_MAGICCLOSE | + WDIOF_KEEPALIVEPING, +}; + +static const struct watchdog_ops sp_wdt_ops = { + .owner = THIS_MODULE, + .start = sp_wdt_start, + .stop = sp_wdt_stop, + .ping = sp_wdt_ping, + .get_timeleft = sp_wdt_get_timeleft, + .restart = sp_wdt_restart, +}; + +static void sp_clk_disable_unprepare(void *data) +{ + clk_disable_unprepare(data); +} + +static void sp_reset_control_assert(void *data) +{ + reset_control_assert(data); +} + +static int sp_wdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sp_wdt_priv *priv; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->clk = devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get clock\n"); + + ret = clk_prepare_enable(priv->clk); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable clock\n"); + + ret = devm_add_action_or_reset(dev, sp_clk_disable_unprepare, priv->clk); + if (ret) + return ret; + + /* The timer and watchdog shared the STC reset */ + priv->rstc = devm_reset_control_get_shared(dev, NULL); + if (IS_ERR(priv->rstc)) + return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset\n"); + + reset_control_deassert(priv->rstc); + + ret = devm_add_action_or_reset(dev, sp_reset_control_assert, priv->rstc); + if (ret) + return ret; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->wdev.info = &sp_wdt_info; + priv->wdev.ops = &sp_wdt_ops; + priv->wdev.timeout = SP_WDT_DEFAULT_TIMEOUT; + priv->wdev.max_hw_heartbeat_ms = SP_WDT_MAX_TIMEOUT * 1000; + priv->wdev.min_timeout = 1; + priv->wdev.parent = dev; + + watchdog_set_drvdata(&priv->wdev, priv); + watchdog_init_timeout(&priv->wdev, timeout, dev); + watchdog_set_nowayout(&priv->wdev, nowayout); + watchdog_stop_on_reboot(&priv->wdev); + watchdog_set_restart_priority(&priv->wdev, 128); + + return devm_watchdog_register_device(dev, &priv->wdev); +} + +static const struct of_device_id sp_wdt_of_match[] = { + {.compatible = "sunplus,sp7021-wdt", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, sp_wdt_of_match); + +static struct platform_driver sp_wdt_driver = { + .probe = sp_wdt_probe, + .driver = { + .name = DEVICE_NAME, + .of_match_table = sp_wdt_of_match, + }, +}; + +module_platform_driver(sp_wdt_driver); + +MODULE_AUTHOR("Xiantao Hu <xt.hu@cqplus1.com>"); +MODULE_DESCRIPTION("Sunplus Watchdog Timer Driver"); +MODULE_LICENSE("GPL"); -- 2.33.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v7 2/2] watchdog: Add watchdog driver for Sunplus SP7021 2022-03-04 8:12 ` [PATCH v7 2/2] watchdog: Add watchdog driver " Xiantao Hu @ 2022-03-09 23:11 ` Guenter Roeck 0 siblings, 0 replies; 6+ messages in thread From: Guenter Roeck @ 2022-03-09 23:11 UTC (permalink / raw) To: Xiantao Hu Cc: wim, p.zabel, linux-kernel, linux-watchdog, robh+dt, devicetree, wells.lu, qinjian On Fri, Mar 04, 2022 at 04:12:09PM +0800, Xiantao Hu wrote: > Sunplus SP7021 requires watchdog timer support. > Add watchdog driver to enable this. > > Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > Changes in v7: > - Addressed all comments from Mr. Guenter Roeck. > Fix sp_wdt_ping() and add comment to explain the calculation. > > MAINTAINERS | 1 + > drivers/watchdog/Kconfig | 11 ++ > drivers/watchdog/Makefile | 1 + > drivers/watchdog/sunplus_wdt.c | 220 +++++++++++++++++++++++++++++++++ > 4 files changed, 233 insertions(+) > create mode 100644 drivers/watchdog/sunplus_wdt.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index fe6cc971c..a1b3d76e2 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -18247,6 +18247,7 @@ M: Xiantao Hu <xt.hu@cqplus1.com> > L: linux-watchdog@vger.kernel.org > S: Maintained > F: Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml > +F: drivers/watchdog/sunplus_wdt.c > > SUPERH > M: Yoshinori Sato <ysato@users.sourceforge.jp> > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig > index 9d222ba17..d3dbe8695 100644 > --- a/drivers/watchdog/Kconfig > +++ b/drivers/watchdog/Kconfig > @@ -976,6 +976,17 @@ config MSC313E_WATCHDOG > To compile this driver as a module, choose M here: the > module will be called msc313e_wdt. > > +config SUNPLUS_WATCHDOG > + tristate "Sunplus watchdog support" > + depends on ARCH_SUNPLUS || COMPILE_TEST > + select WATCHDOG_CORE > + help > + Say Y here to include support for the watchdog timer > + in Sunplus SoCs. > + > + To compile this driver as a module, choose M here: the > + module will be called sunplus_wdt. > + > # X86 (i386 + ia64 + x86_64) Architecture > > config ACQUIRE_WDT > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile > index 2ee970641..0fa548ee6 100644 > --- a/drivers/watchdog/Makefile > +++ b/drivers/watchdog/Makefile > @@ -93,6 +93,7 @@ obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o > obj-$(CONFIG_ARM_SMC_WATCHDOG) += arm_smc_wdt.o > obj-$(CONFIG_VISCONTI_WATCHDOG) += visconti_wdt.o > obj-$(CONFIG_MSC313E_WATCHDOG) += msc313e_wdt.o > +obj-$(CONFIG_SUNPLUS_WATCHDOG) += sunplus_wdt.o > > # X86 (i386 + ia64 + x86_64) Architecture > obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o > diff --git a/drivers/watchdog/sunplus_wdt.c b/drivers/watchdog/sunplus_wdt.c > new file mode 100644 > index 000000000..e2d8c532b > --- /dev/null > +++ b/drivers/watchdog/sunplus_wdt.c > @@ -0,0 +1,220 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * sunplus Watchdog Driver > + * > + * Copyright (C) 2021 Sunplus Technology Co., Ltd. > + * > + */ > + > +#include <linux/clk.h> > +#include <linux/io.h> > +#include <linux/module.h> > +#include <linux/mod_devicetable.h> > +#include <linux/platform_device.h> > +#include <linux/reset.h> > +#include <linux/watchdog.h> > + > +#define WDT_CTRL 0x00 > +#define WDT_CNT 0x04 > + > +#define WDT_STOP 0x3877 > +#define WDT_RESUME 0x4A4B > +#define WDT_CLRIRQ 0x7482 > +#define WDT_UNLOCK 0xAB00 > +#define WDT_LOCK 0xAB01 > +#define WDT_CONMAX 0xDEAF > + > +/* TIMEOUT_MAX = ffff0/90kHz =11.65, so longer than 11 seconds will time out. */ > +#define SP_WDT_MAX_TIMEOUT 11U > +#define SP_WDT_DEFAULT_TIMEOUT 10 > + > +#define STC_CLK 90000 > + > +#define DEVICE_NAME "sunplus-wdt" > + > +static unsigned int timeout; > +module_param(timeout, int, 0); > +MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); > + > +static bool nowayout = WATCHDOG_NOWAYOUT; > +module_param(nowayout, bool, 0); > +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" > + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); > + > +struct sp_wdt_priv { > + struct watchdog_device wdev; > + void __iomem *base; > + struct clk *clk; > + struct reset_control *rstc; > +}; > + > +static int sp_wdt_restart(struct watchdog_device *wdev, > + unsigned long action, void *data) > +{ > + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); > + void __iomem *base = priv->base; > + > + writel(WDT_STOP, base + WDT_CTRL); > + writel(WDT_UNLOCK, base + WDT_CTRL); > + writel(0x0001, base + WDT_CNT); > + writel(WDT_LOCK, base + WDT_CTRL); > + writel(WDT_RESUME, base + WDT_CTRL); > + > + return 0; > +} > + > +static int sp_wdt_ping(struct watchdog_device *wdev) > +{ > + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); > + void __iomem *base = priv->base; > + u32 count; > + > + if (wdev->timeout > SP_WDT_MAX_TIMEOUT) { > + /* WDT_CONMAX sets the count to the maximum (down-counting). */ > + writel(WDT_CONMAX, base + WDT_CTRL); > + } else { > + writel(WDT_UNLOCK, base + WDT_CTRL); > + /* > + * Watchdog timer is a 20-bit down-counting based on STC_CLK. > + * This register bits[16:0] is from bit[19:4] of the watchdog > + * timer counter. > + */ > + count = (wdev->timeout * STC_CLK) >> 4; > + writel(count, base + WDT_CNT); > + writel(WDT_LOCK, base + WDT_CTRL); > + } > + > + return 0; > +} > + > +static int sp_wdt_stop(struct watchdog_device *wdev) > +{ > + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); > + void __iomem *base = priv->base; > + > + writel(WDT_STOP, base + WDT_CTRL); > + > + return 0; > +} > + > +static int sp_wdt_start(struct watchdog_device *wdev) > +{ > + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); > + void __iomem *base = priv->base; > + > + writel(WDT_RESUME, base + WDT_CTRL); > + > + return 0; > +} > + > +static unsigned int sp_wdt_get_timeleft(struct watchdog_device *wdev) > +{ > + struct sp_wdt_priv *priv = watchdog_get_drvdata(wdev); > + void __iomem *base = priv->base; > + u32 val; > + > + val = readl(base + WDT_CNT); > + val &= 0xffff; > + val = val << 4; > + > + return val; > +} > + > +static const struct watchdog_info sp_wdt_info = { > + .identity = DEVICE_NAME, > + .options = WDIOF_SETTIMEOUT | > + WDIOF_MAGICCLOSE | > + WDIOF_KEEPALIVEPING, > +}; > + > +static const struct watchdog_ops sp_wdt_ops = { > + .owner = THIS_MODULE, > + .start = sp_wdt_start, > + .stop = sp_wdt_stop, > + .ping = sp_wdt_ping, > + .get_timeleft = sp_wdt_get_timeleft, > + .restart = sp_wdt_restart, > +}; > + > +static void sp_clk_disable_unprepare(void *data) > +{ > + clk_disable_unprepare(data); > +} > + > +static void sp_reset_control_assert(void *data) > +{ > + reset_control_assert(data); > +} > + > +static int sp_wdt_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct sp_wdt_priv *priv; > + int ret; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + priv->clk = devm_clk_get(dev, NULL); > + if (IS_ERR(priv->clk)) > + return dev_err_probe(dev, PTR_ERR(priv->clk), "Failed to get clock\n"); > + > + ret = clk_prepare_enable(priv->clk); > + if (ret) > + return dev_err_probe(dev, ret, "Failed to enable clock\n"); > + > + ret = devm_add_action_or_reset(dev, sp_clk_disable_unprepare, priv->clk); > + if (ret) > + return ret; > + > + /* The timer and watchdog shared the STC reset */ > + priv->rstc = devm_reset_control_get_shared(dev, NULL); > + if (IS_ERR(priv->rstc)) > + return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get reset\n"); > + > + reset_control_deassert(priv->rstc); > + > + ret = devm_add_action_or_reset(dev, sp_reset_control_assert, priv->rstc); > + if (ret) > + return ret; > + > + priv->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(priv->base)) > + return PTR_ERR(priv->base); > + > + priv->wdev.info = &sp_wdt_info; > + priv->wdev.ops = &sp_wdt_ops; > + priv->wdev.timeout = SP_WDT_DEFAULT_TIMEOUT; > + priv->wdev.max_hw_heartbeat_ms = SP_WDT_MAX_TIMEOUT * 1000; > + priv->wdev.min_timeout = 1; > + priv->wdev.parent = dev; > + > + watchdog_set_drvdata(&priv->wdev, priv); > + watchdog_init_timeout(&priv->wdev, timeout, dev); > + watchdog_set_nowayout(&priv->wdev, nowayout); > + watchdog_stop_on_reboot(&priv->wdev); > + watchdog_set_restart_priority(&priv->wdev, 128); > + > + return devm_watchdog_register_device(dev, &priv->wdev); > +} > + > +static const struct of_device_id sp_wdt_of_match[] = { > + {.compatible = "sunplus,sp7021-wdt", }, > + { /* sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, sp_wdt_of_match); > + > +static struct platform_driver sp_wdt_driver = { > + .probe = sp_wdt_probe, > + .driver = { > + .name = DEVICE_NAME, > + .of_match_table = sp_wdt_of_match, > + }, > +}; > + > +module_platform_driver(sp_wdt_driver); > + > +MODULE_AUTHOR("Xiantao Hu <xt.hu@cqplus1.com>"); > +MODULE_DESCRIPTION("Sunplus Watchdog Timer Driver"); > +MODULE_LICENSE("GPL"); ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-03-21 12:21 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-03-04 8:12 [PATCH v7 0/2] Add watchdog driver for Sunplus SP7021 SoC Xiantao Hu 2022-03-04 8:12 ` [PATCH v7 1/2] dt-bindings: watchdog: Add watchdog yaml file for Sunplus SP7021 Xiantao Hu 2022-03-21 11:10 ` Krzysztof Kozlowski 2022-03-21 12:20 ` xt.hu[胡先韬] 2022-03-04 8:12 ` [PATCH v7 2/2] watchdog: Add watchdog driver " Xiantao Hu 2022-03-09 23:11 ` Guenter Roeck
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