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From: Alan Previn <alan.previn.teres.alexis@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Matthew Brost <matthew.brost@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	Alan Previn <alan.previn.teres.alexis@intel.com>,
	Jani Nikula <jani.nikula@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	dri-devel@lists.freedesktop.org,
	Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>,
	John Harrison <john.c.harrison@intel.com>
Subject: [PATCH v13 06/13] drm/i915/guc: Add GuC's error state capture output structures.
Date: Mon, 21 Mar 2022 09:45:20 -0700	[thread overview]
Message-ID: <20220321164527.2500062-7-alan.previn.teres.alexis@intel.com> (raw)
In-Reply-To: <20220321164527.2500062-1-alan.previn.teres.alexis@intel.com>

Add GuC's error capture output structures and definitions as how
they would appear in GuC log buffer's error capture subregion after
an error state capture G2H event notification.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
index 6c199433945d..8824c5eba355 100644
--- a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
@@ -55,6 +55,53 @@ struct __guc_mmio_reg_descr_group {
 	struct __guc_mmio_reg_descr *extlist; /* only used for steered registers */
 };
 
+/**
+ * struct guc_state_capture_header_t / struct guc_state_capture_t /
+ * guc_state_capture_group_header_t / guc_state_capture_group_t
+ *
+ * Prior to resetting engines that have hung or faulted, GuC microkernel
+ * reports the engine error-state (register values that was read) by
+ * logging them into the shared GuC log buffer using these hierarchy
+ * of structures.
+ */
+struct guc_state_capture_header_t {
+	u32 owner;
+#define CAP_HDR_CAPTURE_VFID GENMASK(7, 0)
+	u32 info;
+#define CAP_HDR_CAPTURE_TYPE GENMASK(3, 0) /* see enum guc_capture_type */
+#define CAP_HDR_ENGINE_CLASS GENMASK(7, 4) /* see GUC_MAX_ENGINE_CLASSES */
+#define CAP_HDR_ENGINE_INSTANCE GENMASK(11, 8)
+	u32 lrca; /* if type-instance, LRCA (address) that hung, else set to ~0 */
+	u32 guc_id; /* if type-instance, context index of hung context, else set to ~0 */
+	u32 num_mmios;
+#define CAP_HDR_NUM_MMIOS GENMASK(9, 0)
+} __packed;
+
+struct guc_state_capture_t {
+	struct guc_state_capture_header_t header;
+	struct guc_mmio_reg mmio_entries[0];
+} __packed;
+
+enum guc_capture_group_types {
+	GUC_STATE_CAPTURE_GROUP_TYPE_FULL,
+	GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL,
+	GUC_STATE_CAPTURE_GROUP_TYPE_MAX,
+};
+
+struct guc_state_capture_group_header_t {
+	u32 owner;
+#define CAP_GRP_HDR_CAPTURE_VFID GENMASK(7, 0)
+	u32 info;
+#define CAP_GRP_HDR_NUM_CAPTURES GENMASK(7, 0)
+#define CAP_GRP_HDR_CAPTURE_TYPE GENMASK(15, 8) /* guc_capture_group_types */
+} __packed;
+
+/* this is the top level structure where an error-capture dump starts */
+struct guc_state_capture_group_t {
+	struct guc_state_capture_group_header_t grp_header;
+	struct guc_state_capture_t capture_entries[0];
+} __packed;
+
 /**
  * struct __guc_capture_ads_cache
  *
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Alan Previn <alan.previn.teres.alexis@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>,
	Jani Nikula <jani.nikula@intel.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v13 06/13] drm/i915/guc: Add GuC's error state capture output structures.
Date: Mon, 21 Mar 2022 09:45:20 -0700	[thread overview]
Message-ID: <20220321164527.2500062-7-alan.previn.teres.alexis@intel.com> (raw)
In-Reply-To: <20220321164527.2500062-1-alan.previn.teres.alexis@intel.com>

Add GuC's error capture output structures and definitions as how
they would appear in GuC log buffer's error capture subregion after
an error state capture G2H event notification.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
index 6c199433945d..8824c5eba355 100644
--- a/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
@@ -55,6 +55,53 @@ struct __guc_mmio_reg_descr_group {
 	struct __guc_mmio_reg_descr *extlist; /* only used for steered registers */
 };
 
+/**
+ * struct guc_state_capture_header_t / struct guc_state_capture_t /
+ * guc_state_capture_group_header_t / guc_state_capture_group_t
+ *
+ * Prior to resetting engines that have hung or faulted, GuC microkernel
+ * reports the engine error-state (register values that was read) by
+ * logging them into the shared GuC log buffer using these hierarchy
+ * of structures.
+ */
+struct guc_state_capture_header_t {
+	u32 owner;
+#define CAP_HDR_CAPTURE_VFID GENMASK(7, 0)
+	u32 info;
+#define CAP_HDR_CAPTURE_TYPE GENMASK(3, 0) /* see enum guc_capture_type */
+#define CAP_HDR_ENGINE_CLASS GENMASK(7, 4) /* see GUC_MAX_ENGINE_CLASSES */
+#define CAP_HDR_ENGINE_INSTANCE GENMASK(11, 8)
+	u32 lrca; /* if type-instance, LRCA (address) that hung, else set to ~0 */
+	u32 guc_id; /* if type-instance, context index of hung context, else set to ~0 */
+	u32 num_mmios;
+#define CAP_HDR_NUM_MMIOS GENMASK(9, 0)
+} __packed;
+
+struct guc_state_capture_t {
+	struct guc_state_capture_header_t header;
+	struct guc_mmio_reg mmio_entries[0];
+} __packed;
+
+enum guc_capture_group_types {
+	GUC_STATE_CAPTURE_GROUP_TYPE_FULL,
+	GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL,
+	GUC_STATE_CAPTURE_GROUP_TYPE_MAX,
+};
+
+struct guc_state_capture_group_header_t {
+	u32 owner;
+#define CAP_GRP_HDR_CAPTURE_VFID GENMASK(7, 0)
+	u32 info;
+#define CAP_GRP_HDR_NUM_CAPTURES GENMASK(7, 0)
+#define CAP_GRP_HDR_CAPTURE_TYPE GENMASK(15, 8) /* guc_capture_group_types */
+} __packed;
+
+/* this is the top level structure where an error-capture dump starts */
+struct guc_state_capture_group_t {
+	struct guc_state_capture_group_header_t grp_header;
+	struct guc_state_capture_t capture_entries[0];
+} __packed;
+
 /**
  * struct __guc_capture_ads_cache
  *
-- 
2.25.1


  parent reply	other threads:[~2022-03-21 16:43 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-21 16:45 [PATCH v13 00/13] Add GuC Error Capture Support Alan Previn
2022-03-21 16:45 ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 01/13] drm/i915/guc: Update GuC ADS size for error capture lists Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 02/13] drm/i915/guc: Add XE_LP static registers for GuC error capture Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 03/13] drm/i915/guc: Add XE_LP steered register lists support Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 04/13] drm/i915/guc: Add DG2 registers for GuC error state capture Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 05/13] drm/i915/guc: Add Gen9 " Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` Alan Previn [this message]
2022-03-21 16:45   ` [Intel-gfx] [PATCH v13 06/13] drm/i915/guc: Add GuC's error state capture output structures Alan Previn
2022-03-21 16:45 ` [PATCH v13 07/13] drm/i915/guc: Update GuC-log relay function names Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [Intel-gfx] [PATCH v13 08/13] drm/i915/guc: Add capture region into intel_guc_log Alan Previn
2022-03-21 16:45   ` Alan Previn
2022-03-21 16:45 ` [PATCH v13 09/13] drm/i915/guc: Check sizing of guc_capture output Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-22 16:55   ` Lucas De Marchi
2022-03-21 16:45 ` [PATCH v13 10/13] drm/i915/guc: Extract GuC error capture lists on G2H notification Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 11/13] drm/i915/guc: Pre-allocate output nodes for extraction Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 12/13] drm/i915/guc: Plumb GuC-capture into gpu_coredump Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 16:45 ` [PATCH v13 13/13] drm/i915/guc: Print the GuC error capture output register list Alan Previn
2022-03-21 16:45   ` [Intel-gfx] " Alan Previn
2022-03-21 21:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support Patchwork
2022-03-21 21:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-21 22:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-22  8:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-03-22 17:57 ` [PATCH v13 00/13] " Lucas De Marchi
2022-03-22 17:57   ` [Intel-gfx] " Lucas De Marchi
2022-03-23 13:19 ` Tvrtko Ursulin
2022-03-23 13:19   ` [Intel-gfx] " Tvrtko Ursulin
2022-04-05  7:56   ` Tvrtko Ursulin
2022-04-05  7:56     ` Tvrtko Ursulin

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