* [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests
@ 2022-03-22 8:25 Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
` (3 more replies)
0 siblings, 4 replies; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 8:25 UTC (permalink / raw)
To: igt-dev
Introduce two new subtests - ctrl-surf-copy-new-ctx + suspend-resume.
ctrl-surf-copy-new-ctx checks ccs data is binded to physical mem.
suspend-resume checks S0 suspend state.
v2 Adding separate allocator handle for new context (Zbigniew)
v3 Address review comments (Kamil)
v4 Remove memory leak (Kamil)
v5 Add igt_describe (Kamil)
v6 Fix incorrect ahnd usage - should be surf_ahnd (Kamil)
Apoorva Singh (2):
tests/i915/gem_ccs: Check ctrl-surf-copy in new context
tests/i915/gem_ccs: Add suspend-resume subtest
tests/i915/gem_ccs.c | 101 ++++++++++++++++++++++++++++++++++++-------
1 file changed, 86 insertions(+), 15 deletions(-)
--
2.32.0
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-22 8:25 ` Zbigniew Kempczyński
2022-03-22 11:54 ` Kamil Konieczny
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
` (2 subsequent siblings)
3 siblings, 1 reply; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 8:25 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 52 ++++++++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..b697ea56f9 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ surf_ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,16 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_describe("Check flatccs data are physically tagged and visible"
+ " in different contexts");
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-22 8:25 ` Zbigniew Kempczyński
2022-03-22 11:56 ` Kamil Konieczny
2022-03-22 9:21 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev6) Patchwork
2022-03-22 16:53 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 1 reply; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 8:25 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify flatccs data won't be corrupted when device will be put
to S0 (s2idle) state.
v2: addressing review comments (Kamil)
v3: fix memory leak (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 51 +++++++++++++++++++++++++++++++++++++++-----
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index b697ea56f9..4ecb3e36ac 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -4,6 +4,7 @@
*/
#include <errno.h>
+#include <glib.h>
#include <sys/ioctl.h>
#include <sys/time.h>
#include <malloc.h>
@@ -40,6 +41,7 @@ struct test_config {
bool inplace;
bool surfcopy;
bool new_ctx;
+ bool suspend_resume;
};
static void set_object(struct blt_copy_object *obj,
@@ -162,22 +164,23 @@ static void surf_copy(int i915,
const struct blt_copy_object *src,
const struct blt_copy_object *mid,
const struct blt_copy_object *dst,
- int run_id)
+ int run_id, bool suspend_resume)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {};
struct blt_ctrl_surf_copy_data surf = {};
- uint32_t bb, ccs, *ccsmap;
- uint64_t bb_size = 4096;
- uint64_t ccssize = mid->size / CCS_RATIO;
+ uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
+ uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
uint32_t *ccscopy;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
int result;
igt_assert(mid->compression);
ccscopy = (uint32_t *) malloc(ccssize);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
ccs = gem_create(i915, ccssize);
+ ccs2 = gem_create(i915, ccssize);
surf.i915 = i915;
surf.print_bb = param.print_bb;
@@ -193,6 +196,33 @@ static void surf_copy(int i915,
PROT_READ | PROT_WRITE);
memcpy(ccscopy, ccsmap, ccssize);
+ if (suspend_resume) {
+ char *orig, *orig2, *newsum, *newsum2;
+
+ orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
+ orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
+
+ set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
+ 0, DIRECT_ACCESS);
+ blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
+ gem_sync(i915, surf.dst.handle);
+
+ ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
+ PROT_READ | PROT_WRITE);
+ newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
+ newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
+
+ munmap(ccsmap2, ccssize);
+ igt_assert(!strcmp(orig, newsum));
+ igt_assert(!strcmp(orig2, newsum2));
+ g_free(orig);
+ g_free(orig2);
+ g_free(newsum);
+ g_free(newsum2);
+ }
+
/* corrupt ccs */
for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
ccsmap[i] = i;
@@ -209,6 +239,7 @@ static void surf_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
+ bb_size = 4096;
bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
@@ -311,7 +342,8 @@ static void block_copy(int i915,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
}
- surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id,
+ config->suspend_resume);
if (surf_ctx != ctx) {
intel_ctx_destroy(i915, surf_ctx);
@@ -510,6 +542,15 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_describe("Check flatccs data persists after suspend / resume (S0)");
+ igt_subtest_with_dynamic("suspend-resume") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .suspend_resume = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev6)
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-22 9:21 ` Patchwork
2022-03-22 16:53 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2022-03-22 9:21 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 4575 bytes --]
== Series Details ==
Series: Add two gem-ccs subtests (rev6)
URL : https://patchwork.freedesktop.org/series/101472/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> IGTPW_6811
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/index.html
Participating hosts (49 -> 44)
------------------------------
Additional (2): bat-adlm-1 bat-jsl-2
Missing (7): shard-tglu fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 shard-rkl shard-dg1 fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_6811:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live@coherency:
- {bat-rpls-2}: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/bat-rpls-2/igt@i915_selftest@live@coherency.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/bat-rpls-2/igt@i915_selftest@live@coherency.html
Known issues
------------
Here are the changes found in IGTPW_6811 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/fi-blb-e6850/igt@i915_selftest@live@requests.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/fi-blb-e6850/igt@i915_selftest@live@requests.html
#### Possible fixes ####
* igt@kms_busy@basic@flip:
- {bat-adlp-6}: [DMESG-WARN][5] ([i915#3576]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/bat-adlp-6/igt@kms_busy@basic@flip.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/bat-adlp-6/igt@kms_busy@basic@flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5339]: https://gitlab.freedesktop.org/drm/intel/issues/5339
[i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
[i915#5342]: https://gitlab.freedesktop.org/drm/intel/issues/5342
[i915#5361]: https://gitlab.freedesktop.org/drm/intel/issues/5361
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6387 -> IGTPW_6811
CI-20190529: 20190529
CI_DRM_11395: a678f97326454b60ffbbde6abf52d23997d71a27 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_6811: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/index.html
IGT_6387: 04d012b18355b53798af5a55a8915afb1a421bba @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Testlist changes ==
+igt@gem_ccs@ctrl-surf-copy-new-ctx
+igt@gem_ccs@suspend-resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/index.html
[-- Attachment #2: Type: text/html, Size: 3552 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-22 11:54 ` Kamil Konieczny
0 siblings, 0 replies; 15+ messages in thread
From: Kamil Konieczny @ 2022-03-22 11:54 UTC (permalink / raw)
To: igt-dev
Dnia 2022-03-22 at 09:25:17 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify ccs data is binded to physical memory by using
> XY_CTRL_SURF_COPY_BLT command in separate context.
>
> v2: add separate allocator handle for new context (Zbigniew)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 52 ++++++++++++++++++++++++++++++++++----------
> 1 file changed, 41 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index fdf1fe75f5..b697ea56f9 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -39,6 +39,7 @@ struct test_config {
> bool compression;
> bool inplace;
> bool surfcopy;
> + bool new_ctx;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -234,9 +235,8 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling, bool compression,
> - bool inplace,
> - bool surfcopy)
> + enum blt_tiling mid_tiling,
> + const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {}, *pext = &ext;
> @@ -249,7 +249,7 @@ static void block_copy(int i915,
> uint32_t run_id = mid_tiling;
> uint32_t mid_region = region2, bb;
> uint32_t width = param.width, height = param.height;
> - enum blt_compression mid_compression = compression;
> + enum blt_compression mid_compression = config->compression;
> int mid_compression_format = param.compression_format;
> enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> @@ -293,8 +293,31 @@ static void block_copy(int i915,
> WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
> WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
>
> - if (surfcopy && pext)
> - surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
> + if (config->surfcopy && pext) {
> + const intel_ctx_t *surf_ctx = ctx;
> + uint64_t surf_ahnd = ahnd;
> + struct intel_execution_engine2 surf_e = *e;
> +
> + if (config->new_ctx) {
> + intel_ctx_cfg_t cfg = {};
> +
> + cfg.num_engines = 1;
> + cfg.engines[0].engine_class = e->class;
> + cfg.engines[0].engine_instance = e->instance;
> + surf_ctx = intel_ctx_create(i915, &cfg);
> + surf_e.flags = 0;
> + surf_ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + }
> +
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> +
> + if (surf_ctx != ctx) {
> + intel_ctx_destroy(i915, surf_ctx);
> + put_ahnd(surf_ahnd);
> + }
> + }
>
> memset(&blt, 0, sizeof(blt));
> blt.color_depth = CD_32bit;
> @@ -303,7 +326,7 @@ static void block_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
> - if (inplace) {
> + if (config->inplace) {
> set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
> T_LINEAR, COMPRESSION_DISABLED, comp_type);
> blt.dst.ptr = mid->ptr;
> @@ -367,10 +390,7 @@ static void block_copy_test(int i915,
> param.compression_format, regtxt) {
> block_copy(i915, ctx, e,
> region1, region2,
> - tiling,
> - config->compression,
> - config->inplace,
> - config->surfcopy);
> + tiling, config);
> }
> free(regtxt);
> }
> @@ -480,6 +500,16 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_describe("Check flatccs data are physically tagged and visible"
> + " in different contexts");
> + igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .new_ctx = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
--
Kamil
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
@ 2022-03-22 11:56 ` Kamil Konieczny
0 siblings, 0 replies; 15+ messages in thread
From: Kamil Konieczny @ 2022-03-22 11:56 UTC (permalink / raw)
To: igt-dev
Dnia 2022-03-22 at 09:25:18 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify flatccs data won't be corrupted when device will be put
> to S0 (s2idle) state.
>
> v2: addressing review comments (Kamil)
> v3: fix memory leak (Kamil)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 51 +++++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 46 insertions(+), 5 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index b697ea56f9..4ecb3e36ac 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -4,6 +4,7 @@
> */
>
> #include <errno.h>
> +#include <glib.h>
> #include <sys/ioctl.h>
> #include <sys/time.h>
> #include <malloc.h>
> @@ -40,6 +41,7 @@ struct test_config {
> bool inplace;
> bool surfcopy;
> bool new_ctx;
> + bool suspend_resume;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -162,22 +164,23 @@ static void surf_copy(int i915,
> const struct blt_copy_object *src,
> const struct blt_copy_object *mid,
> const struct blt_copy_object *dst,
> - int run_id)
> + int run_id, bool suspend_resume)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {};
> struct blt_ctrl_surf_copy_data surf = {};
> - uint32_t bb, ccs, *ccsmap;
> - uint64_t bb_size = 4096;
> - uint64_t ccssize = mid->size / CCS_RATIO;
> + uint32_t bb, ccs, ccs2, *ccsmap, *ccsmap2;
> + uint64_t bb_size, ccssize = mid->size / CCS_RATIO;
> uint32_t *ccscopy;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> int result;
>
> igt_assert(mid->compression);
> ccscopy = (uint32_t *) malloc(ccssize);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> ccs = gem_create(i915, ccssize);
> + ccs2 = gem_create(i915, ccssize);
>
> surf.i915 = i915;
> surf.print_bb = param.print_bb;
> @@ -193,6 +196,33 @@ static void surf_copy(int i915,
> PROT_READ | PROT_WRITE);
> memcpy(ccscopy, ccsmap, ccssize);
>
> + if (suspend_resume) {
> + char *orig, *orig2, *newsum, *newsum2;
> +
> + orig = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap, surf.dst.size);
> + orig2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + igt_system_suspend_autoresume(SUSPEND_STATE_FREEZE, SUSPEND_TEST_NONE);
> +
> + set_surf_object(&surf.dst, ccs2, REGION_SMEM, ccssize,
> + 0, DIRECT_ACCESS);
> + blt_ctrl_surf_copy(i915, ctx, e, ahnd, &surf);
> + gem_sync(i915, surf.dst.handle);
> +
> + ccsmap2 = gem_mmap__device_coherent(i915, ccs2, 0, surf.dst.size,
> + PROT_READ | PROT_WRITE);
> + newsum = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)ccsmap2, surf.dst.size);
> + newsum2 = g_compute_checksum_for_data(G_CHECKSUM_SHA1, (void *)mid->ptr, mid->size);
> +
> + munmap(ccsmap2, ccssize);
> + igt_assert(!strcmp(orig, newsum));
> + igt_assert(!strcmp(orig2, newsum2));
> + g_free(orig);
> + g_free(orig2);
> + g_free(newsum);
> + g_free(newsum2);
> + }
> +
> /* corrupt ccs */
> for (int i = 0; i < surf.dst.size / sizeof(uint32_t); i++)
> ccsmap[i] = i;
> @@ -209,6 +239,7 @@ static void surf_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid->compression_type, mid->x2, mid->y2, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, dst->x2, dst->y2, SURFACE_TYPE_2D);
> + bb_size = 4096;
> bb = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
> set_batch(&blt.bb, bb, bb_size, REGION_SMEM);
> blt_block_copy(i915, ctx, e, ahnd, &blt, &ext);
> @@ -311,7 +342,8 @@ static void block_copy(int i915,
> ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> }
>
> - surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id,
> + config->suspend_resume);
>
> if (surf_ctx != ctx) {
> intel_ctx_destroy(i915, surf_ctx);
> @@ -510,6 +542,15 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_describe("Check flatccs data persists after suspend / resume (S0)");
> + igt_subtest_with_dynamic("suspend-resume") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .suspend_resume = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
--
Kamil
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for Add two gem-ccs subtests (rev6)
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
` (2 preceding siblings ...)
2022-03-22 9:21 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev6) Patchwork
@ 2022-03-22 16:53 ` Patchwork
3 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2022-03-22 16:53 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 30250 bytes --]
== Series Details ==
Series: Add two gem-ccs subtests (rev6)
URL : https://patchwork.freedesktop.org/series/101472/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395_full -> IGTPW_6811_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/index.html
Participating hosts (13 -> 8)
------------------------------
Missing (5): shard-skl pig-kbl-iris pig-glk-j5005 pig-skl-6260u shard-dg1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_6811_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ccs@ctrl-surf-copy-new-ctx}:
- {shard-tglu}: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglu-3/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* {igt@gem_ccs@suspend-resume}:
- shard-iclb: NOTRUN -> [SKIP][2] +1 similar issue
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb5/igt@gem_ccs@suspend-resume.html
- shard-tglb: NOTRUN -> [SKIP][3] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@gem_ccs@suspend-resume.html
* igt@i915_pm_rpm@system-suspend-devices:
- {shard-rkl}: [PASS][4] -> [FAIL][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-1/igt@i915_pm_rpm@system-suspend-devices.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@i915_pm_rpm@system-suspend-devices.html
* igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement:
- {shard-rkl}: [SKIP][6] ([fdo#112022] / [i915#4070]) -> [SKIP][7] +2 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-1/igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement.html
* igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding:
- {shard-rkl}: [SKIP][8] ([fdo#112022]) -> [SKIP][9] +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-5/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_crc@pipe-a-cursor-256x85-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-offscreen:
- {shard-rkl}: ([SKIP][10], [SKIP][11]) ([fdo#112022] / [i915#4070]) -> [SKIP][12]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-4/igt@kms_cursor_crc@pipe-b-cursor-128x128-offscreen.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-1/igt@kms_cursor_crc@pipe-b-cursor-128x128-offscreen.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_crc@pipe-b-cursor-128x128-offscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-64x64-random:
- {shard-rkl}: [SKIP][13] ([i915#4070]) -> [SKIP][14] +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-6/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
* igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge:
- {shard-rkl}: ([SKIP][15], [SKIP][16]) ([i915#1849] / [i915#4098]) -> [SKIP][17]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-4/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-5/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html
* igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge:
- {shard-rkl}: [SKIP][18] ([i915#1849] / [i915#4070] / [i915#4098]) -> [SKIP][19] +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-1/igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt:
- {shard-rkl}: NOTRUN -> [SKIP][20] +21 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt:
- {shard-rkl}: [SKIP][21] ([fdo#111825] / [i915#1825]) -> [SKIP][22] +2 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render:
- {shard-rkl}: [SKIP][23] ([i915#1849]) -> [SKIP][24] +17 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_pipe_crc_basic@read-crc-pipe-b:
- {shard-rkl}: [SKIP][25] ([i915#1849] / [i915#4098]) -> [SKIP][26] +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-rkl-5/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-rkl-3/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
Known issues
------------
Here are the changes found in IGTPW_6811_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@processes:
- shard-snb: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#1099])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-snb2/igt@gem_ctx_persistence@processes.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-tglb: NOTRUN -> [SKIP][28] ([i915#280]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk: [PASS][29] -> [FAIL][30] ([i915#2842])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-glk1/igt@gem_exec_fair@basic-none-share@rcs0.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk8/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][31] ([i915#2842])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][32] ([i915#2842]) +4 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb1/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: NOTRUN -> [FAIL][33] ([i915#2842])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk3/igt@gem_exec_fair@basic-throttle@rcs0.html
- shard-iclb: [PASS][34] -> [FAIL][35] ([i915#2842])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-iclb3/igt@gem_exec_fair@basic-throttle@rcs0.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#109313])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_params@no-blt:
- shard-tglb: NOTRUN -> [SKIP][37] ([fdo#109283])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb7/igt@gem_exec_params@no-blt.html
- shard-iclb: NOTRUN -> [SKIP][38] ([fdo#109283])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb6/igt@gem_exec_params@no-blt.html
* igt@gem_lmem_swapping@basic:
- shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#4613]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl3/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@heavy-random:
- shard-iclb: NOTRUN -> [SKIP][40] ([i915#4613]) +1 similar issue
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-glk: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#4613])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk8/igt@gem_lmem_swapping@parallel-random-engines.html
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#4613]) +3 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@verify-random:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#4613])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl3/igt@gem_lmem_swapping@verify-random.html
* igt@gem_media_vme:
- shard-tglb: NOTRUN -> [SKIP][44] ([i915#284])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb2/igt@gem_media_vme.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#4270]) +4 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb7/igt@gem_pxp@regular-baseline-src-copy-readible.html
- shard-iclb: NOTRUN -> [SKIP][46] ([i915#4270]) +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb3/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
- shard-glk: NOTRUN -> [SKIP][47] ([fdo#109271]) +108 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk5/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
- shard-iclb: NOTRUN -> [SKIP][48] ([i915#768])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb7/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_userptr_blits@access-control:
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#3297])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb2/igt@gem_userptr_blits@access-control.html
- shard-iclb: NOTRUN -> [SKIP][50] ([i915#3297])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb7/igt@gem_userptr_blits@access-control.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#3323])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl6/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-glk: NOTRUN -> [DMESG-WARN][52] ([i915#4991])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk2/igt@gem_userptr_blits@input-checking.html
* igt@gen9_exec_parse@batch-without-end:
- shard-iclb: NOTRUN -> [SKIP][53] ([i915#2856]) +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb5/igt@gen9_exec_parse@batch-without-end.html
* igt@gen9_exec_parse@bb-start-param:
- shard-tglb: NOTRUN -> [SKIP][54] ([i915#2527] / [i915#2856]) +2 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb6/igt@gen9_exec_parse@bb-start-param.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-tglb: NOTRUN -> [SKIP][55] ([i915#1904])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
- shard-iclb: NOTRUN -> [SKIP][56] ([i915#658])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc9-dpms:
- shard-apl: [PASS][57] -> [SKIP][58] ([fdo#109271])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-apl2/igt@i915_pm_dc@dc9-dpms.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl1/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_lpsp@screens-disabled:
- shard-tglb: NOTRUN -> [SKIP][59] ([i915#1902])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb6/igt@i915_pm_lpsp@screens-disabled.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-tglb: NOTRUN -> [WARN][60] ([i915#2681] / [i915#2684])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-iclb: NOTRUN -> [SKIP][61] ([fdo#110892]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb6/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- shard-tglb: NOTRUN -> [SKIP][62] ([fdo#111644] / [i915#1397] / [i915#2411]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb6/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
* igt@i915_pm_sseu@full-enable:
- shard-iclb: NOTRUN -> [SKIP][63] ([i915#4387])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb5/igt@i915_pm_sseu@full-enable.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-iclb: NOTRUN -> [SKIP][64] ([i915#1769])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
- shard-tglb: NOTRUN -> [SKIP][65] ([i915#1769])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][66] ([i915#5286]) +5 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-iclb: NOTRUN -> [SKIP][67] ([i915#5286]) +4 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-16bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][68] ([fdo#111614]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb6/igt@kms_big_fb@linear-16bpp-rotate-270.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][69] ([fdo#110725] / [fdo#111614]) +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb4/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-glk: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#3777]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- shard-glk: [PASS][71] -> [FAIL][72] ([i915#1888])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-glk3/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk5/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-kbl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#3777]) +2 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
- shard-apl: NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#3777]) +1 similar issue
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-tglb: NOTRUN -> [SKIP][75] ([fdo#111615]) +10 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-iclb: NOTRUN -> [SKIP][76] ([fdo#110723]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_joiner@basic:
- shard-tglb: NOTRUN -> [SKIP][77] ([i915#2705])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@kms_big_joiner@basic.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#3886])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl3/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][79] ([i915#3689] / [i915#3886])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html
- shard-iclb: NOTRUN -> [SKIP][80] ([fdo#109278] / [i915#3886])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb3/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#3886]) +6 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl6/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#3886]) +1 similar issue
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk2/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][83] ([fdo#111615] / [i915#3689]) +8 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][84] ([i915#3689]) +9 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb1/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html
* igt@kms_chamelium@vga-frame-dump:
- shard-tglb: NOTRUN -> [SKIP][85] ([fdo#109284] / [fdo#111827]) +11 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@kms_chamelium@vga-frame-dump.html
* igt@kms_chamelium@vga-hpd-enable-disable-mode:
- shard-glk: NOTRUN -> [SKIP][86] ([fdo#109271] / [fdo#111827]) +6 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk5/igt@kms_chamelium@vga-hpd-enable-disable-mode.html
* igt@kms_color@pipe-b-deep-color:
- shard-tglb: NOTRUN -> [SKIP][87] ([i915#3555]) +3 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_color@pipe-b-deep-color.html
* igt@kms_color@pipe-c-deep-color:
- shard-iclb: NOTRUN -> [SKIP][88] ([fdo#109278] / [i915#3555])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@kms_color@pipe-c-deep-color.html
* igt@kms_color@pipe-d-ctm-0-75:
- shard-iclb: NOTRUN -> [SKIP][89] ([fdo#109278] / [i915#1149])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb8/igt@kms_color@pipe-d-ctm-0-75.html
* igt@kms_color_chamelium@pipe-a-ctm-max:
- shard-iclb: NOTRUN -> [SKIP][90] ([fdo#109284] / [fdo#111827]) +5 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@kms_color_chamelium@pipe-a-ctm-max.html
- shard-apl: NOTRUN -> [SKIP][91] ([fdo#109271] / [fdo#111827]) +5 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl4/igt@kms_color_chamelium@pipe-a-ctm-max.html
* igt@kms_color_chamelium@pipe-a-degamma:
- shard-kbl: NOTRUN -> [SKIP][92] ([fdo#109271] / [fdo#111827]) +9 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl1/igt@kms_color_chamelium@pipe-a-degamma.html
* igt@kms_color_chamelium@pipe-b-ctm-max:
- shard-snb: NOTRUN -> [SKIP][93] ([fdo#109271] / [fdo#111827]) +2 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-snb5/igt@kms_color_chamelium@pipe-b-ctm-max.html
* igt@kms_color_chamelium@pipe-d-ctm-max:
- shard-iclb: NOTRUN -> [SKIP][94] ([fdo#109278] / [fdo#109284] / [fdo#111827])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb6/igt@kms_color_chamelium@pipe-d-ctm-max.html
* igt@kms_content_protection@type1:
- shard-iclb: NOTRUN -> [SKIP][95] ([fdo#109300] / [fdo#111066])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@kms_content_protection@type1.html
- shard-tglb: NOTRUN -> [SKIP][96] ([i915#1063])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb6/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@pipe-a-cursor-32x10-offscreen:
- shard-tglb: NOTRUN -> [SKIP][97] ([i915#3359]) +3 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb1/igt@kms_cursor_crc@pipe-a-cursor-32x10-offscreen.html
* igt@kms_cursor_crc@pipe-a-cursor-32x32-sliding:
- shard-tglb: NOTRUN -> [SKIP][98] ([i915#3319]) +5 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-32x32-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen:
- shard-iclb: NOTRUN -> [SKIP][99] ([fdo#109278] / [fdo#109279]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb1/igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding:
- shard-tglb: NOTRUN -> [SKIP][100] ([fdo#109279] / [i915#3359]) +4 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-iclb: NOTRUN -> [SKIP][101] ([fdo#109274] / [fdo#109278]) +2 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-kbl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#533]) +4 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl3/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-tglb: NOTRUN -> [SKIP][103] ([i915#4103])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled:
- shard-tglb: NOTRUN -> [SKIP][104] ([i915#5287]) +3 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb2/igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled.html
* igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-4tiled:
- shard-iclb: NOTRUN -> [SKIP][105] ([i915#5287]) +2 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-4tiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][106] -> [FAIL][107] ([i915#79])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-iclb: NOTRUN -> [SKIP][108] ([fdo#109274])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb4/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-tglb: NOTRUN -> [SKIP][109] ([fdo#109274] / [fdo#111825]) +6 similar issues
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [PASS][110] -> [DMESG-WARN][111] ([i915#180]) +2 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-tglb: NOTRUN -> [SKIP][112] ([i915#2587])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-glk: [PASS][113] -> [FAIL][114] ([i915#4911])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-glk2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-iclb: NOTRUN -> [SKIP][115] ([fdo#109280]) +26 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][116] ([fdo#109271]) +211 similar issues
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-snb: NOTRUN -> [SKIP][117] ([fdo#109271]) +105 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][118] ([fdo#109280] / [fdo#111825]) +40 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
- shard-apl: NOTRUN -> [SKIP][119] ([fdo#109271]) +116 similar issues
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_hdmi_inject@inject-audio:
- shard-tglb: [PASS][120] -> [SKIP][121] ([i915#433])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11395/shard-tglb7/igt@kms_hdmi_inject@inject-audio.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb1/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@static-toggle-suspend:
- shard-iclb: NOTRUN -> [SKIP][122] ([i915#3555])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb2/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
- shard-tglb: NOTRUN -> [SKIP][123] ([fdo#109289]) +1 similar issue
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-tglb8/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-iclb: NOTRUN -> [SKIP][124] ([fdo#109278]) +43 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-iclb1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
- shard-apl: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#533]) +1 similar issue
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
- shard-glk: NOTRUN -> [SKIP][126] ([fdo#109271] / [i915#533])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-glk9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-apl: NOTRUN -> [FAIL][127] ([fdo#108145] / [i915#265]) +1 similar issue
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-glk: NOTRUN -> [FAIL][128] ([fdo#108145] / [i915#265])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/shard-gl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6811/index.html
[-- Attachment #2: Type: text/html, Size: 33775 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-22 6:59 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-22 6:59 ` Zbigniew Kempczyński
0 siblings, 0 replies; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-22 6:59 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 52 ++++++++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..28711bdc59 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,16 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_describe("Check flatccs data are physically tagged and visible"
+ " in different contexts");
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-21 11:11 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-21 16:00 ` Kamil Konieczny
0 siblings, 0 replies; 15+ messages in thread
From: Kamil Konieczny @ 2022-03-21 16:00 UTC (permalink / raw)
To: igt-dev
Hi,
there is only description missed (see below) and one line change
in 2/2 which imho should be here in 1/2.
Dnia 2022-03-21 at 12:11:29 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify ccs data is binded to physical memory by using
> XY_CTRL_SURF_COPY_BLT command in separate context.
>
> v2: add separate allocator handle for new context (Zbigniew)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
> 1 file changed, 39 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index fdf1fe75f5..7e104f6ad8 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -39,6 +39,7 @@ struct test_config {
> bool compression;
> bool inplace;
> bool surfcopy;
> + bool new_ctx;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -234,9 +235,8 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling, bool compression,
> - bool inplace,
> - bool surfcopy)
> + enum blt_tiling mid_tiling,
> + const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {}, *pext = &ext;
> @@ -249,7 +249,7 @@ static void block_copy(int i915,
> uint32_t run_id = mid_tiling;
> uint32_t mid_region = region2, bb;
> uint32_t width = param.width, height = param.height;
> - enum blt_compression mid_compression = compression;
> + enum blt_compression mid_compression = config->compression;
> int mid_compression_format = param.compression_format;
> enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> @@ -293,8 +293,31 @@ static void block_copy(int i915,
> WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
> WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
>
> - if (surfcopy && pext)
> - surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
> + if (config->surfcopy && pext) {
> + const intel_ctx_t *surf_ctx = ctx;
> + uint64_t surf_ahnd = ahnd;
> + struct intel_execution_engine2 surf_e = *e;
> +
> + if (config->new_ctx) {
> + intel_ctx_cfg_t cfg = {};
> +
> + cfg.num_engines = 1;
> + cfg.engines[0].engine_class = e->class;
> + cfg.engines[0].engine_instance = e->instance;
> + surf_ctx = intel_ctx_create(i915, &cfg);
> + surf_e.flags = 0;
> + ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + }
> +
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
-------------------------------------------------- ^
Why suspend/resume in 2/2 change this into ahand ? Imho this
change should be done here.
> +
> + if (surf_ctx != ctx) {
> + intel_ctx_destroy(i915, surf_ctx);
> + put_ahnd(surf_ahnd);
> + }
> + }
>
> memset(&blt, 0, sizeof(blt));
> blt.color_depth = CD_32bit;
> @@ -303,7 +326,7 @@ static void block_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
> - if (inplace) {
> + if (config->inplace) {
> set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
> T_LINEAR, COMPRESSION_DISABLED, comp_type);
> blt.dst.ptr = mid->ptr;
> @@ -367,10 +390,7 @@ static void block_copy_test(int i915,
> param.compression_format, regtxt) {
> block_copy(i915, ctx, e,
> region1, region2,
> - tiling,
> - config->compression,
> - config->inplace,
> - config->surfcopy);
> + tiling, config);
> }
> free(regtxt);
> }
> @@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
Add description before new test.
> + igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .new_ctx = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Regards,
Kamil
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-21 11:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-21 11:11 ` Zbigniew Kempczyński
2022-03-21 16:00 ` Kamil Konieczny
0 siblings, 1 reply; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-21 11:11 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..7e104f6ad8 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-21 7:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-21 7:11 ` Zbigniew Kempczyński
0 siblings, 0 replies; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-21 7:11 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..7e104f6ad8 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-18 9:45 ` Kamil Konieczny
0 siblings, 0 replies; 15+ messages in thread
From: Kamil Konieczny @ 2022-03-18 9:45 UTC (permalink / raw)
To: igt-dev
Dnia 2022-03-18 at 08:30:17 +0100, Zbigniew Kempczyński napisał(a):
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify ccs data is binded to physical memory by using
> XY_CTRL_SURF_COPY_BLT command in separate context.
>
> v2: add separate allocator handle for new context (Zbigniew)
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
> 1 file changed, 39 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index fdf1fe75f5..7e104f6ad8 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -39,6 +39,7 @@ struct test_config {
> bool compression;
> bool inplace;
> bool surfcopy;
> + bool new_ctx;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -234,9 +235,8 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling, bool compression,
> - bool inplace,
> - bool surfcopy)
> + enum blt_tiling mid_tiling,
> + const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {}, *pext = &ext;
> @@ -249,7 +249,7 @@ static void block_copy(int i915,
> uint32_t run_id = mid_tiling;
> uint32_t mid_region = region2, bb;
> uint32_t width = param.width, height = param.height;
> - enum blt_compression mid_compression = compression;
> + enum blt_compression mid_compression = config->compression;
> int mid_compression_format = param.compression_format;
> enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> @@ -293,8 +293,31 @@ static void block_copy(int i915,
> WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
> WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
>
> - if (surfcopy && pext)
> - surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
> + if (config->surfcopy && pext) {
> + const intel_ctx_t *surf_ctx = ctx;
> + uint64_t surf_ahnd = ahnd;
> + struct intel_execution_engine2 surf_e = *e;
> +
> + if (config->new_ctx) {
> + intel_ctx_cfg_t cfg = {};
> +
> + cfg.num_engines = 1;
> + cfg.engines[0].engine_class = e->class;
> + cfg.engines[0].engine_instance = e->instance;
> + surf_ctx = intel_ctx_create(i915, &cfg);
> + surf_e.flags = 0;
> + ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
> + INTEL_ALLOCATOR_SIMPLE,
> + ALLOC_STRATEGY_LOW_TO_HIGH, 0);
> + }
> +
> + surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
> +
> + if (surf_ctx != ctx) {
> + intel_ctx_destroy(i915, surf_ctx);
> + put_ahnd(surf_ahnd);
> + }
> + }
>
> memset(&blt, 0, sizeof(blt));
> blt.color_depth = CD_32bit;
> @@ -303,7 +326,7 @@ static void block_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
> - if (inplace) {
> + if (config->inplace) {
> set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
> T_LINEAR, COMPRESSION_DISABLED, comp_type);
> blt.dst.ptr = mid->ptr;
> @@ -367,10 +390,7 @@ static void block_copy_test(int i915,
> param.compression_format, regtxt) {
> block_copy(i915, ctx, e,
> region1, region2,
> - tiling,
> - config->compression,
> - config->inplace,
> - config->surfcopy);
> + tiling, config);
> }
> free(regtxt);
> }
> @@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .new_ctx = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
--
Kamil
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-18 7:30 ` Zbigniew Kempczyński
2022-03-18 9:45 ` Kamil Konieczny
0 siblings, 1 reply; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-18 7:30 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
v2: add separate allocator handle for new context (Zbigniew)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 50 ++++++++++++++++++++++++++++++++++----------
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..7e104f6ad8 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,31 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+ uint64_t surf_ahnd = ahnd;
+ struct intel_execution_engine2 surf_e = *e;
+
+ if (config->new_ctx) {
+ intel_ctx_cfg_t cfg = {};
+
+ cfg.num_engines = 1;
+ cfg.engines[0].engine_class = e->class;
+ cfg.engines[0].engine_instance = e->instance;
+ surf_ctx = intel_ctx_create(i915, &cfg);
+ surf_e.flags = 0;
+ ahnd = intel_allocator_open_full(i915, surf_ctx->id, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_LOW_TO_HIGH, 0);
+ }
+
+ surf_copy(i915, surf_ctx, &surf_e, surf_ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx) {
+ intel_ctx_destroy(i915, surf_ctx);
+ put_ahnd(surf_ahnd);
+ }
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +326,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +390,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +500,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-17 10:20 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
@ 2022-03-17 16:45 ` Zbigniew Kempczyński
0 siblings, 0 replies; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-17 16:45 UTC (permalink / raw)
To: igt-dev
On Thu, Mar 17, 2022 at 11:20:01AM +0100, Zbigniew Kempczyński wrote:
> From: Apoorva Singh <apoorva1.singh@intel.com>
>
> Verify ccs data is binded to physical memory by using
> XY_CTRL_SURF_COPY_BLT command in separate context.
>
> Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_ccs.c | 36 +++++++++++++++++++++++++-----------
> 1 file changed, 25 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
> index fdf1fe75f5..1a21e24597 100644
> --- a/tests/i915/gem_ccs.c
> +++ b/tests/i915/gem_ccs.c
> @@ -39,6 +39,7 @@ struct test_config {
> bool compression;
> bool inplace;
> bool surfcopy;
> + bool new_ctx;
> };
>
> static void set_object(struct blt_copy_object *obj,
> @@ -234,9 +235,8 @@ static void block_copy(int i915,
> const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> uint32_t region1, uint32_t region2,
> - enum blt_tiling mid_tiling, bool compression,
> - bool inplace,
> - bool surfcopy)
> + enum blt_tiling mid_tiling,
> + const struct test_config *config)
> {
> struct blt_copy_data blt = {};
> struct blt_block_copy_data_ext ext = {}, *pext = &ext;
> @@ -249,7 +249,7 @@ static void block_copy(int i915,
> uint32_t run_id = mid_tiling;
> uint32_t mid_region = region2, bb;
> uint32_t width = param.width, height = param.height;
> - enum blt_compression mid_compression = compression;
> + enum blt_compression mid_compression = config->compression;
> int mid_compression_format = param.compression_format;
> enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
> uint8_t uc_mocs = intel_get_uc_mocs(i915);
> @@ -293,8 +293,17 @@ static void block_copy(int i915,
> WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
> WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
>
> - if (surfcopy && pext)
> - surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
> + if (config->surfcopy && pext) {
> + const intel_ctx_t *surf_ctx = ctx;
> +
> + if (config->new_ctx)
> + surf_ctx = intel_ctx_create(i915, &ctx->cfg);
> +
> + surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id);
There's one thing I would fix. Newly created context doesn't share vm
so separate ahnd should be used here.
--
Zbigniew
> +
> + if (surf_ctx != ctx)
> + intel_ctx_destroy(i915, surf_ctx);
> + }
>
> memset(&blt, 0, sizeof(blt));
> blt.color_depth = CD_32bit;
> @@ -303,7 +312,7 @@ static void block_copy(int i915,
> set_blt_object(&blt.dst, dst);
> set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
> set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
> - if (inplace) {
> + if (config->inplace) {
> set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
> T_LINEAR, COMPRESSION_DISABLED, comp_type);
> blt.dst.ptr = mid->ptr;
> @@ -367,10 +376,7 @@ static void block_copy_test(int i915,
> param.compression_format, regtxt) {
> block_copy(i915, ctx, e,
> region1, region2,
> - tiling,
> - config->compression,
> - config->inplace,
> - config->surfcopy);
> + tiling, config);
> }
> free(regtxt);
> }
> @@ -480,6 +486,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
> block_copy_test(i915, &config, ctx, set);
> }
>
> + igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
> + struct test_config config = { .compression = true,
> + .surfcopy = true,
> + .new_ctx = true };
> +
> + block_copy_test(i915, &config, ctx, set);
> + }
> +
> igt_fixture {
> igt_disallow_hang(i915, hang);
> close(i915);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context
2022-03-17 10:20 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
@ 2022-03-17 10:20 ` Zbigniew Kempczyński
2022-03-17 16:45 ` Zbigniew Kempczyński
0 siblings, 1 reply; 15+ messages in thread
From: Zbigniew Kempczyński @ 2022-03-17 10:20 UTC (permalink / raw)
To: igt-dev
From: Apoorva Singh <apoorva1.singh@intel.com>
Verify ccs data is binded to physical memory by using
XY_CTRL_SURF_COPY_BLT command in separate context.
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_ccs.c | 36 +++++++++++++++++++++++++-----------
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_ccs.c b/tests/i915/gem_ccs.c
index fdf1fe75f5..1a21e24597 100644
--- a/tests/i915/gem_ccs.c
+++ b/tests/i915/gem_ccs.c
@@ -39,6 +39,7 @@ struct test_config {
bool compression;
bool inplace;
bool surfcopy;
+ bool new_ctx;
};
static void set_object(struct blt_copy_object *obj,
@@ -234,9 +235,8 @@ static void block_copy(int i915,
const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
uint32_t region1, uint32_t region2,
- enum blt_tiling mid_tiling, bool compression,
- bool inplace,
- bool surfcopy)
+ enum blt_tiling mid_tiling,
+ const struct test_config *config)
{
struct blt_copy_data blt = {};
struct blt_block_copy_data_ext ext = {}, *pext = &ext;
@@ -249,7 +249,7 @@ static void block_copy(int i915,
uint32_t run_id = mid_tiling;
uint32_t mid_region = region2, bb;
uint32_t width = param.width, height = param.height;
- enum blt_compression mid_compression = compression;
+ enum blt_compression mid_compression = config->compression;
int mid_compression_format = param.compression_format;
enum blt_compression_type comp_type = COMPRESSION_TYPE_3D;
uint8_t uc_mocs = intel_get_uc_mocs(i915);
@@ -293,8 +293,17 @@ static void block_copy(int i915,
WRITE_PNG(i915, run_id, "src", &blt.src, width, height);
WRITE_PNG(i915, run_id, "mid", &blt.dst, width, height);
- if (surfcopy && pext)
- surf_copy(i915, ctx, e, ahnd, src, mid, dst, run_id);
+ if (config->surfcopy && pext) {
+ const intel_ctx_t *surf_ctx = ctx;
+
+ if (config->new_ctx)
+ surf_ctx = intel_ctx_create(i915, &ctx->cfg);
+
+ surf_copy(i915, surf_ctx, e, ahnd, src, mid, dst, run_id);
+
+ if (surf_ctx != ctx)
+ intel_ctx_destroy(i915, surf_ctx);
+ }
memset(&blt, 0, sizeof(blt));
blt.color_depth = CD_32bit;
@@ -303,7 +312,7 @@ static void block_copy(int i915,
set_blt_object(&blt.dst, dst);
set_object_ext(&ext.src, mid_compression_format, width, height, SURFACE_TYPE_2D);
set_object_ext(&ext.dst, 0, width, height, SURFACE_TYPE_2D);
- if (inplace) {
+ if (config->inplace) {
set_object(&blt.dst, mid->handle, dst->size, mid->region, 0,
T_LINEAR, COMPRESSION_DISABLED, comp_type);
blt.dst.ptr = mid->ptr;
@@ -367,10 +376,7 @@ static void block_copy_test(int i915,
param.compression_format, regtxt) {
block_copy(i915, ctx, e,
region1, region2,
- tiling,
- config->compression,
- config->inplace,
- config->surfcopy);
+ tiling, config);
}
free(regtxt);
}
@@ -480,6 +486,14 @@ igt_main_args("bf:pst:W:H:", NULL, help_str, opt_handler, NULL)
block_copy_test(i915, &config, ctx, set);
}
+ igt_subtest_with_dynamic("ctrl-surf-copy-new-ctx") {
+ struct test_config config = { .compression = true,
+ .surfcopy = true,
+ .new_ctx = true };
+
+ block_copy_test(i915, &config, ctx, set);
+ }
+
igt_fixture {
igt_disallow_hang(i915, hang);
close(i915);
--
2.32.0
^ permalink raw reply related [flat|nested] 15+ messages in thread
end of thread, other threads:[~2022-03-22 16:53 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-22 8:25 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-22 11:54 ` Kamil Konieczny
2022-03-22 8:25 ` [igt-dev] [PATCH i-g-t 2/2] tests/i915/gem_ccs: Add suspend-resume subtest Zbigniew Kempczyński
2022-03-22 11:56 ` Kamil Konieczny
2022-03-22 9:21 ` [igt-dev] ✓ Fi.CI.BAT: success for Add two gem-ccs subtests (rev6) Patchwork
2022-03-22 16:53 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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2022-03-22 6:59 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-22 6:59 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-21 11:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-21 11:11 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-21 16:00 ` Kamil Konieczny
2022-03-21 7:11 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-21 7:11 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-18 7:30 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-18 7:30 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-18 9:45 ` Kamil Konieczny
2022-03-17 10:20 [igt-dev] [PATCH i-g-t 0/2] Add two gem-ccs subtests Zbigniew Kempczyński
2022-03-17 10:20 ` [igt-dev] [PATCH i-g-t 1/2] tests/i915/gem_ccs: Check ctrl-surf-copy in new context Zbigniew Kempczyński
2022-03-17 16:45 ` Zbigniew Kempczyński
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