[Intel-gfx] [PATCH v2 00/12] drm/i915: Fix up DP DFP 4:2:0 handling more

[Intel-gfx] [PATCH v2 00/12] drm/i915: Fix up DP DFP 4:2:0 handling more

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we're failing to respect the sink's max TMDS clock
in the DP HDMI DFP code, and exceeding them means the sink
won't show a picture [1][2]. So let's improve the situation by
checking those limits, and generally fixing up a bunch things
in the deep color/4:2:0 related stuff for both native HDMI
and DP HDMI DFPs.

The end result is fairly unified apporach to this stuff on
both sides of the aisle. There's probably more we could try
to abstract to share even more code. But that will need a lot
of actual thought so leave it for later.

The high level algorithm is basically now:
for_each(respect TMDS clock limits, disrespect TMDS clock limits)
        for_each(YCbCr 4:2:0 only, RGB 4:4:4, YCbCr 4:2:0 also)
                for_each(12bpc,10bpc,8bpc)
                        compute_and_check_the_things
with some obvious tweaks for HDMI vs. DP specifics.

[1] https://gitlab.freedesktop.org/drm/intel/-/issues/4095
[2] https://gitlab.freedesktop.org/drm/intel/-/issues/2844

v2: HDMI stuff was all merged, DP stuff has been rebased

Ville Syrjälä (12):
  drm/i915/dp: Extract intel_dp_tmds_clock_valid()
  drm/i915/dp: Respect the sink's max TMDS clock when dealing with
    DP->HDMI DFPs
  drm/i915/dp: Extract intel_dp_has_audio()
  drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/
  drm/i915/dp: Reorder intel_dp_compute_config() a bit
  drm/i915/dp: Pass around intel_connector rather than drm_connector
  drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also"
    modes
  drm/i915/dp: Rework HDMI DFP TMDS clock handling
  drm/i915/dp: Add support for "4:2:0 also" modes for DP
  drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP
    HDMI DFPs
  drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix
  drm/i915/dp: Disable DFP RGB->YCbCr conversion for now

 drivers/gpu/drm/i915/display/intel_dp.c | 320 +++++++++++++++---------
 1 file changed, 201 insertions(+), 119 deletions(-)

-- 
2.34.1

[Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We're currently duplicating the DFP min/max TMDS clock checks
in .mode_valid() and .compute_config(). Extract a helper suitable
for both use cases.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 59 +++++++++++--------------
 1 file changed, 26 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9e19165fd175..e874d2f78088 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -856,6 +856,25 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private *dev_priv,
 	return hdisplay == 4096 && !HAS_DDI(dev_priv);
 }
 
+static enum drm_mode_status
+intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
+			  int clock, int bpc, bool ycbcr420_output)
+{
+	int tmds_clock;
+
+	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
+
+	if (intel_dp->dfp.min_tmds_clock &&
+	    tmds_clock < intel_dp->dfp.min_tmds_clock)
+		return MODE_CLOCK_LOW;
+
+	if (intel_dp->dfp.max_tmds_clock &&
+	    tmds_clock > intel_dp->dfp.max_tmds_clock)
+		return MODE_CLOCK_HIGH;
+
+	return MODE_OK;
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid_downstream(struct intel_connector *connector,
 			       const struct drm_display_mode *mode,
@@ -863,7 +882,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	const struct drm_display_info *info = &connector->base.display_info;
-	int tmds_clock;
 
 	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
 	if (intel_dp->dfp.pcon_max_frl_bw) {
@@ -889,17 +907,8 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 		return MODE_CLOCK_HIGH;
 
 	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
-	tmds_clock = intel_hdmi_tmds_clock(target_clock, 8,
-					   drm_mode_is_420_only(info, mode));
-
-	if (intel_dp->dfp.min_tmds_clock &&
-	    tmds_clock < intel_dp->dfp.min_tmds_clock)
-		return MODE_CLOCK_LOW;
-	if (intel_dp->dfp.max_tmds_clock &&
-	    tmds_clock > intel_dp->dfp.max_tmds_clock)
-		return MODE_CLOCK_HIGH;
-
-	return MODE_OK;
+	return intel_dp_tmds_clock_valid(intel_dp, target_clock, 8,
+					 drm_mode_is_420_only(info, mode));
 }
 
 static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
@@ -1142,32 +1151,16 @@ static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
 		 intel_dp->dfp.ycbcr_444_to_420);
 }
 
-static bool intel_dp_hdmi_tmds_clock_valid(struct intel_dp *intel_dp,
-					   const struct intel_crtc_state *crtc_state, int bpc)
-{
-	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
-	int tmds_clock = intel_hdmi_tmds_clock(clock, bpc,
-					       intel_dp_hdmi_ycbcr420(intel_dp, crtc_state));
-
-	if (intel_dp->dfp.min_tmds_clock &&
-	    tmds_clock < intel_dp->dfp.min_tmds_clock)
-		return false;
-
-	if (intel_dp->dfp.max_tmds_clock &&
-	    tmds_clock > intel_dp->dfp.max_tmds_clock)
-		return false;
-
-	return true;
-}
-
 static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
 				       const struct intel_crtc_state *crtc_state,
 				       int bpc)
 {
+	bool ycbcr420_output = intel_dp_hdmi_ycbcr420(intel_dp, crtc_state);
+	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
 
-	return intel_hdmi_bpc_possible(crtc_state, bpc, intel_dp->has_hdmi_sink,
-				       intel_dp_hdmi_ycbcr420(intel_dp, crtc_state)) &&
-		intel_dp_hdmi_tmds_clock_valid(intel_dp, crtc_state, bpc);
+	return intel_hdmi_bpc_possible(crtc_state, bpc,
+				       intel_dp->has_hdmi_sink, ycbcr420_output) &&
+		intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output) == MODE_OK;
 }
 
 static int intel_dp_max_bpp(struct intel_dp *intel_dp,
-- 
2.34.1

[Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we only look at the DFPs max TMDS clock limit when
considering whether the mode is valid, or whether we can do
deep color. The sink's max TMDS clock limit may be lower than
the DFPs, so we need to account for it as well.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4095
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2844
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e874d2f78088..3394e4951fef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -856,20 +856,34 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private *dev_priv,
 	return hdisplay == 4096 && !HAS_DDI(dev_priv);
 }
 
+static int intel_dp_max_tmds_clock(struct intel_dp *intel_dp)
+{
+	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
+	int max_tmds_clock = intel_dp->dfp.max_tmds_clock;
+
+	/* Only consider the sink's max TMDS clock if we know this is a HDMI DFP */
+	if (max_tmds_clock && info->max_tmds_clock)
+		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
+
+	return max_tmds_clock;
+}
+
 static enum drm_mode_status
 intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
 			  int clock, int bpc, bool ycbcr420_output)
 {
-	int tmds_clock;
+	int tmds_clock, min_tmds_clock, max_tmds_clock;
 
 	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
 
-	if (intel_dp->dfp.min_tmds_clock &&
-	    tmds_clock < intel_dp->dfp.min_tmds_clock)
+	min_tmds_clock = intel_dp->dfp.min_tmds_clock;
+	max_tmds_clock = intel_dp_max_tmds_clock(intel_dp);
+
+	if (min_tmds_clock && tmds_clock < min_tmds_clock)
 		return MODE_CLOCK_LOW;
 
-	if (intel_dp->dfp.max_tmds_clock &&
-	    tmds_clock > intel_dp->dfp.max_tmds_clock)
+	if (max_tmds_clock && tmds_clock > max_tmds_clock)
 		return MODE_CLOCK_HIGH;
 
 	return MODE_OK;
-- 
2.34.1

[Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Declutter intel_dp_compute_config() a bit by moving the
has_audio computation into a helper. HDMI already does the same thing.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 30 ++++++++++++++++---------
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3394e4951fef..fc50802c9997 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1798,6 +1798,24 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
 		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static bool intel_dp_has_audio(struct intel_encoder *encoder,
+			       const struct intel_crtc_state *crtc_state,
+			       const struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	const struct intel_digital_connector_state *intel_conn_state =
+		to_intel_digital_connector_state(conn_state);
+
+	if (!intel_dp_port_has_audio(i915, encoder->port))
+		return false;
+
+	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
+		return intel_dp->has_audio;
+	else
+		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
 			struct intel_crtc_state *pipe_config,
@@ -1807,14 +1825,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	const struct drm_display_mode *fixed_mode;
-	enum port port = encoder->port;
 	struct intel_connector *intel_connector = intel_dp->attached_connector;
-	struct intel_digital_connector_state *intel_conn_state =
-		to_intel_digital_connector_state(conn_state);
 	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
 	int ret = 0, output_bpp;
 
-	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)
+	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port != PORT_A)
 		pipe_config->has_pch_encoder = true;
 
 	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
@@ -1826,12 +1841,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 			return ret;
 	}
 
-	if (!intel_dp_port_has_audio(dev_priv, port))
-		pipe_config->has_audio = false;
-	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
-		pipe_config->has_audio = intel_dp->has_audio;
-	else
-		pipe_config->has_audio = intel_conn_state->force_audio == HDMI_AUDIO_ON;
+	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config, conn_state);
 
 	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
 	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
-- 
2.34.1

[Intel-gfx] [PATCH v2 04/12] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_dp_hdmi_ycbcr420() does account for native DP 4:2:0
output as well, so lets rename it a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fc50802c9997..9720571438e9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1157,8 +1157,8 @@ static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
 		drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
 }
 
-static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
-				   const struct intel_crtc_state *crtc_state)
+static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
+				 const struct intel_crtc_state *crtc_state)
 {
 	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
 		(crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
@@ -1169,7 +1169,7 @@ static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
 				       const struct intel_crtc_state *crtc_state,
 				       int bpc)
 {
-	bool ycbcr420_output = intel_dp_hdmi_ycbcr420(intel_dp, crtc_state);
+	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
 	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
 
 	return intel_hdmi_bpc_possible(crtc_state, bpc,
-- 
2.34.1

[Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Consolidate the double pfit call, and reorder things so that
intel_dp_output_format() and intel_dp_compute_link_config() are
back-to-back. They are intimately related, and will need to be
called twice to properly handle the "4:2:0 also" modes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++-------------
 1 file changed, 10 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9720571438e9..a655af1ab359 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1832,15 +1832,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port != PORT_A)
 		pipe_config->has_pch_encoder = true;
 
-	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
-							    adjusted_mode);
-
-	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
-		ret = intel_panel_fitting(pipe_config, conn_state);
-		if (ret)
-			return ret;
-	}
-
 	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config, conn_state);
 
 	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
@@ -1848,10 +1839,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 		ret = intel_panel_compute_config(intel_connector, adjusted_mode);
 		if (ret)
 			return ret;
-
-		ret = intel_panel_fitting(pipe_config, conn_state);
-		if (ret)
-			return ret;
 	}
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -1867,10 +1854,20 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
 		return -EINVAL;
 
+	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
+							    adjusted_mode);
+
 	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
 	if (ret < 0)
 		return ret;
 
+	if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
+	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+		ret = intel_panel_fitting(pipe_config, conn_state);
+		if (ret)
+			return ret;
+	}
+
 	pipe_config->limited_color_range =
 		intel_dp_limited_color_range(pipe_config, conn_state);
 
-- 
2.34.1

[Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector rather than drm_connector

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Prefer to use intel_connector over drm_connector. Also clean
up the related variable names a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 38 ++++++++++++-------------
 1 file changed, 18 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a655af1ab359..94faf3c28d2d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -786,13 +786,13 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
 }
 
 static enum intel_output_format
-intel_dp_output_format(struct drm_connector *connector,
+intel_dp_output_format(struct intel_connector *connector,
 		       const struct drm_display_mode *mode)
 {
-	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
-	const struct drm_display_info *info = &connector->display_info;
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	const struct drm_display_info *info = &connector->base.display_info;
 
-	if (!connector->ycbcr_420_allowed ||
+	if (!connector->base.ycbcr_420_allowed ||
 	    !drm_mode_is_420_only(info, mode))
 		return INTEL_OUTPUT_FORMAT_RGB;
 
@@ -828,7 +828,7 @@ static int intel_dp_output_bpp(enum intel_output_format output_format, int bpp)
 }
 
 static int
-intel_dp_mode_min_output_bpp(struct drm_connector *connector,
+intel_dp_mode_min_output_bpp(struct intel_connector *connector,
 			     const struct drm_display_mode *mode)
 {
 	enum intel_output_format output_format =
@@ -901,7 +901,7 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	if (intel_dp->dfp.pcon_max_frl_bw) {
 		int target_bw;
 		int max_frl_bw;
-		int bpp = intel_dp_mode_min_output_bpp(&connector->base, mode);
+		int bpp = intel_dp_mode_min_output_bpp(connector, mode);
 
 		target_bw = bpp * target_clock;
 
@@ -937,12 +937,12 @@ static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
 }
 
 static enum drm_mode_status
-intel_dp_mode_valid(struct drm_connector *connector,
+intel_dp_mode_valid(struct drm_connector *_connector,
 		    struct drm_display_mode *mode)
 {
-	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
-	struct intel_connector *intel_connector = to_intel_connector(connector);
-	struct drm_i915_private *dev_priv = to_i915(connector->dev);
+	struct intel_connector *connector = to_intel_connector(_connector);
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	const struct drm_display_mode *fixed_mode;
 	int target_clock = mode->clock;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -958,9 +958,9 @@ intel_dp_mode_valid(struct drm_connector *connector,
 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 		return MODE_H_ILLEGAL;
 
-	fixed_mode = intel_panel_fixed_mode(intel_connector, mode);
+	fixed_mode = intel_panel_fixed_mode(connector, mode);
 	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
-		status = intel_panel_mode_valid(intel_connector, mode);
+		status = intel_panel_mode_valid(connector, mode);
 		if (status != MODE_OK)
 			return status;
 
@@ -1034,8 +1034,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
 	if (mode_rate > max_rate && !dsc)
 		return MODE_CLOCK_HIGH;
 
-	status = intel_dp_mode_valid_downstream(intel_connector,
-						mode, target_clock);
+	status = intel_dp_mode_valid_downstream(connector, mode, target_clock);
 	if (status != MODE_OK)
 		return status;
 
@@ -1825,7 +1824,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	const struct drm_display_mode *fixed_mode;
-	struct intel_connector *intel_connector = intel_dp->attached_connector;
+	struct intel_connector *connector = intel_dp->attached_connector;
 	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
 	int ret = 0, output_bpp;
 
@@ -1834,9 +1833,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
 	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config, conn_state);
 
-	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
+	fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
 	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
-		ret = intel_panel_compute_config(intel_connector, adjusted_mode);
+		ret = intel_panel_compute_config(connector, adjusted_mode);
 		if (ret)
 			return ret;
 	}
@@ -1854,8 +1853,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
 		return -EINVAL;
 
-	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
-							    adjusted_mode);
+	pipe_config->output_format = intel_dp_output_format(connector, adjusted_mode);
 
 	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
 	if (ret < 0)
@@ -1913,7 +1911,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
 	intel_vrr_compute_config(pipe_config, conn_state);
 	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
-	intel_drrs_compute_config(intel_connector, pipe_config,
+	intel_drrs_compute_config(connector, pipe_config,
 				  output_bpp, constant_n);
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
-- 
2.34.1

[Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Hoist the drm_mode_is_420_only() from intel_dp_output_format()
into the caller. This will allow intel_dp_output_format() to be
reused for "4:2:0 also" modes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 94faf3c28d2d..a78522dc9b3c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -787,13 +787,11 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
 
 static enum intel_output_format
 intel_dp_output_format(struct intel_connector *connector,
-		       const struct drm_display_mode *mode)
+		       bool ycbcr_420_output)
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
-	const struct drm_display_info *info = &connector->base.display_info;
 
-	if (!connector->base.ycbcr_420_allowed ||
-	    !drm_mode_is_420_only(info, mode))
+	if (!connector->base.ycbcr_420_allowed || !ycbcr_420_output)
 		return INTEL_OUTPUT_FORMAT_RGB;
 
 	if (intel_dp->dfp.rgb_to_ycbcr &&
@@ -831,8 +829,9 @@ static int
 intel_dp_mode_min_output_bpp(struct intel_connector *connector,
 			     const struct drm_display_mode *mode)
 {
+	const struct drm_display_info *info = &connector->base.display_info;
 	enum intel_output_format output_format =
-		intel_dp_output_format(connector, mode);
+		intel_dp_output_format(connector, drm_mode_is_420_only(info, mode));
 
 	return intel_dp_output_bpp(output_format, intel_dp_min_bpp(output_format));
 }
@@ -1825,6 +1824,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	const struct drm_display_mode *fixed_mode;
 	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
 	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
 	int ret = 0, output_bpp;
 
@@ -1853,7 +1853,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
 		return -EINVAL;
 
-	pipe_config->output_format = intel_dp_output_format(connector, adjusted_mode);
+	pipe_config->output_format =
+		intel_dp_output_format(connector, drm_mode_is_420_only(info, adjusted_mode));
 
 	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
 	if (ret < 0)
-- 
2.34.1

[Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock handling

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rework the HDMI DFP TMDS clock checks to also check at 8bpc.
Previously we only checked the deep color cases. But I suppose
a sink could potentially declare "4:2:0 also" modes that only
actually fit within its own limits when using 4:2:0. Even if
that is too nuts to be real there is no real harm in running
through the full checks for everything.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 35 ++++++++++++++++++-------
 1 file changed, 25 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a78522dc9b3c..436d0b0f0b76 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1163,16 +1163,28 @@ static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
 		 intel_dp->dfp.ycbcr_444_to_420);
 }
 
-static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
-				       const struct intel_crtc_state *crtc_state,
-				       int bpc)
+static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
+				     const struct intel_crtc_state *crtc_state,
+				     int bpc)
 {
 	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
 	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
 
-	return intel_hdmi_bpc_possible(crtc_state, bpc,
-				       intel_dp->has_hdmi_sink, ycbcr420_output) &&
-		intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output) == MODE_OK;
+	/*
+	 * Current bpc could already be below 8bpc due to
+	 * FDI bandwidth constraints or other limits.
+	 * HDMI minimum is 8bpc however.
+	 */
+	bpc = max(bpc, 8);
+
+	for (; bpc >= 8; bpc -= 2) {
+		if (intel_hdmi_bpc_possible(crtc_state, bpc,
+					    intel_dp->has_hdmi_sink, ycbcr420_output) &&
+		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output) == MODE_OK)
+			return bpc;
+	}
+
+	return -EINVAL;
 }
 
 static int intel_dp_max_bpp(struct intel_dp *intel_dp,
@@ -1188,10 +1200,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
 		bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
 
 	if (intel_dp->dfp.min_tmds_clock) {
-		for (; bpc >= 10; bpc -= 2) {
-			if (intel_dp_hdmi_bpc_possible(intel_dp, crtc_state, bpc))
-				break;
-		}
+		int max_hdmi_bpc;
+
+		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state, bpc);
+		if (max_hdmi_bpc < 0)
+			return 0;
+
+		bpc = min(bpc, max_hdmi_bpc);
 	}
 
 	bpp = bpc * 3;
-- 
2.34.1

[Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also" modes for DP

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we only support "4:2:0 also" modes on native HDMI.
Extend that support for DP as well.

With all the HDMI DFP TMDS clock handling sorted out this
is now going to work for both native DP and DP->HDMI
converters. As with native HDMI we first check if RGB
output is possible, and if not we try YCbCr 4:2:0 instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 67 ++++++++++++++++++++++---
 1 file changed, 59 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 436d0b0f0b76..3dbb68fa4e51 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -895,6 +895,8 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 {
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	const struct drm_display_info *info = &connector->base.display_info;
+	enum drm_mode_status status;
+	bool ycbcr_420_only;
 
 	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
 	if (intel_dp->dfp.pcon_max_frl_bw) {
@@ -919,9 +921,25 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	    target_clock > intel_dp->dfp.max_dotclock)
 		return MODE_CLOCK_HIGH;
 
+	ycbcr_420_only = drm_mode_is_420_only(info, mode);
+
 	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
-	return intel_dp_tmds_clock_valid(intel_dp, target_clock, 8,
-					 drm_mode_is_420_only(info, mode));
+	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
+					   8, ycbcr_420_only);
+
+	if (status != MODE_OK) {
+		if (ycbcr_420_only ||
+		    !connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420_also(info, mode))
+			return status;
+
+		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
+						   8, true);
+		if (status != MODE_OK)
+			return status;
+	}
+
+	return MODE_OK;
 }
 
 static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
@@ -1829,6 +1847,43 @@ static bool intel_dp_has_audio(struct intel_encoder *encoder,
 		return intel_conn_state->force_audio == HDMI_AUDIO_ON;
 }
 
+static int
+intel_dp_compute_output_format(struct intel_encoder *encoder,
+			       struct intel_crtc_state *crtc_state,
+			       struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	bool ycbcr_420_only;
+	int ret;
+
+	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
+
+	crtc_state->output_format = intel_dp_output_format(connector, ycbcr_420_only);
+
+	if (ycbcr_420_only && !intel_dp_is_ycbcr420(intel_dp, crtc_state)) {
+		drm_dbg_kms(&i915->drm,
+			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+		crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
+	}
+
+	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
+	if (ret) {
+		if (intel_dp_is_ycbcr420(intel_dp, crtc_state) ||
+		    !connector->base.ycbcr_420_allowed ||
+		    !drm_mode_is_420_also(info, adjusted_mode))
+			return ret;
+
+		crtc_state->output_format = intel_dp_output_format(connector, true);
+		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
+	}
+
+	return ret;
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
 			struct intel_crtc_state *pipe_config,
@@ -1839,7 +1894,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	const struct drm_display_mode *fixed_mode;
 	struct intel_connector *connector = intel_dp->attached_connector;
-	const struct drm_display_info *info = &connector->base.display_info;
 	bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
 	int ret = 0, output_bpp;
 
@@ -1868,11 +1922,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
 		return -EINVAL;
 
-	pipe_config->output_format =
-		intel_dp_output_format(connector, drm_mode_is_420_only(info, adjusted_mode));
-
-	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
-	if (ret < 0)
+	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state);
+	if (ret)
 		return ret;
 
 	if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
-- 
2.34.1

[Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

With native HDMI we allow the user to override the mode with
something that may not respect the downstream (sink,dual-mode adapter)
TMDS clock limits. Let's reuse the same logic for DP HDMI DFPs
so that behaviour is more or less uniform.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 51 ++++++++++++++++++-------
 1 file changed, 38 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3dbb68fa4e51..053853a3054e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -870,10 +870,14 @@ static int intel_dp_max_tmds_clock(struct intel_dp *intel_dp)
 
 static enum drm_mode_status
 intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
-			  int clock, int bpc, bool ycbcr420_output)
+			  int clock, int bpc, bool ycbcr420_output,
+			  bool respect_downstream_limits)
 {
 	int tmds_clock, min_tmds_clock, max_tmds_clock;
 
+	if (!respect_downstream_limits)
+		return MODE_OK;
+
 	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
 
 	min_tmds_clock = intel_dp->dfp.min_tmds_clock;
@@ -925,7 +929,7 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 
 	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
 	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-					   8, ycbcr_420_only);
+					   8, ycbcr_420_only, true);
 
 	if (status != MODE_OK) {
 		if (ycbcr_420_only ||
@@ -934,7 +938,7 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 			return status;
 
 		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
-						   8, true);
+						   8, true, true);
 		if (status != MODE_OK)
 			return status;
 	}
@@ -1183,7 +1187,7 @@ static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
 
 static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
 				     const struct intel_crtc_state *crtc_state,
-				     int bpc)
+				     int bpc, bool respect_downstream_limits)
 {
 	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
 	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
@@ -1195,10 +1199,19 @@ static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
 	 */
 	bpc = max(bpc, 8);
 
+	/*
+	 * We will never exceed downstream TMDS clock limits while
+	 * attempting deep color. If the user insists on forcing an
+	 * out of spec mode they will have to be satisfied with 8bpc.
+	 */
+	if (!respect_downstream_limits)
+		bpc = 8;
+
 	for (; bpc >= 8; bpc -= 2) {
 		if (intel_hdmi_bpc_possible(crtc_state, bpc,
 					    intel_dp->has_hdmi_sink, ycbcr420_output) &&
-		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output) == MODE_OK)
+		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output,
+					      respect_downstream_limits) == MODE_OK)
 			return bpc;
 	}
 
@@ -1206,7 +1219,8 @@ static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
 }
 
 static int intel_dp_max_bpp(struct intel_dp *intel_dp,
-			    const struct intel_crtc_state *crtc_state)
+			    const struct intel_crtc_state *crtc_state,
+			    bool respect_downstream_limits)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	struct intel_connector *intel_connector = intel_dp->attached_connector;
@@ -1220,7 +1234,8 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
 	if (intel_dp->dfp.min_tmds_clock) {
 		int max_hdmi_bpc;
 
-		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state, bpc);
+		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state, bpc,
+							 respect_downstream_limits);
 		if (max_hdmi_bpc < 0)
 			return 0;
 
@@ -1539,7 +1554,8 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 static int
 intel_dp_compute_link_config(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config,
-			     struct drm_connector_state *conn_state)
+			     struct drm_connector_state *conn_state,
+			     bool respect_downstream_limits)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
@@ -1556,7 +1572,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
 	limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
-	limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config);
+	limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config, respect_downstream_limits);
 
 	if (intel_dp->use_max_params) {
 		/*
@@ -1850,7 +1866,8 @@ static bool intel_dp_has_audio(struct intel_encoder *encoder,
 static int
 intel_dp_compute_output_format(struct intel_encoder *encoder,
 			       struct intel_crtc_state *crtc_state,
-			       struct drm_connector_state *conn_state)
+			       struct drm_connector_state *conn_state,
+			       bool respect_downstream_limits)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
@@ -1870,7 +1887,8 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
 		crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
 	}
 
-	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
+	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
+					   respect_downstream_limits);
 	if (ret) {
 		if (intel_dp_is_ycbcr420(intel_dp, crtc_state) ||
 		    !connector->base.ycbcr_420_allowed ||
@@ -1878,7 +1896,8 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
 			return ret;
 
 		crtc_state->output_format = intel_dp_output_format(connector, true);
-		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
+		ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
+						   respect_downstream_limits);
 	}
 
 	return ret;
@@ -1922,7 +1941,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
 		return -EINVAL;
 
-	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state);
+	/*
+	 * Try to respect downstream TMDS clock limits first, if
+	 * that fails assume the user might know something we don't.
+	 */
+	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
+	if (ret)
+		ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
 	if (ret)
 		return ret;
 
-- 
2.34.1

[Intel-gfx] [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Our YCbCr output is always supposed to be limited range BT.709.
That's what we send with native HDMI. The conn_state->colorspace
stuff is entirely independent of that and is not supposed to alter
the generated output in any way. If we want a way to do that then
we need a new proprty for it.

Make it so that the RGB->YCbCr conversion when performed by the
DPF will match the BT.709 we would transmit with native HDMI.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 38 ++-----------------------
 1 file changed, 3 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 053853a3054e..d3d458b3267d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2574,38 +2574,8 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 			    "Failed to %s protocol converter YCbCr 4:2:0 conversion mode\n",
 			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
 
-	tmp = 0;
-	if (intel_dp->dfp.rgb_to_ycbcr) {
-		bool bt2020, bt709;
-
-		/*
-		 * FIXME: Currently if userspace selects BT2020 or BT709, but PCON supports only
-		 * RGB->YCbCr for BT601 colorspace, we go ahead with BT601, as default.
-		 *
-		 */
-		tmp = DP_CONVERSION_BT601_RGB_YCBCR_ENABLE;
-
-		bt2020 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
-								   intel_dp->downstream_ports,
-								   DP_DS_HDMI_BT2020_RGB_YCBCR_CONV);
-		bt709 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
-								  intel_dp->downstream_ports,
-								  DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
-		switch (crtc_state->infoframes.vsc.colorimetry) {
-		case DP_COLORIMETRY_BT2020_RGB:
-		case DP_COLORIMETRY_BT2020_YCC:
-			if (bt2020)
-				tmp = DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE;
-			break;
-		case DP_COLORIMETRY_BT709_YCC:
-		case DP_COLORIMETRY_XVYCC_709:
-			if (bt709)
-				tmp = DP_CONVERSION_BT709_RGB_YCBCR_ENABLE;
-			break;
-		default:
-			break;
-		}
-	}
+	tmp = intel_dp->dfp.rgb_to_ycbcr ?
+		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
 
 	if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
 		drm_dbg_kms(&i915->drm,
@@ -4459,9 +4429,7 @@ intel_dp_update_420(struct intel_dp *intel_dp)
 							intel_dp->downstream_ports);
 	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
 								 intel_dp->downstream_ports,
-								 DP_DS_HDMI_BT601_RGB_YCBCR_CONV |
-								 DP_DS_HDMI_BT709_RGB_YCBCR_CONV |
-								 DP_DS_HDMI_BT2020_RGB_YCBCR_CONV);
+								 DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
 
 	if (DISPLAY_VER(i915) >= 11) {
 		/* Let PCON convert from RGB->YCbCr if possible */
-- 
2.34.1

[Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We lack sufficient state tracking to figure out whether
we want the DFP to perform the RGB->YCbCr conversion for us
or not. So currently we are blindly just enabling that all the
time when supported by the DFP. That is nonsense. So until
we imporve our state tracking for this just disable the feature.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index d3d458b3267d..a57581198a47 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1180,6 +1180,7 @@ static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
 static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
 				 const struct intel_crtc_state *crtc_state)
 {
+	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
 	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
 		(crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 &&
 		 intel_dp->dfp.ycbcr_444_to_420);
@@ -2574,6 +2575,7 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 			    "Failed to %s protocol converter YCbCr 4:2:0 conversion mode\n",
 			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
 
+	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
 	tmp = intel_dp->dfp.rgb_to_ycbcr ?
 		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
 
@@ -4430,6 +4432,14 @@ intel_dp_update_420(struct intel_dp *intel_dp)
 	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd,
 								 intel_dp->downstream_ports,
 								 DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
+	/*
+	 * FIXME need to actually track whether we're really
+	 * going to be doing the RGB->YCbCr connversion or not.
+	 * We can't tell by simply looking at intel_dp->dfp.rgb_to_ycbcr.
+	 * Readout is going to annoying due to having to read that
+	 * state from external hardware that may vanish at any time :(
+	 */
+	rgb_to_ycbcr = false;
 
 	if (DISPLAY_VER(i915) >= 11) {
 		/* Let PCON convert from RGB->YCbCr if possible */
-- 
2.34.1

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)
URL   : https://patchwork.freedesktop.org/series/95881/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6081 bytes --]

== Series Details ==

Series: drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)
URL   : https://patchwork.freedesktop.org/series/95881/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11396 -> Patchwork_22641
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/index.html

Participating hosts (48 -> 42)
------------------------------

  Missing    (6): shard-tglu fi-hsw-4200u bat-adlm-1 fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22641:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@objects:
    - {bat-rpls-2}:       [DMESG-WARN][1] ([i915#4391]) -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/bat-rpls-2/igt@i915_selftest@live@objects.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/bat-rpls-2/igt@i915_selftest@live@objects.html

  
Known issues
------------

  Here are the changes found in Patchwork_22641 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@read_all_entries:
    - fi-cfl-8109u:       [PASS][3] -> [DMESG-WARN][4] ([i915#203] / [i915#262] / [i915#295])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/fi-cfl-8109u/igt@debugfs_test@read_all_entries.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/fi-cfl-8109u/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s0@smem:
    - fi-cfl-8109u:       [PASS][5] -> [DMESG-WARN][6] ([i915#203] / [i915#295])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0@smem.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/fi-cfl-8109u/igt@gem_exec_suspend@basic-s0@smem.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-6:          [DMESG-FAIL][7] ([i915#4494] / [i915#4957]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/bat-dg1-6/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@uncore:
    - {bat-rpls-2}:       [DMESG-WARN][9] ([i915#4391]) -> [PASS][10] +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/bat-rpls-2/igt@i915_selftest@live@uncore.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/bat-rpls-2/igt@i915_selftest@live@uncore.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
    - fi-cfl-8109u:       [DMESG-WARN][11] ([i915#295] / [i915#5341]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-b:
    - fi-cfl-8109u:       [DMESG-WARN][13] ([i915#295]) -> [PASS][14] +10 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#203]: https://gitlab.freedesktop.org/drm/intel/issues/203
  [i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5339]: https://gitlab.freedesktop.org/drm/intel/issues/5339
  [i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
  [i915#5342]: https://gitlab.freedesktop.org/drm/intel/issues/5342


Build changes
-------------

  * Linux: CI_DRM_11396 -> Patchwork_22641

  CI-20190529: 20190529
  CI_DRM_11396: 18b88414e6c9660022bb464d4d5fadb07d38cf04 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6387: 04d012b18355b53798af5a55a8915afb1a421bba @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_22641: 64652ea442bdf2a86b44fad85c349c3604e07beb @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

64652ea442bd drm/i915/dp: Disable DFP RGB->YCbCr conversion for now
f235ce9e556a drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix
acdec426d5d6 drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs
4db4781592e8 drm/i915/dp: Add support for "4:2:0 also" modes for DP
a8ee0c6096e7 drm/i915/dp: Rework HDMI DFP TMDS clock handling
25a3ac92acac drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes
29eb939efed0 drm/i915/dp: Pass around intel_connector rather than drm_connector
76ba76933f82 drm/i915/dp: Reorder intel_dp_compute_config() a bit
e7f9b1bcd8f5 drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/
9dca4bebab65 drm/i915/dp: Extract intel_dp_has_audio()
7c2947166301 drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs
2006f737c4dc drm/i915/dp: Extract intel_dp_tmds_clock_valid()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/index.html

[-- Attachment #2: Type: text/html, Size: 6785 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30273 bytes --]

== Series Details ==

Series: drm/i915: Fix up DP DFP 4:2:0 handling more (rev2)
URL   : https://patchwork.freedesktop.org/series/95881/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11396_full -> Patchwork_22641_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_22641_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
    - {shard-rkl}:        [SKIP][1] ([i915#1845] / [i915#4098]) -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-1/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-5/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
    - {shard-rkl}:        [SKIP][3] ([i915#1849] / [i915#4098]) -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-5/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-5/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b.html

  * igt@perf_pmu@enable-race@rcs0:
    - {shard-rkl}:        NOTRUN -> [INCOMPLETE][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-5/igt@perf_pmu@enable-race@rcs0.html

  
Known issues
------------

  Here are the changes found in Patchwork_22641_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][6] -> [FAIL][7] ([i915#232])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-tglb6/igt@gem_eio@unwedge-stress.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-tglb5/igt@gem_eio@unwedge-stress.html
    - shard-skl:          [PASS][8] -> [TIMEOUT][9] ([i915#3063])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl10/igt@gem_eio@unwedge-stress.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl9/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-kbl:          NOTRUN -> [DMESG-FAIL][10] ([i915#5076])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][11] ([i915#2842]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-kbl:          NOTRUN -> [FAIL][12] ([i915#2842])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-glk:          [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk5/igt@gem_exec_fair@basic-pace@vecs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk7/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-kbl:          NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613]) +2 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@gem_lmem_swapping@heavy-verify-random.html
    - shard-skl:          NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613]) +2 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - shard-iclb:         NOTRUN -> [SKIP][17] ([i915#4613])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_media_vme:
    - shard-skl:          NOTRUN -> [SKIP][18] ([fdo#109271]) +165 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@gem_media_vme.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-apl:          NOTRUN -> [SKIP][19] ([fdo#109271]) +61 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][20] ([i915#768])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@gem_render_copy@yf-tiled-to-vebox-x-tiled.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-apl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3323])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl4/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-iclb:         NOTRUN -> [WARN][22] ([i915#2684])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_pm_sseu@full-enable:
    - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#4387])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb6/igt@i915_pm_sseu@full-enable.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [PASS][24] -> [DMESG-WARN][25] ([i915#180]) +1 similar issue
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-apl7/igt@i915_suspend@sysfs-reader.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl1/igt@i915_suspend@sysfs-reader.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-iclb:         NOTRUN -> [SKIP][26] ([i915#3826])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][27] ([i915#5286])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb6/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-kbl:          NOTRUN -> [SKIP][28] ([fdo#109271]) +214 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][29] ([fdo#110725] / [fdo#111614])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb8/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          [PASS][30] -> [DMESG-WARN][31] ([i915#118])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk3/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3777]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
    - shard-skl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][34] ([i915#3743]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][35] ([i915#3763])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-iclb:         NOTRUN -> [SKIP][36] ([fdo#110723])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][38] ([fdo#109278] / [i915#3886]) +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +6 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl3/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +6 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_chamelium@dp-crc-multiple:
    - shard-skl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@kms_chamelium@dp-crc-multiple.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-iclb:         NOTRUN -> [SKIP][43] ([fdo#109284] / [fdo#111827]) +4 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_chamelium@hdmi-hpd-for-each-pipe:
    - shard-kbl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +17 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_chamelium@hdmi-hpd-for-each-pipe.html

  * igt@kms_color@pipe-d-gamma:
    - shard-iclb:         NOTRUN -> [SKIP][45] ([fdo#109278] / [i915#1149])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_color@pipe-d-gamma.html

  * igt@kms_color_chamelium@pipe-b-gamma:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@kms_color_chamelium@pipe-b-gamma.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-kbl:          NOTRUN -> [TIMEOUT][47] ([i915#1319])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl7/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@lic:
    - shard-apl:          NOTRUN -> [TIMEOUT][48] ([i915#1319])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl8/igt@kms_content_protection@lic.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          [PASS][49] -> [INCOMPLETE][50] ([i915#2828] / [i915#300])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x170-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109278] / [fdo#109279])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_cursor_crc@pipe-b-cursor-512x170-onscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][52] -> [INCOMPLETE][53] ([i915#3614])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109278]) +8 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb8/igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][55] -> [FAIL][56] ([i915#2346])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-skl:          NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#533]) +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl9/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
    - shard-glk:          NOTRUN -> [SKIP][58] ([fdo#109271])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk1/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_draw_crc@draw-method-rgb565-blt-4tiled:
    - shard-iclb:         NOTRUN -> [SKIP][59] ([i915#5287])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_draw_crc@draw-method-rgb565-blt-4tiled.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([fdo#109274])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [PASS][61] -> [DMESG-WARN][62] ([i915#180]) +3 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-skl:          NOTRUN -> [INCOMPLETE][63] ([i915#3701])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff:
    - shard-iclb:         NOTRUN -> [SKIP][64] ([fdo#109280]) +6 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a:
    - shard-skl:          NOTRUN -> [FAIL][65] ([i915#1188])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a.html

  * igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a:
    - shard-skl:          [PASS][66] -> [FAIL][67] ([i915#1188])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl5/igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@kms_hdr@bpc-switch@bpc-switch-edp-1-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-skl:          NOTRUN -> [FAIL][68] ([fdo#108145] / [i915#265]) +3 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-kbl:          NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265]) +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl3/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][70] ([i915#265])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-apl:          NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][72] -> [FAIL][73] ([fdo#108145] / [i915#265]) +2 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-c-tiling-x:
    - shard-iclb:         NOTRUN -> [SKIP][74] ([i915#3536])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb6/igt@kms_plane_lowres@pipe-c-tiling-x.html

  * igt@kms_prop_blob@blob-prop-core:
    - shard-skl:          [PASS][75] -> [DMESG-WARN][76] ([i915#1982])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl1/igt@kms_prop_blob@blob-prop-core.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl1/igt@kms_prop_blob@blob-prop-core.html

  * igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
    - shard-kbl:          NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
    - shard-skl:          NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-apl:          NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][80] -> [SKIP][81] ([fdo#109441]) +1 similar issue
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_sysfs_edid_timing:
    - shard-apl:          NOTRUN -> [FAIL][82] ([IGT#2])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-kbl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl3/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_vrr@flip-basic:
    - shard-iclb:         NOTRUN -> [SKIP][84] ([fdo#109502])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@kms_vrr@flip-basic.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-skl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl9/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [PASS][86] -> [FAIL][87] ([i915#1542])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl7/igt@perf@polling-parameterized.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl10/igt@perf@polling-parameterized.html

  * igt@perf_pmu@event-wait@rcs0:
    - shard-iclb:         NOTRUN -> [SKIP][88] ([fdo#112283])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb5/igt@perf_pmu@event-wait@rcs0.html

  * igt@sysfs_clients@recycle-many:
    - shard-skl:          NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2994])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl9/igt@sysfs_clients@recycle-many.html

  * igt@sysfs_clients@sema-10:
    - shard-apl:          NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2994]) +1 similar issue
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl8/igt@sysfs_clients@sema-10.html

  * igt@sysfs_clients@sema-50:
    - shard-kbl:          NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@sysfs_clients@sema-50.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@many-contexts:
    - {shard-rkl}:        [FAIL][92] ([i915#2410]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@gem_ctx_persistence@many-contexts.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-5/igt@gem_ctx_persistence@many-contexts.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][94] ([i915#2842]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-kbl:          [FAIL][96] ([i915#2842]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl1/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
    - {shard-tglu}:       [FAIL][100] ([i915#2842]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-tglu-4/igt@gem_exec_fair@basic-pace-share@rcs0.html
    - shard-apl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-apl1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl3/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_whisper@basic-fds-forked-all:
    - shard-glk:          [DMESG-FAIL][104] -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk7/igt@gem_exec_whisper@basic-fds-forked-all.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk1/igt@gem_exec_whisper@basic-fds-forked-all.html

  * igt@gem_softpin@allocator-evict-all-engines:
    - shard-glk:          [FAIL][106] ([i915#4171]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk3/igt@gem_softpin@allocator-evict-all-engines.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk8/igt@gem_softpin@allocator-evict-all-engines.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - shard-skl:          [FAIL][108] ([i915#5290]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl9/igt@i915_pm_rpm@basic-pci-d3-state.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl7/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_pm_rpm@gem-execbuf:
    - {shard-rkl}:        [SKIP][110] ([fdo#109308]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@i915_pm_rpm@gem-execbuf.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@i915_pm_rpm@gem-execbuf.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - {shard-rkl}:        [SKIP][112] ([i915#1845] / [i915#4098]) -> [PASS][113] +14 similar issues
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_color@pipe-b-ctm-red-to-blue:
    - {shard-rkl}:        [SKIP][114] ([i915#1149] / [i915#1849] / [i915#4070] / [i915#4098]) -> [PASS][115] +1 similar issue
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_color@pipe-b-ctm-red-to-blue.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_color@pipe-b-ctm-red-to-blue.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen:
    - {shard-rkl}:        [SKIP][116] ([fdo#112022] / [i915#4070]) -> [PASS][117] +2 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][118] ([i915#180]) -> [PASS][119] +3 similar issues
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [DMESG-WARN][120] ([i915#180]) -> [PASS][121] +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled:
    - {shard-rkl}:        [SKIP][122] ([fdo#111314] / [i915#4098] / [i915#4369]) -> [PASS][123] +5 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [INCOMPLETE][124] ([i915#180] / [i915#636]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][126] ([i915#79]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][128] ([i915#2122]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-glk2/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-glk3/igt@kms_flip@2x-plain-flip-fb-recreate@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
    - shard-skl:          [FAIL][130] ([i915#2122]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - {shard-rkl}:        [SKIP][132] ([i915#1849]) -> [PASS][133] +10 similar issues
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - {shard-rkl}:        [SKIP][134] ([i915#1849] / [i915#4098]) -> [PASS][135] +1 similar issue
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/shard-rkl-6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - {shard-rkl}:        [SKIP][136] ([i915#1849] / [i915#4070] / [i915#4098]) -> [PASS][137] +1 similar issue
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11396/shard-rkl-2/igt@kms_pl

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22641/index.html

[-- Attachment #2: Type: text/html, Size: 33521 bytes --]

Re: [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract
> intel_dp_tmds_clock_valid()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We're currently duplicating the DFP min/max TMDS clock checks in .mode_valid()
> and .compute_config(). Extract a helper suitable for both use cases.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 59 +++++++++++--------------
>  1 file changed, 26 insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9e19165fd175..e874d2f78088 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -856,6 +856,25 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private
> *dev_priv,
>  	return hdisplay == 4096 && !HAS_DDI(dev_priv);  }
> 
> +static enum drm_mode_status
> +intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
> +			  int clock, int bpc, bool ycbcr420_output) {
> +	int tmds_clock;
> +
> +	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
> +
> +	if (intel_dp->dfp.min_tmds_clock &&
> +	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> +		return MODE_CLOCK_LOW;
> +
> +	if (intel_dp->dfp.max_tmds_clock &&
> +	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> +		return MODE_CLOCK_HIGH;
> +
> +	return MODE_OK;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  			       const struct drm_display_mode *mode, @@ -863,7
> +882,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
>  	const struct drm_display_info *info = &connector->base.display_info;
> -	int tmds_clock;
> 
>  	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
>  	if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -889,17 +907,8 @@ intel_dp_mode_valid_downstream(struct intel_connector
> *connector,
>  		return MODE_CLOCK_HIGH;
> 
>  	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	tmds_clock = intel_hdmi_tmds_clock(target_clock, 8,
> -					   drm_mode_is_420_only(info, mode));
> -
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> -		return MODE_CLOCK_LOW;
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> -		return MODE_CLOCK_HIGH;
> -
> -	return MODE_OK;
> +	return intel_dp_tmds_clock_valid(intel_dp, target_clock, 8,
> +					 drm_mode_is_420_only(info, mode));
>  }
> 
>  static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, @@ -1142,32
> +1151,16 @@ static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
>  		 intel_dp->dfp.ycbcr_444_to_420);
>  }
> 
> -static bool intel_dp_hdmi_tmds_clock_valid(struct intel_dp *intel_dp,
> -					   const struct intel_crtc_state *crtc_state,
> int bpc)
> -{
> -	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> -	int tmds_clock = intel_hdmi_tmds_clock(clock, bpc,
> -					       intel_dp_hdmi_ycbcr420(intel_dp,
> crtc_state));
> -
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> -		return false;
> -
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> -		return false;
> -
> -	return true;
> -}
> -
>  static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
>  				       const struct intel_crtc_state *crtc_state,
>  				       int bpc)
>  {
> +	bool ycbcr420_output = intel_dp_hdmi_ycbcr420(intel_dp, crtc_state);
> +	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> 
> -	return intel_hdmi_bpc_possible(crtc_state, bpc, intel_dp->has_hdmi_sink,
> -				       intel_dp_hdmi_ycbcr420(intel_dp, crtc_state))
> &&
> -		intel_dp_hdmi_tmds_clock_valid(intel_dp, crtc_state, bpc);
> +	return intel_hdmi_bpc_possible(crtc_state, bpc,
> +				       intel_dp->has_hdmi_sink, ycbcr420_output) &&
> +		intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output)
> ==
> +MODE_OK;
>  }
> 
>  static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS
> clock when dealing with DP->HDMI DFPs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently we only look at the DFPs max TMDS clock limit when considering whether
> the mode is valid, or whether we can do deep color. The sink's max TMDS clock limit
> may be lower than the DFPs, so we need to account for it as well.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4095
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2844
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++++-----
>  1 file changed, 19 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index e874d2f78088..3394e4951fef 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -856,20 +856,34 @@ static bool intel_dp_hdisplay_bad(struct drm_i915_private
> *dev_priv,
>  	return hdisplay == 4096 && !HAS_DDI(dev_priv);  }
> 
> +static int intel_dp_max_tmds_clock(struct intel_dp *intel_dp) {
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	int max_tmds_clock = intel_dp->dfp.max_tmds_clock;
> +
> +	/* Only consider the sink's max TMDS clock if we know this is a HDMI DFP */
> +	if (max_tmds_clock && info->max_tmds_clock)
> +		max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> +
> +	return max_tmds_clock;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
>  			  int clock, int bpc, bool ycbcr420_output)  {
> -	int tmds_clock;
> +	int tmds_clock, min_tmds_clock, max_tmds_clock;
> 
>  	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
> 
> -	if (intel_dp->dfp.min_tmds_clock &&
> -	    tmds_clock < intel_dp->dfp.min_tmds_clock)
> +	min_tmds_clock = intel_dp->dfp.min_tmds_clock;
> +	max_tmds_clock = intel_dp_max_tmds_clock(intel_dp);
> +
> +	if (min_tmds_clock && tmds_clock < min_tmds_clock)
>  		return MODE_CLOCK_LOW;
> 
> -	if (intel_dp->dfp.max_tmds_clock &&
> -	    tmds_clock > intel_dp->dfp.max_tmds_clock)
> +	if (max_tmds_clock && tmds_clock > max_tmds_clock)
>  		return MODE_CLOCK_HIGH;
> 
>  	return MODE_OK;
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Declutter intel_dp_compute_config() a bit by moving the has_audio computation
> into a helper. HDMI already does the same thing.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 30 ++++++++++++++++---------
>  1 file changed, 20 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3394e4951fef..fc50802c9997 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1798,6 +1798,24 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct
> intel_dp *intel_dp,
> 
> 	intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
>  }
> 
> +static bool intel_dp_has_audio(struct intel_encoder *encoder,
> +			       const struct intel_crtc_state *crtc_state,
> +			       const struct drm_connector_state *conn_state) {
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	const struct intel_digital_connector_state *intel_conn_state =
> +		to_intel_digital_connector_state(conn_state);
> +
> +	if (!intel_dp_port_has_audio(i915, encoder->port))
> +		return false;
> +
> +	if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> +		return intel_dp->has_audio;
> +	else
> +		return intel_conn_state->force_audio == HDMI_AUDIO_ON; }
> +
>  int
>  intel_dp_compute_config(struct intel_encoder *encoder,
>  			struct intel_crtc_state *pipe_config, @@ -1807,14
> +1825,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode;
> -	enum port port = encoder->port;
>  	struct intel_connector *intel_connector = intel_dp->attached_connector;
> -	struct intel_digital_connector_state *intel_conn_state =
> -		to_intel_digital_connector_state(conn_state);
>  	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> DP_DPCD_QUIRK_CONSTANT_N);
>  	int ret = 0, output_bpp;
> 
> -	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)
> +	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port !=
> +PORT_A)
>  		pipe_config->has_pch_encoder = true;
> 
>  	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> @@ -1826,12 +1841,7 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  			return ret;
>  	}
> 
> -	if (!intel_dp_port_has_audio(dev_priv, port))
> -		pipe_config->has_audio = false;
> -	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> -		pipe_config->has_audio = intel_dp->has_audio;
> -	else
> -		pipe_config->has_audio = intel_conn_state->force_audio ==
> HDMI_AUDIO_ON;
> +	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config,
> +conn_state);
> 
>  	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
>  	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 04/12] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 04/12] drm/i915/dp:
> s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> intel_dp_hdmi_ycbcr420() does account for native DP 4:2:0 output as well, so lets
> rename it a bit.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index fc50802c9997..9720571438e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1157,8 +1157,8 @@ static bool intel_dp_supports_dsc(struct intel_dp
> *intel_dp,
>  		drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
>  }
> 
> -static bool intel_dp_hdmi_ycbcr420(struct intel_dp *intel_dp,
> -				   const struct intel_crtc_state *crtc_state)
> +static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
> +				 const struct intel_crtc_state *crtc_state)
>  {
>  	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420
> ||
>  		(crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR444 && @@ -1169,7 +1169,7 @@ static bool
> intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
>  				       const struct intel_crtc_state *crtc_state,
>  				       int bpc)
>  {
> -	bool ycbcr420_output = intel_dp_hdmi_ycbcr420(intel_dp, crtc_state);
> +	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
>  	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> 
>  	return intel_hdmi_bpc_possible(crtc_state, bpc,
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder
> intel_dp_compute_config() a bit
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Consolidate the double pfit call, and reorder things so that
> intel_dp_output_format() and intel_dp_compute_link_config() are back-to-back.
> They are intimately related, and will need to be called twice to properly handle the
> "4:2:0 also" modes.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++-------------
>  1 file changed, 10 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9720571438e9..a655af1ab359 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1832,15 +1832,6 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port !=
> PORT_A)
>  		pipe_config->has_pch_encoder = true;
> 
> -	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> -							    adjusted_mode);
> -
> -	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> -		ret = intel_panel_fitting(pipe_config, conn_state);
> -		if (ret)
> -			return ret;
> -	}
> -
>  	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config,
> conn_state);
> 
>  	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
> @@ -1848,10 +1839,6 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  		ret = intel_panel_compute_config(intel_connector,
> adjusted_mode);
>  		if (ret)
>  			return ret;
> -
> -		ret = intel_panel_fitting(pipe_config, conn_state);
> -		if (ret)
> -			return ret;
>  	}
> 
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) @@ -1867,10
> +1854,20 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> +	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> +							    adjusted_mode);
> +
>  	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
>  	if (ret < 0)
>  		return ret;
> 
> +	if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
> +	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> +		ret = intel_panel_fitting(pipe_config, conn_state);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	pipe_config->limited_color_range =
>  		intel_dp_limited_color_range(pipe_config, conn_state);
> 
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector rather than drm_connector

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector
> rather than drm_connector
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Prefer to use intel_connector over drm_connector. Also clean up the related variable
> names a bit.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 38 ++++++++++++-------------
>  1 file changed, 18 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index a655af1ab359..94faf3c28d2d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -786,13 +786,13 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp
> *intel_dp,  }
> 
>  static enum intel_output_format
> -intel_dp_output_format(struct drm_connector *connector,
> +intel_dp_output_format(struct intel_connector *connector,
>  		       const struct drm_display_mode *mode)  {
> -	struct intel_dp *intel_dp =
> intel_attached_dp(to_intel_connector(connector));
> -	const struct drm_display_info *info = &connector->display_info;
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	const struct drm_display_info *info = &connector->base.display_info;
> 
> -	if (!connector->ycbcr_420_allowed ||
> +	if (!connector->base.ycbcr_420_allowed ||
>  	    !drm_mode_is_420_only(info, mode))
>  		return INTEL_OUTPUT_FORMAT_RGB;
> 
> @@ -828,7 +828,7 @@ static int intel_dp_output_bpp(enum intel_output_format
> output_format, int bpp)  }
> 
>  static int
> -intel_dp_mode_min_output_bpp(struct drm_connector *connector,
> +intel_dp_mode_min_output_bpp(struct intel_connector *connector,
>  			     const struct drm_display_mode *mode)  {
>  	enum intel_output_format output_format = @@ -901,7 +901,7 @@
> intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	if (intel_dp->dfp.pcon_max_frl_bw) {
>  		int target_bw;
>  		int max_frl_bw;
> -		int bpp = intel_dp_mode_min_output_bpp(&connector->base,
> mode);
> +		int bpp = intel_dp_mode_min_output_bpp(connector, mode);
> 
>  		target_bw = bpp * target_clock;
> 
> @@ -937,12 +937,12 @@ static bool intel_dp_need_bigjoiner(struct intel_dp
> *intel_dp,  }
> 
>  static enum drm_mode_status
> -intel_dp_mode_valid(struct drm_connector *connector,
> +intel_dp_mode_valid(struct drm_connector *_connector,
>  		    struct drm_display_mode *mode)
>  {
> -	struct intel_dp *intel_dp =
> intel_attached_dp(to_intel_connector(connector));
> -	struct intel_connector *intel_connector = to_intel_connector(connector);
> -	struct drm_i915_private *dev_priv = to_i915(connector->dev);
> +	struct intel_connector *connector = to_intel_connector(_connector);
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  	const struct drm_display_mode *fixed_mode;
>  	int target_clock = mode->clock;
>  	int max_rate, mode_rate, max_lanes, max_link_clock; @@ -958,9 +958,9
> @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
>  		return MODE_H_ILLEGAL;
> 
> -	fixed_mode = intel_panel_fixed_mode(intel_connector, mode);
> +	fixed_mode = intel_panel_fixed_mode(connector, mode);
>  	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> -		status = intel_panel_mode_valid(intel_connector, mode);
> +		status = intel_panel_mode_valid(connector, mode);
>  		if (status != MODE_OK)
>  			return status;
> 
> @@ -1034,8 +1034,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode_rate > max_rate && !dsc)
>  		return MODE_CLOCK_HIGH;
> 
> -	status = intel_dp_mode_valid_downstream(intel_connector,
> -						mode, target_clock);
> +	status = intel_dp_mode_valid_downstream(connector, mode,
> +target_clock);
>  	if (status != MODE_OK)
>  		return status;
> 
> @@ -1825,7 +1824,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode;
> -	struct intel_connector *intel_connector = intel_dp->attached_connector;
> +	struct intel_connector *connector = intel_dp->attached_connector;
>  	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> DP_DPCD_QUIRK_CONSTANT_N);
>  	int ret = 0, output_bpp;
> 
> @@ -1834,9 +1833,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> 
>  	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config,
> conn_state);
> 
> -	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
> +	fixed_mode = intel_panel_fixed_mode(connector, adjusted_mode);
>  	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> -		ret = intel_panel_compute_config(intel_connector,
> adjusted_mode);
> +		ret = intel_panel_compute_config(connector, adjusted_mode);
>  		if (ret)
>  			return ret;
>  	}
> @@ -1854,8 +1853,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> -	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> -							    adjusted_mode);
> +	pipe_config->output_format = intel_dp_output_format(connector,
> +adjusted_mode);
> 
>  	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
>  	if (ret < 0)
> @@ -1913,7 +1911,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> 
>  	intel_vrr_compute_config(pipe_config, conn_state);
>  	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> -	intel_drrs_compute_config(intel_connector, pipe_config,
> +	intel_drrs_compute_config(connector, pipe_config,
>  				  output_bpp, constant_n);
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config,
> conn_state);
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format()
> usable for "4:2:0 also" modes
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Hoist the drm_mode_is_420_only() from intel_dp_output_format() into the caller.
> This will allow intel_dp_output_format() to be reused for "4:2:0 also" modes.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 94faf3c28d2d..a78522dc9b3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -787,13 +787,11 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp
> *intel_dp,
> 
>  static enum intel_output_format
>  intel_dp_output_format(struct intel_connector *connector,
> -		       const struct drm_display_mode *mode)
> +		       bool ycbcr_420_output)
>  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> -	const struct drm_display_info *info = &connector->base.display_info;
> 
> -	if (!connector->base.ycbcr_420_allowed ||
> -	    !drm_mode_is_420_only(info, mode))
> +	if (!connector->base.ycbcr_420_allowed || !ycbcr_420_output)
>  		return INTEL_OUTPUT_FORMAT_RGB;
> 
>  	if (intel_dp->dfp.rgb_to_ycbcr &&
> @@ -831,8 +829,9 @@ static int
>  intel_dp_mode_min_output_bpp(struct intel_connector *connector,
>  			     const struct drm_display_mode *mode)  {
> +	const struct drm_display_info *info = &connector->base.display_info;
>  	enum intel_output_format output_format =
> -		intel_dp_output_format(connector, mode);
> +		intel_dp_output_format(connector, drm_mode_is_420_only(info,
> mode));
> 
>  	return intel_dp_output_bpp(output_format,
> intel_dp_min_bpp(output_format));  } @@ -1825,6 +1824,7 @@
> intel_dp_compute_config(struct intel_encoder *encoder,
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode;
>  	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
>  	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> DP_DPCD_QUIRK_CONSTANT_N);
>  	int ret = 0, output_bpp;
> 
> @@ -1853,7 +1853,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> -	pipe_config->output_format = intel_dp_output_format(connector,
> adjusted_mode);
> +	pipe_config->output_format =
> +		intel_dp_output_format(connector, drm_mode_is_420_only(info,
> +adjusted_mode));
> 
>  	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
>  	if (ret < 0)
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock handling

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock
> handling
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Rework the HDMI DFP TMDS clock checks to also check at 8bpc.
> Previously we only checked the deep color cases. But I suppose a sink could
> potentially declare "4:2:0 also" modes that only actually fit within its own limits
> when using 4:2:0. Even if that is too nuts to be real there is no real harm in running
> through the full checks for everything.

Yeah this should be ok. Changes look Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 35 ++++++++++++++++++-------
>  1 file changed, 25 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index a78522dc9b3c..436d0b0f0b76 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1163,16 +1163,28 @@ static bool intel_dp_is_ycbcr420(struct intel_dp
> *intel_dp,
>  		 intel_dp->dfp.ycbcr_444_to_420);
>  }
> 
> -static bool intel_dp_hdmi_bpc_possible(struct intel_dp *intel_dp,
> -				       const struct intel_crtc_state *crtc_state,
> -				       int bpc)
> +static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
> +				     const struct intel_crtc_state *crtc_state,
> +				     int bpc)
>  {
>  	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
>  	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> 
> -	return intel_hdmi_bpc_possible(crtc_state, bpc,
> -				       intel_dp->has_hdmi_sink, ycbcr420_output) &&
> -		intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output)
> == MODE_OK;
> +	/*
> +	 * Current bpc could already be below 8bpc due to
> +	 * FDI bandwidth constraints or other limits.
> +	 * HDMI minimum is 8bpc however.
> +	 */
> +	bpc = max(bpc, 8);
> +
> +	for (; bpc >= 8; bpc -= 2) {
> +		if (intel_hdmi_bpc_possible(crtc_state, bpc,
> +					    intel_dp->has_hdmi_sink,
> ycbcr420_output) &&
> +		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output)
> == MODE_OK)
> +			return bpc;
> +	}
> +
> +	return -EINVAL;
>  }
> 
>  static int intel_dp_max_bpp(struct intel_dp *intel_dp, @@ -1188,10 +1200,13 @@
> static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  		bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> 
>  	if (intel_dp->dfp.min_tmds_clock) {
> -		for (; bpc >= 10; bpc -= 2) {
> -			if (intel_dp_hdmi_bpc_possible(intel_dp, crtc_state, bpc))
> -				break;
> -		}
> +		int max_hdmi_bpc;
> +
> +		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state,
> bpc);
> +		if (max_hdmi_bpc < 0)
> +			return 0;
> +
> +		bpc = min(bpc, max_hdmi_bpc);
>  	}
> 
>  	bpp = bpc * 3;
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also" modes for DP

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also"
> modes for DP
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently we only support "4:2:0 also" modes on native HDMI.
> Extend that support for DP as well.
> 
> With all the HDMI DFP TMDS clock handling sorted out this is now going to work for
> both native DP and DP->HDMI converters. As with native HDMI we first check if RGB
> output is possible, and if not we try YCbCr 4:2:0 instead.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 67 ++++++++++++++++++++++---
>  1 file changed, 59 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 436d0b0f0b76..3dbb68fa4e51 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -895,6 +895,8 @@ intel_dp_mode_valid_downstream(struct intel_connector
> *connector,  {
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
>  	const struct drm_display_info *info = &connector->base.display_info;
> +	enum drm_mode_status status;
> +	bool ycbcr_420_only;
> 
>  	/* If PCON supports FRL MODE, check FRL bandwidth constraints */
>  	if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -919,9 +921,25 @@ intel_dp_mode_valid_downstream(struct intel_connector
> *connector,
>  	    target_clock > intel_dp->dfp.max_dotclock)
>  		return MODE_CLOCK_HIGH;
> 
> +	ycbcr_420_only = drm_mode_is_420_only(info, mode);
> +
>  	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> -	return intel_dp_tmds_clock_valid(intel_dp, target_clock, 8,
> -					 drm_mode_is_420_only(info, mode));
> +	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> +					   8, ycbcr_420_only);
> +
> +	if (status != MODE_OK) {
> +		if (ycbcr_420_only ||
> +		    !connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420_also(info, mode))
> +			return status;
> +
> +		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> +						   8, true);
> +		if (status != MODE_OK)
> +			return status;
> +	}
> +
> +	return MODE_OK;
>  }
> 
>  static bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, @@ -1829,6 +1847,43
> @@ static bool intel_dp_has_audio(struct intel_encoder *encoder,
>  		return intel_conn_state->force_audio == HDMI_AUDIO_ON;  }
> 
> +static int
> +intel_dp_compute_output_format(struct intel_encoder *encoder,
> +			       struct intel_crtc_state *crtc_state,
> +			       struct drm_connector_state *conn_state) {
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	const struct drm_display_info *info = &connector->base.display_info;
> +	const struct drm_display_mode *adjusted_mode = &crtc_state-
> >hw.adjusted_mode;
> +	bool ycbcr_420_only;
> +	int ret;
> +
> +	ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> +
> +	crtc_state->output_format = intel_dp_output_format(connector,
> +ycbcr_420_only);
> +
> +	if (ycbcr_420_only && !intel_dp_is_ycbcr420(intel_dp, crtc_state)) {
> +		drm_dbg_kms(&i915->drm,
> +			    "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible.
> Falling back to RGB.\n");
> +		crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
> +	}
> +
> +	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
> +	if (ret) {
> +		if (intel_dp_is_ycbcr420(intel_dp, crtc_state) ||
> +		    !connector->base.ycbcr_420_allowed ||
> +		    !drm_mode_is_420_also(info, adjusted_mode))
> +			return ret;
> +
> +		crtc_state->output_format = intel_dp_output_format(connector,
> true);
> +		ret = intel_dp_compute_link_config(encoder, crtc_state,
> conn_state);
> +	}
> +
> +	return ret;
> +}
> +
>  int
>  intel_dp_compute_config(struct intel_encoder *encoder,
>  			struct intel_crtc_state *pipe_config, @@ -1839,7 +1894,6
> @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	const struct drm_display_mode *fixed_mode;
>  	struct intel_connector *connector = intel_dp->attached_connector;
> -	const struct drm_display_info *info = &connector->base.display_info;
>  	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
> DP_DPCD_QUIRK_CONSTANT_N);
>  	int ret = 0, output_bpp;
> 
> @@ -1868,11 +1922,8 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> -	pipe_config->output_format =
> -		intel_dp_output_format(connector, drm_mode_is_420_only(info,
> adjusted_mode));
> -
> -	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
> -	if (ret < 0)
> +	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state);
> +	if (ret)
>  		return ret;
> 
>  	if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS
> clock limit handling for DP HDMI DFPs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> With native HDMI we allow the user to override the mode with something that may
> not respect the downstream (sink,dual-mode adapter) TMDS clock limits. Let's reuse
> the same logic for DP HDMI DFPs so that behaviour is more or less uniform.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 51 ++++++++++++++++++-------
>  1 file changed, 38 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3dbb68fa4e51..053853a3054e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -870,10 +870,14 @@ static int intel_dp_max_tmds_clock(struct intel_dp
> *intel_dp)
> 
>  static enum drm_mode_status
>  intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
> -			  int clock, int bpc, bool ycbcr420_output)
> +			  int clock, int bpc, bool ycbcr420_output,
> +			  bool respect_downstream_limits)
>  {
>  	int tmds_clock, min_tmds_clock, max_tmds_clock;
> 
> +	if (!respect_downstream_limits)
> +		return MODE_OK;
> +
>  	tmds_clock = intel_hdmi_tmds_clock(clock, bpc, ycbcr420_output);
> 
>  	min_tmds_clock = intel_dp->dfp.min_tmds_clock; @@ -925,7 +929,7 @@
> intel_dp_mode_valid_downstream(struct intel_connector *connector,
> 
>  	/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
>  	status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -					   8, ycbcr_420_only);
> +					   8, ycbcr_420_only, true);
> 
>  	if (status != MODE_OK) {
>  		if (ycbcr_420_only ||
> @@ -934,7 +938,7 @@ intel_dp_mode_valid_downstream(struct intel_connector
> *connector,
>  			return status;
> 
>  		status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> -						   8, true);
> +						   8, true, true);
>  		if (status != MODE_OK)
>  			return status;
>  	}
> @@ -1183,7 +1187,7 @@ static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
> 
>  static int intel_dp_hdmi_compute_bpc(struct intel_dp *intel_dp,
>  				     const struct intel_crtc_state *crtc_state,
> -				     int bpc)
> +				     int bpc, bool respect_downstream_limits)
>  {
>  	bool ycbcr420_output = intel_dp_is_ycbcr420(intel_dp, crtc_state);
>  	int clock = crtc_state->hw.adjusted_mode.crtc_clock;
> @@ -1195,10 +1199,19 @@ static int intel_dp_hdmi_compute_bpc(struct intel_dp
> *intel_dp,
>  	 */
>  	bpc = max(bpc, 8);
> 
> +	/*
> +	 * We will never exceed downstream TMDS clock limits while
> +	 * attempting deep color. If the user insists on forcing an
> +	 * out of spec mode they will have to be satisfied with 8bpc.
> +	 */
> +	if (!respect_downstream_limits)
> +		bpc = 8;
> +
>  	for (; bpc >= 8; bpc -= 2) {
>  		if (intel_hdmi_bpc_possible(crtc_state, bpc,
>  					    intel_dp->has_hdmi_sink,
> ycbcr420_output) &&
> -		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output)
> == MODE_OK)
> +		    intel_dp_tmds_clock_valid(intel_dp, clock, bpc, ycbcr420_output,
> +					      respect_downstream_limits) ==
> MODE_OK)
>  			return bpc;
>  	}
> 
> @@ -1206,7 +1219,8 @@ static int intel_dp_hdmi_compute_bpc(struct intel_dp
> *intel_dp,  }
> 
>  static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> -			    const struct intel_crtc_state *crtc_state)
> +			    const struct intel_crtc_state *crtc_state,
> +			    bool respect_downstream_limits)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	struct intel_connector *intel_connector = intel_dp->attached_connector;
> @@ -1220,7 +1234,8 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  	if (intel_dp->dfp.min_tmds_clock) {
>  		int max_hdmi_bpc;
> 
> -		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state,
> bpc);
> +		max_hdmi_bpc = intel_dp_hdmi_compute_bpc(intel_dp, crtc_state,
> bpc,
> +
> respect_downstream_limits);
>  		if (max_hdmi_bpc < 0)
>  			return 0;
> 
> @@ -1539,7 +1554,8 @@ static int intel_dp_dsc_compute_config(struct intel_dp
> *intel_dp,  static int  intel_dp_compute_link_config(struct intel_encoder *encoder,
>  			     struct intel_crtc_state *pipe_config,
> -			     struct drm_connector_state *conn_state)
> +			     struct drm_connector_state *conn_state,
> +			     bool respect_downstream_limits)
>  {
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> @@ -1556,7 +1572,7 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>  	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
> 
>  	limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
> -	limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config);
> +	limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config,
> +respect_downstream_limits);
> 
>  	if (intel_dp->use_max_params) {
>  		/*
> @@ -1850,7 +1866,8 @@ static bool intel_dp_has_audio(struct intel_encoder
> *encoder,  static int  intel_dp_compute_output_format(struct intel_encoder
> *encoder,
>  			       struct intel_crtc_state *crtc_state,
> -			       struct drm_connector_state *conn_state)
> +			       struct drm_connector_state *conn_state,
> +			       bool respect_downstream_limits)
>  {
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder); @@ -1870,7 +1887,8
> @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
>  		crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB;
>  	}
> 
> -	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state);
> +	ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> +					   respect_downstream_limits);
>  	if (ret) {
>  		if (intel_dp_is_ycbcr420(intel_dp, crtc_state) ||
>  		    !connector->base.ycbcr_420_allowed || @@ -1878,7 +1896,8
> @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
>  			return ret;
> 
>  		crtc_state->output_format = intel_dp_output_format(connector,
> true);
> -		ret = intel_dp_compute_link_config(encoder, crtc_state,
> conn_state);
> +		ret = intel_dp_compute_link_config(encoder, crtc_state,
> conn_state,
> +						   respect_downstream_limits);
>  	}
> 
>  	return ret;
> @@ -1922,7 +1941,13 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> -	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state);
> +	/*
> +	 * Try to respect downstream TMDS clock limits first, if
> +	 * that fails assume the user might know something we don't.
> +	 */
> +	ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state,
> true);
> +	if (ret)
> +		ret = intel_dp_compute_output_format(encoder, pipe_config,
> +conn_state, false);
>  	if (ret)
>  		return ret;
> 
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix

[Shankar, Uma]

> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Shankar, Uma
> <uma.shankar@intel.com>
> Subject: [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Our YCbCr output is always supposed to be limited range BT.709.
> That's what we send with native HDMI. The conn_state->colorspace stuff is entirely
> independent of that and is not supposed to alter the generated output in any way. If
> we want a way to do that then we need a new proprty for it.
> 
> Make it so that the RGB->YCbCr conversion when performed by the DPF will match
> the BT.709 we would transmit with native HDMI.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 38 ++-----------------------
>  1 file changed, 3 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 053853a3054e..d3d458b3267d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2574,38 +2574,8 @@ void intel_dp_configure_protocol_converter(struct
> intel_dp *intel_dp,
>  			    "Failed to %s protocol converter YCbCr 4:2:0 conversion
> mode\n",
>  			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
> 
> -	tmp = 0;
> -	if (intel_dp->dfp.rgb_to_ycbcr) {
> -		bool bt2020, bt709;
> -
> -		/*
> -		 * FIXME: Currently if userspace selects BT2020 or BT709, but PCON
> supports only
> -		 * RGB->YCbCr for BT601 colorspace, we go ahead with BT601, as
> default.
> -		 *
> -		 */
> -		tmp = DP_CONVERSION_BT601_RGB_YCBCR_ENABLE;
> -
> -		bt2020 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> >dpcd,
> -								   intel_dp-
> >downstream_ports,
> -
> DP_DS_HDMI_BT2020_RGB_YCBCR_CONV);
> -		bt709 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> >dpcd,
> -								  intel_dp-
> >downstream_ports,
> -
> DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> -		switch (crtc_state->infoframes.vsc.colorimetry) {
> -		case DP_COLORIMETRY_BT2020_RGB:
> -		case DP_COLORIMETRY_BT2020_YCC:
> -			if (bt2020)
> -				tmp =
> DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE;
> -			break;
> -		case DP_COLORIMETRY_BT709_YCC:
> -		case DP_COLORIMETRY_XVYCC_709:
> -			if (bt709)
> -				tmp =
> DP_CONVERSION_BT709_RGB_YCBCR_ENABLE;
> -			break;
> -		default:
> -			break;
> -		}
> -	}
> +	tmp = intel_dp->dfp.rgb_to_ycbcr ?
> +		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
> 
>  	if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0)
>  		drm_dbg_kms(&i915->drm,
> @@ -4459,9 +4429,7 @@ intel_dp_update_420(struct intel_dp *intel_dp)
>  							intel_dp-
> >downstream_ports);
>  	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> >dpcd,
>  								 intel_dp-
> >downstream_ports,
> -
> DP_DS_HDMI_BT601_RGB_YCBCR_CONV |
> -
> DP_DS_HDMI_BT709_RGB_YCBCR_CONV |
> -
> DP_DS_HDMI_BT2020_RGB_YCBCR_CONV);
> +
> DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> 
>  	if (DISPLAY_VER(i915) >= 11) {
>  		/* Let PCON convert from RGB->YCbCr if possible */
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now

[Shankar, Uma]

> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Shankar, Uma
> <uma.shankar@intel.com>
> Subject: [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for
> now
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We lack sufficient state tracking to figure out whether we want the DFP to perform
> the RGB->YCbCr conversion for us or not. So currently we are blindly just enabling
> that all the time when supported by the DFP. That is nonsense. So until we imporve
> our state tracking for this just disable the feature.
> 
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index d3d458b3267d..a57581198a47 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1180,6 +1180,7 @@ static bool intel_dp_supports_dsc(struct intel_dp
> *intel_dp,  static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
>  				 const struct intel_crtc_state *crtc_state)  {
> +	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
>  	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420
> ||
>  		(crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR444 &&
>  		 intel_dp->dfp.ycbcr_444_to_420);
> @@ -2574,6 +2575,7 @@ void intel_dp_configure_protocol_converter(struct
> intel_dp *intel_dp,
>  			    "Failed to %s protocol converter YCbCr 4:2:0 conversion
> mode\n",
>  			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
> 
> +	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
>  	tmp = intel_dp->dfp.rgb_to_ycbcr ?
>  		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
> 
> @@ -4430,6 +4432,14 @@ intel_dp_update_420(struct intel_dp *intel_dp)
>  	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> >dpcd,
>  								 intel_dp-
> >downstream_ports,
> 
> DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> +	/*
> +	 * FIXME need to actually track whether we're really
> +	 * going to be doing the RGB->YCbCr connversion or not.
> +	 * We can't tell by simply looking at intel_dp->dfp.rgb_to_ycbcr.
> +	 * Readout is going to annoying due to having to read that
> +	 * state from external hardware that may vanish at any time :(
> +	 */
> +	rgb_to_ycbcr = false;

I think this will break 8k yuv pcon case as of now.
@Nautiyal, Ankit K Can we get that fixed. We will need 8k YUV from source due to
bandwidth constraints.

Rest of the series all looks nice and good.

Regards,
Uma Shankar

>  	if (DISPLAY_VER(i915) >= 11) {
>  		/* Let PCON convert from RGB->YCbCr if possible */
> --
> 2.34.1

Re: [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now

[Ville Syrjälä]

On Fri, Apr 01, 2022 at 07:00:02AM +0000, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Sent: Tuesday, March 22, 2022 5:30 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Shankar, Uma
> > <uma.shankar@intel.com>
> > Subject: [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for
> > now
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > We lack sufficient state tracking to figure out whether we want the DFP to perform
> > the RGB->YCbCr conversion for us or not. So currently we are blindly just enabling
> > that all the time when supported by the DFP. That is nonsense. So until we imporve
> > our state tracking for this just disable the feature.
> > 
> > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > Cc: Uma Shankar <uma.shankar@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index d3d458b3267d..a57581198a47 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1180,6 +1180,7 @@ static bool intel_dp_supports_dsc(struct intel_dp
> > *intel_dp,  static bool intel_dp_is_ycbcr420(struct intel_dp *intel_dp,
> >  				 const struct intel_crtc_state *crtc_state)  {
> > +	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
> >  	return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420
> > ||
> >  		(crtc_state->output_format ==
> > INTEL_OUTPUT_FORMAT_YCBCR444 &&
> >  		 intel_dp->dfp.ycbcr_444_to_420);
> > @@ -2574,6 +2575,7 @@ void intel_dp_configure_protocol_converter(struct
> > intel_dp *intel_dp,
> >  			    "Failed to %s protocol converter YCbCr 4:2:0 conversion
> > mode\n",
> >  			    str_enable_disable(intel_dp->dfp.ycbcr_444_to_420));
> > 
> > +	/* FIXME see intel_dp_update_420() regarding rgb_to_ycbcr */
> >  	tmp = intel_dp->dfp.rgb_to_ycbcr ?
> >  		DP_CONVERSION_BT709_RGB_YCBCR_ENABLE : 0;
> > 
> > @@ -4430,6 +4432,14 @@ intel_dp_update_420(struct intel_dp *intel_dp)
> >  	rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp-
> > >dpcd,
> >  								 intel_dp-
> > >downstream_ports,
> > 
> > DP_DS_HDMI_BT709_RGB_YCBCR_CONV);
> > +	/*
> > +	 * FIXME need to actually track whether we're really
> > +	 * going to be doing the RGB->YCbCr connversion or not.
> > +	 * We can't tell by simply looking at intel_dp->dfp.rgb_to_ycbcr.
> > +	 * Readout is going to annoying due to having to read that
> > +	 * state from external hardware that may vanish at any time :(
> > +	 */
> > +	rgb_to_ycbcr = false;
> 
> I think this will break 8k yuv pcon case as of now.
> @Nautiyal, Ankit K Can we get that fixed. We will need 8k YUV from source due to
> bandwidth constraints.
> 
> Rest of the series all looks nice and good.

Left this one alone for now. The FRL bandwidth stuff needs more work as
well anyway, so someone needs to take a good look at all of this at some
point.

Pushed the rest. Thanks for the review.

-- 
Ville Syrjälä
Intel