From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, wg@grandegger.com, mkl@pengutronix.de, davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, qiangqing.zhang@nxp.com Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, netdev@vger.kernel.org, Peng Fan <peng.fan@nxp.com> Subject: [PATCH 0/4] dt-bindings: imx: add nvmem property Date: Thu, 24 Mar 2022 12:20:20 +0800 [thread overview] Message-ID: <20220324042024.26813-1-peng.fan@oss.nxp.com> (raw) From: Peng Fan <peng.fan@nxp.com> To i.MX SoC, there are many variants, such as i.MX8M Plus which feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc. But i.MX8M Plus has many parts, one part may not have FLEXCAN, the other part may not have eQOS or GPU. But we use one device tree to support i.MX8MP including its parts, then we need update device tree to mark the disabled IP status "disabled". In NXP U-Boot, we hardcoded node path and runtime update device tree status in U-Boot according to fuse value. But this method is not scalable and need encoding all the node paths that needs check. By introducing nvmem property for each node that needs runtime update status property accoridng fuse value, we could use one Bootloader code piece to support all i.MX SoCs. The drawback is we need nvmem property for all the nodes which maybe fused out. Rob: I only include limited node bindings in this patchset, and not include device tree patch. Just wanna to see whether you agree this approach. If you agree, I'll later post device tree part and other dt-bindings update, such as MU, USB and etc. Thanks. Example as below: flexcan1: can@308c0000 { .... nvmem-cells = <&flexcan_disabled>; nvmem-cell-names = "disabled"; }; flexcan2: can@308d0000 { .... nvmem-cells = <&flexcan_disabled>; nvmem-cell-names = "disabled"; }; ocotp: efuse@30350000 { compatible = "fsl,imx8mp-ocotp", "fsl,imx8mm-ocotp", "syscon"; reg = <0x30350000 0x10000>; clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>; /* For nvmem subnodes */ #address-cells = <1>; #size-cells = <1>; m7_disabled: m7@10 { reg = <0x10 4>; bits = <21 1>; }; g1_disabled: g1@10 { reg = <0x10 4>; bits = <24 1>; }; g2_disabled: g2@10 { reg = <0x10 4>; bits = <25 1>; }; can_disabled: can@10 { reg = <0x10 4>; bits = <28 1>; }; canfd_disabled: canfd@10 { reg = <0x10 4>; bits = <29 1>; }; vc8000e_disabled: vc8000e@10 { reg = <0x10 4>; bits = <30 1>; }; isp1_disabled: isp1@10 { reg = <0x14 4>; bits = <0 1>; }; isp2_disabled: isp2@10 { reg = <0x14 4>; bits = <1 1>; }; dewrap_disabled: dewrap@10 { reg = <0x14 4>; bits = <2 1>; }; npu_disabled: dewrap@10 { reg = <0x14 4>; bits = <3 1>; }; dsp_disabled: dewrap@10 { reg = <0x14 4>; bits = <4 1>; }; asrc_disabled: dewrap@10 { reg = <0x14 4>; bits = <5 1>; }; gpu2d_disabled: gpu2d@10 { reg = <0x14 4>; bits = <6 1>; }; gpu3d_disabled: gpu3d@10 { reg = <0x14 4>; bits = <7 1>; }; usb1_disabled: usb1@10 { reg = <0x14 4>; bits = <8 1>; }; usb2_disabled: usb2@10 { reg = <0x14 4>; bits = <9 1>; }; pcie1_disabled: pcie1@10 { reg = <0x14 4>; bits = <11 1>; }; enet1_disabled: enet1@10 { reg = <0x14 4>; bits = <13 1>; }; enet2_disabled: enet2@10 { reg = <0x14 4>; bits = <14 1>; }; csi1_disabled: csi1@10 { reg = <0x14 4>; bits = <15 1>; }; csi2_disabled: csi1@10 { reg = <0x14 4>; bits = <16 1>; }; dsi1_disabled: dsi1@10 { reg = <0x14 4>; bits = <17 1>; }; lvds1_disabled: lvds1@10 { reg = <0x14 4>; bits = <19 1>; }; lvds2_disabled: lvds1@10 { reg = <0x14 4>; bits = <19 1>; }; eth_mac1: mac-address@90 { reg = <0x90 6>; }; eth_mac2: mac-address@96 { reg = <0x96 6>; }; }; Peng Fan (4): dt-bindings: can: fsl,flexcan: introduce nvmem property dt-bindings: net: fsl,fec: introduce nvmem property dt-bindings: mmc: imx-esdhc: introduce nvmem property dt-bindings: net: imx-dwmac: introduce nvmem property Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 9 +++++++++ .../devicetree/bindings/net/can/fsl,flexcan.yaml | 9 +++++++++ Documentation/devicetree/bindings/net/fsl,fec.yaml | 9 +++++++++ Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++ 4 files changed, 36 insertions(+) -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, wg@grandegger.com, mkl@pengutronix.de, davem@davemloft.net, kuba@kernel.org, pabeni@redhat.com, qiangqing.zhang@nxp.com Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, netdev@vger.kernel.org, Peng Fan <peng.fan@nxp.com> Subject: [PATCH 0/4] dt-bindings: imx: add nvmem property Date: Thu, 24 Mar 2022 12:20:20 +0800 [thread overview] Message-ID: <20220324042024.26813-1-peng.fan@oss.nxp.com> (raw) From: Peng Fan <peng.fan@nxp.com> To i.MX SoC, there are many variants, such as i.MX8M Plus which feature 4 A53, GPU, VPU, SDHC, FLEXCAN, FEC, eQOS and etc. But i.MX8M Plus has many parts, one part may not have FLEXCAN, the other part may not have eQOS or GPU. But we use one device tree to support i.MX8MP including its parts, then we need update device tree to mark the disabled IP status "disabled". In NXP U-Boot, we hardcoded node path and runtime update device tree status in U-Boot according to fuse value. But this method is not scalable and need encoding all the node paths that needs check. By introducing nvmem property for each node that needs runtime update status property accoridng fuse value, we could use one Bootloader code piece to support all i.MX SoCs. The drawback is we need nvmem property for all the nodes which maybe fused out. Rob: I only include limited node bindings in this patchset, and not include device tree patch. Just wanna to see whether you agree this approach. If you agree, I'll later post device tree part and other dt-bindings update, such as MU, USB and etc. Thanks. Example as below: flexcan1: can@308c0000 { .... nvmem-cells = <&flexcan_disabled>; nvmem-cell-names = "disabled"; }; flexcan2: can@308d0000 { .... nvmem-cells = <&flexcan_disabled>; nvmem-cell-names = "disabled"; }; ocotp: efuse@30350000 { compatible = "fsl,imx8mp-ocotp", "fsl,imx8mm-ocotp", "syscon"; reg = <0x30350000 0x10000>; clocks = <&clk IMX8MP_CLK_OCOTP_ROOT>; /* For nvmem subnodes */ #address-cells = <1>; #size-cells = <1>; m7_disabled: m7@10 { reg = <0x10 4>; bits = <21 1>; }; g1_disabled: g1@10 { reg = <0x10 4>; bits = <24 1>; }; g2_disabled: g2@10 { reg = <0x10 4>; bits = <25 1>; }; can_disabled: can@10 { reg = <0x10 4>; bits = <28 1>; }; canfd_disabled: canfd@10 { reg = <0x10 4>; bits = <29 1>; }; vc8000e_disabled: vc8000e@10 { reg = <0x10 4>; bits = <30 1>; }; isp1_disabled: isp1@10 { reg = <0x14 4>; bits = <0 1>; }; isp2_disabled: isp2@10 { reg = <0x14 4>; bits = <1 1>; }; dewrap_disabled: dewrap@10 { reg = <0x14 4>; bits = <2 1>; }; npu_disabled: dewrap@10 { reg = <0x14 4>; bits = <3 1>; }; dsp_disabled: dewrap@10 { reg = <0x14 4>; bits = <4 1>; }; asrc_disabled: dewrap@10 { reg = <0x14 4>; bits = <5 1>; }; gpu2d_disabled: gpu2d@10 { reg = <0x14 4>; bits = <6 1>; }; gpu3d_disabled: gpu3d@10 { reg = <0x14 4>; bits = <7 1>; }; usb1_disabled: usb1@10 { reg = <0x14 4>; bits = <8 1>; }; usb2_disabled: usb2@10 { reg = <0x14 4>; bits = <9 1>; }; pcie1_disabled: pcie1@10 { reg = <0x14 4>; bits = <11 1>; }; enet1_disabled: enet1@10 { reg = <0x14 4>; bits = <13 1>; }; enet2_disabled: enet2@10 { reg = <0x14 4>; bits = <14 1>; }; csi1_disabled: csi1@10 { reg = <0x14 4>; bits = <15 1>; }; csi2_disabled: csi1@10 { reg = <0x14 4>; bits = <16 1>; }; dsi1_disabled: dsi1@10 { reg = <0x14 4>; bits = <17 1>; }; lvds1_disabled: lvds1@10 { reg = <0x14 4>; bits = <19 1>; }; lvds2_disabled: lvds1@10 { reg = <0x14 4>; bits = <19 1>; }; eth_mac1: mac-address@90 { reg = <0x90 6>; }; eth_mac2: mac-address@96 { reg = <0x96 6>; }; }; Peng Fan (4): dt-bindings: can: fsl,flexcan: introduce nvmem property dt-bindings: net: fsl,fec: introduce nvmem property dt-bindings: mmc: imx-esdhc: introduce nvmem property dt-bindings: net: imx-dwmac: introduce nvmem property Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml | 9 +++++++++ .../devicetree/bindings/net/can/fsl,flexcan.yaml | 9 +++++++++ Documentation/devicetree/bindings/net/fsl,fec.yaml | 9 +++++++++ Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 9 +++++++++ 4 files changed, 36 insertions(+) -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2022-03-24 3:40 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-24 4:20 Peng Fan (OSS) [this message] 2022-03-24 4:20 ` [PATCH 0/4] dt-bindings: imx: add nvmem property Peng Fan (OSS) 2022-03-24 4:20 ` [PATCH 1/4] dt-bindings: can: fsl,flexcan: introduce " Peng Fan (OSS) 2022-03-24 4:20 ` Peng Fan (OSS) 2022-03-24 4:20 ` [PATCH 2/4] dt-bindings: net: fsl,fec: " Peng Fan (OSS) 2022-03-24 4:20 ` Peng Fan (OSS) 2022-03-24 14:18 ` Rob Herring 2022-03-24 14:18 ` Rob Herring 2022-03-24 4:20 ` [PATCH 3/4] dt-bindings: mmc: imx-esdhc: " Peng Fan (OSS) 2022-03-24 4:20 ` Peng Fan (OSS) 2022-03-24 4:20 ` [PATCH 4/4] dt-bindings: net: imx-dwmac: " Peng Fan (OSS) 2022-03-24 4:20 ` Peng Fan (OSS) 2022-03-24 14:18 ` Rob Herring 2022-03-24 14:18 ` Rob Herring 2022-03-24 11:11 ` [PATCH 0/4] dt-bindings: imx: add " Uwe Kleine-König 2022-03-24 11:11 ` Uwe Kleine-König 2022-03-24 11:16 ` Ahmad Fatoum 2022-03-24 11:16 ` Ahmad Fatoum 2022-03-24 12:21 ` Peng Fan 2022-03-24 12:21 ` Peng Fan 2022-04-01 0:15 ` Rob Herring 2022-04-01 0:15 ` Rob Herring 2022-04-02 1:52 ` Peng Fan 2022-04-02 1:52 ` Peng Fan 2022-04-04 15:15 ` Rob Herring 2022-04-04 15:15 ` Rob Herring
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220324042024.26813-1-peng.fan@oss.nxp.com \ --to=peng.fan@oss.nxp.com \ --cc=davem@davemloft.net \ --cc=devicetree@vger.kernel.org \ --cc=festevam@gmail.com \ --cc=kernel@pengutronix.de \ --cc=krzk+dt@kernel.org \ --cc=kuba@kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-can@vger.kernel.org \ --cc=linux-imx@nxp.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mmc@vger.kernel.org \ --cc=mkl@pengutronix.de \ --cc=netdev@vger.kernel.org \ --cc=pabeni@redhat.com \ --cc=peng.fan@nxp.com \ --cc=qiangqing.zhang@nxp.com \ --cc=robh+dt@kernel.org \ --cc=s.hauer@pengutronix.de \ --cc=shawnguo@kernel.org \ --cc=ulf.hansson@linaro.org \ --cc=wg@grandegger.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.