From: Biju Das <biju.das.jz@bp.renesas.com> To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de> Cc: Biju Das <biju.das.jz@bp.renesas.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be>, Chris Paterson <Chris.Paterson2@renesas.com>, Biju Das <biju.das@bp.renesas.com>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH v2 0/2] Add RZ/G2L DSI driver Date: Mon, 28 Mar 2022 07:49:29 +0100 [thread overview] Message-ID: <20220328064931.11612-1-biju.das.jz@bp.renesas.com> (raw) This patch series aims to support the MIPI DSI encoder found in the RZ/G2L SoC. It currently supports DSI mode only. This unit supports MIPI Alliance Specification for Display Serial Interface (DSI) Specification. This unit provides a solution for transmitting MIPI DSI compliant digital video and packets. Normative References are below. * MIPI Alliance Specification for Display Serial Interface Version 1.3.1 * MIPI Alliance Specification for D-PHY Version 2.1 The following are key features of this unit. * 1 channel * The number of Lane: 4-lane * Support up to Full HD (1920 × 1080), 60 fps (RGB888) * Maximum Bandwidth: 1.5 Gbps per lane * Support Output Data Format: RGB666 / RGB888 v1->v2: * Added full path for dsi-controller.yaml * Modeled DSI + D-PHY as single block and updated reg property * Fixed typo D_PHY->D-PHY * Updated description * Added interrupts and interrupt-names and updated the example * Driver rework based on dt-binding changes (DSI + D-PHY) as single block * Replaced link_mmio and phy_mmio with mmio in struct rzg2l_mipi_dsi * Replaced rzg2l_mipi_phy_write with rzg2l_mipi_dsi_phy_write and rzg2l_mipi_dsi_link_write * Replaced rzg2l_mipi_phy_read->rzg2l_mipi_dsi_link_read RFC->v1: * Added a ref to dsi-controller.yaml. * Added "depends on ARCH_RENESAS || COMPILE_TEST" on KCONFIG and dropped DRM as it is implied by DRM_BRIDGE * Used devm_reset_control_get_exclusive() for reset handle * Removed bool hsclkmode from struct rzg2l_mipi_dsi * Added error check for pm, using pm_runtime_resume_and_get() instead of pm_runtime_get_sync() * Added check for unsupported formats in rzg2l_mipi_dsi_host_attach() * Avoided read-modify-write stopping hsclock * Used devm_platform_ioremap_resource for resource allocation * Removed unnecessary assert call from probe and remove. * wrap the line after the PTR_ERR() in probe() * Updated reset failure messages in probe * Fixed the typo arstc->prstc * Made hex constants to lower case. RFC: * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-22-biju.das.jz@bp.renesas.com/ * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-23-biju.das.jz@bp.renesas.com/ Biju Das (2): dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings drm: rcar-du: Add RZ/G2L DSI driver .../bindings/display/bridge/renesas,dsi.yaml | 175 +++++ drivers/gpu/drm/rcar-du/Kconfig | 8 + drivers/gpu/drm/rcar-du/Makefile | 1 + drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c | 686 ++++++++++++++++++ drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h | 149 ++++ 5 files changed, 1019 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Biju Das <biju.das.jz@bp.renesas.com> To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de> Cc: Chris Paterson <Chris.Paterson2@renesas.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>, dri-devel@lists.freedesktop.org, Biju Das <biju.das@bp.renesas.com>, linux-renesas-soc@vger.kernel.org, Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Biju Das <biju.das.jz@bp.renesas.com> Subject: [PATCH v2 0/2] Add RZ/G2L DSI driver Date: Mon, 28 Mar 2022 07:49:29 +0100 [thread overview] Message-ID: <20220328064931.11612-1-biju.das.jz@bp.renesas.com> (raw) This patch series aims to support the MIPI DSI encoder found in the RZ/G2L SoC. It currently supports DSI mode only. This unit supports MIPI Alliance Specification for Display Serial Interface (DSI) Specification. This unit provides a solution for transmitting MIPI DSI compliant digital video and packets. Normative References are below. * MIPI Alliance Specification for Display Serial Interface Version 1.3.1 * MIPI Alliance Specification for D-PHY Version 2.1 The following are key features of this unit. * 1 channel * The number of Lane: 4-lane * Support up to Full HD (1920 × 1080), 60 fps (RGB888) * Maximum Bandwidth: 1.5 Gbps per lane * Support Output Data Format: RGB666 / RGB888 v1->v2: * Added full path for dsi-controller.yaml * Modeled DSI + D-PHY as single block and updated reg property * Fixed typo D_PHY->D-PHY * Updated description * Added interrupts and interrupt-names and updated the example * Driver rework based on dt-binding changes (DSI + D-PHY) as single block * Replaced link_mmio and phy_mmio with mmio in struct rzg2l_mipi_dsi * Replaced rzg2l_mipi_phy_write with rzg2l_mipi_dsi_phy_write and rzg2l_mipi_dsi_link_write * Replaced rzg2l_mipi_phy_read->rzg2l_mipi_dsi_link_read RFC->v1: * Added a ref to dsi-controller.yaml. * Added "depends on ARCH_RENESAS || COMPILE_TEST" on KCONFIG and dropped DRM as it is implied by DRM_BRIDGE * Used devm_reset_control_get_exclusive() for reset handle * Removed bool hsclkmode from struct rzg2l_mipi_dsi * Added error check for pm, using pm_runtime_resume_and_get() instead of pm_runtime_get_sync() * Added check for unsupported formats in rzg2l_mipi_dsi_host_attach() * Avoided read-modify-write stopping hsclock * Used devm_platform_ioremap_resource for resource allocation * Removed unnecessary assert call from probe and remove. * wrap the line after the PTR_ERR() in probe() * Updated reset failure messages in probe * Fixed the typo arstc->prstc * Made hex constants to lower case. RFC: * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-22-biju.das.jz@bp.renesas.com/ * https://patchwork.kernel.org/project/linux-renesas-soc/patch/20220112174612.10773-23-biju.das.jz@bp.renesas.com/ Biju Das (2): dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings drm: rcar-du: Add RZ/G2L DSI driver .../bindings/display/bridge/renesas,dsi.yaml | 175 +++++ drivers/gpu/drm/rcar-du/Kconfig | 8 + drivers/gpu/drm/rcar-du/Makefile | 1 + drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c | 686 ++++++++++++++++++ drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h | 149 ++++ 5 files changed, 1019 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_mipi_dsi_regs.h -- 2.17.1
next reply other threads:[~2022-03-28 6:49 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-28 6:49 Biju Das [this message] 2022-03-28 6:49 ` [PATCH v2 0/2] Add RZ/G2L DSI driver Biju Das 2022-03-28 6:49 ` [PATCH v2 1/2] dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings Biju Das 2022-03-28 6:49 ` Biju Das 2022-04-01 0:38 ` Rob Herring 2022-04-01 0:38 ` Rob Herring 2022-04-15 10:16 ` Laurent Pinchart 2022-04-15 10:16 ` Laurent Pinchart 2022-04-18 19:48 ` Biju Das 2022-04-18 19:48 ` Biju Das 2022-04-19 8:56 ` Geert Uytterhoeven 2022-04-19 8:56 ` Geert Uytterhoeven 2022-04-19 14:53 ` Biju Das 2022-04-19 14:53 ` Biju Das 2022-04-14 7:22 ` [PATCH v2 0/2] Add RZ/G2L DSI driver Biju Das 2022-04-14 7:22 ` Biju Das
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