* [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode
@ 2022-03-29 2:49 Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Andy Chiu @ 2022-03-29 2:49 UTC (permalink / raw)
To: kuba, radhey.shyam.pandey, robert.hancock, michal.simek, andrew
Cc: davem, pabeni, robh+dt, linux, netdev, devicetree, robh, Andy Chiu
The Ethernet driver use phy-handle to reference the PCS/PMA PHY. This
could be a problem if one wants to configure an external PHY via phylink,
since it use the same phandle to get the PHY. To fix this, introduce a
dedicated pcs-handle to point to the PCS/PMA PHY and deprecate the use
of pointing it with phy-handle. A similar use case of pcs-handle can be
seen on dpaa2 as well.
--- patch v5 ---
- Re-apply the v4 patch on the net tree.
- Describe the pcs-handle DT binding at ethernet-controller level.
--- patch v6 ---
- Remove "preferrably" to clearify usage of pcs_handle.
--- patch v7 ---
- Rebase the patch on latest net/master
Andy Chiu (4):
net: axienet: setup mdio unconditionally
net: axienet: factor out phy_node in struct axienet_local
dt-bindings: net: add pcs-handle attribute
net: axiemac: use a phandle to reference pcs_phy
.../bindings/net/ethernet-controller.yaml | 6 ++++
.../bindings/net/xilinx_axienet.txt | 8 ++++-
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 --
.../net/ethernet/xilinx/xilinx_axienet_main.c | 33 ++++++++++---------
4 files changed, 31 insertions(+), 18 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v7 net 1/4] net: axienet: setup mdio unconditionally
2022-03-29 2:49 [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
@ 2022-03-29 2:49 ` Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: Andy Chiu @ 2022-03-29 2:49 UTC (permalink / raw)
To: kuba, radhey.shyam.pandey, robert.hancock, michal.simek, andrew
Cc: davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Andy Chiu, Greentime Hu
The call to axienet_mdio_setup should not depend on whether "phy-node"
pressents on the DT. Besides, since `lp->phy_node` is used if PHY is in
SGMII or 100Base-X modes, move it into the if statement. And the next patch
will remove `lp->phy_node` from driver's private structure and do an
of_node_put on it right away after use since it is not used elsewhere.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index c7eb05e4a6bf..78a991bbbcf9 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2064,15 +2064,14 @@ static int axienet_probe(struct platform_device *pdev)
if (ret)
goto cleanup_clk;
- lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
- if (lp->phy_node) {
- ret = axienet_mdio_setup(lp);
- if (ret)
- dev_warn(&pdev->dev,
- "error registering MDIO bus: %d\n", ret);
- }
+ ret = axienet_mdio_setup(lp);
+ if (ret)
+ dev_warn(&pdev->dev,
+ "error registering MDIO bus: %d\n", ret);
+
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
+ lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
if (!lp->phy_node) {
dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v7 net 2/4] net: axienet: factor out phy_node in struct axienet_local
2022-03-29 2:49 [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
@ 2022-03-29 2:49 ` Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
3 siblings, 0 replies; 10+ messages in thread
From: Andy Chiu @ 2022-03-29 2:49 UTC (permalink / raw)
To: kuba, radhey.shyam.pandey, robert.hancock, michal.simek, andrew
Cc: davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Andy Chiu, Greentime Hu
the struct member `phy_node` of struct axienet_local is not used by the
driver anymore after initialization. It might be a remnent of old code
and could be removed.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 --
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 13 +++++--------
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index 0f9c88dd1a4a..d5c1e5c4a508 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -433,8 +433,6 @@ struct axienet_local {
struct net_device *ndev;
struct device *dev;
- struct device_node *phy_node;
-
struct phylink *phylink;
struct phylink_config phylink_config;
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 78a991bbbcf9..3daef64a85bd 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2071,17 +2071,19 @@ static int axienet_probe(struct platform_device *pdev)
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
- lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
- if (!lp->phy_node) {
+ np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ if (!np) {
dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
goto cleanup_mdio;
}
- lp->pcs_phy = of_mdio_find_device(lp->phy_node);
+ lp->pcs_phy = of_mdio_find_device(np);
if (!lp->pcs_phy) {
ret = -EPROBE_DEFER;
+ of_node_put(np);
goto cleanup_mdio;
}
+ of_node_put(np);
lp->pcs.ops = &axienet_pcs_ops;
lp->pcs.poll = true;
}
@@ -2124,8 +2126,6 @@ static int axienet_probe(struct platform_device *pdev)
put_device(&lp->pcs_phy->dev);
if (lp->mii_bus)
axienet_mdio_teardown(lp);
- of_node_put(lp->phy_node);
-
cleanup_clk:
clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks);
clk_disable_unprepare(lp->axi_clk);
@@ -2154,9 +2154,6 @@ static int axienet_remove(struct platform_device *pdev)
clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks);
clk_disable_unprepare(lp->axi_clk);
- of_node_put(lp->phy_node);
- lp->phy_node = NULL;
-
free_netdev(ndev);
return 0;
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute
2022-03-29 2:49 [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
@ 2022-03-29 2:49 ` Andy Chiu
2022-04-04 18:08 ` Rob Herring
2022-03-29 2:49 ` [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
3 siblings, 1 reply; 10+ messages in thread
From: Andy Chiu @ 2022-03-29 2:49 UTC (permalink / raw)
To: kuba, radhey.shyam.pandey, robert.hancock, michal.simek, andrew
Cc: davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Andy Chiu, Greentime Hu
Document the new pcs-handle attribute to support connecting to an
external PHY. For Xilinx's AXI Ethernet, this is used when the core
operates in SGMII or 1000Base-X modes and links through the internal
PCS/PMA PHY.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
---
.../devicetree/bindings/net/ethernet-controller.yaml | 6 ++++++
Documentation/devicetree/bindings/net/xilinx_axienet.txt | 8 +++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 817794e56227..4f15463611f8 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -106,6 +106,12 @@ properties:
phy-mode:
$ref: "#/properties/phy-connection-type"
+ pcs-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Specifies a reference to a node representing a PCS PHY device on a MDIO
+ bus to link with an external PHY (phy-handle) if exists.
+
phy-handle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..1aa4c6006cd0 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -26,7 +26,8 @@ Required properties:
specified, the TX/RX DMA interrupts should be on that node
instead, and only the Ethernet core interrupt is optionally
specified here.
-- phy-handle : Should point to the external phy device.
+- phy-handle : Should point to the external phy device if exists. Pointing
+ this to the PCS/PMA PHY is deprecated and should be avoided.
See ethernet.txt file in the same directory.
- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware
@@ -68,6 +69,11 @@ Optional properties:
required through the core's MDIO interface (i.e. always,
unless the PHY is accessed through a different bus).
+ - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+ modes, where "pcs-handle" should be used to point
+ to the PCS/PMA PHY, and "phy-handle" should point to an
+ external PHY if exists.
+
Example:
axi_ethernet_eth: ethernet@40c00000 {
compatible = "xlnx,axi-ethernet-1.00.a";
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-29 2:49 [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
` (2 preceding siblings ...)
2022-03-29 2:49 ` [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
@ 2022-03-29 2:49 ` Andy Chiu
2022-03-29 22:56 ` Jakub Kicinski
3 siblings, 1 reply; 10+ messages in thread
From: Andy Chiu @ 2022-03-29 2:49 UTC (permalink / raw)
To: kuba, radhey.shyam.pandey, robert.hancock, michal.simek, andrew
Cc: davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Andy Chiu, Greentime Hu
In some SGMII use cases where both a fixed link external PHY and the
internal PCS/PMA PHY need to be configured, we should explicitly use a
phandle "pcs-phy" to get the reference to the PCS/PMA PHY. Otherwise, the
driver would use "phy-handle" in the DT as the reference to both the
external and the internal PCS/PMA PHY.
In other cases where the core is connected to a SFP cage, we could still
point phy-handle to the intenal PCS/PMA PHY, and let the driver connect
to the SFP module, if exist, via phylink.
Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode)
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 3daef64a85bd..d6fc3f7acdf0 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2071,9 +2071,16 @@ static int axienet_probe(struct platform_device *pdev)
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
- np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0);
if (!np) {
- dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
+ /* Deprecated: Always use "pcs-handle" for pcs_phy.
+ * Falling back to "phy-handle" here is only for
+ * backward compatibility with old device trees.
+ */
+ np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ }
+ if (!np) {
+ dev_err(&pdev->dev, "pcs-handle (preferred) or phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
goto cleanup_mdio;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-29 2:49 ` [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
@ 2022-03-29 22:56 ` Jakub Kicinski
2022-03-30 1:25 ` Andrew Lunn
0 siblings, 1 reply; 10+ messages in thread
From: Jakub Kicinski @ 2022-03-29 22:56 UTC (permalink / raw)
To: andrew
Cc: Andy Chiu, radhey.shyam.pandey, robert.hancock, michal.simek,
davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Greentime Hu
On Tue, 29 Mar 2022 10:49:21 +0800 Andy Chiu wrote:
> In some SGMII use cases where both a fixed link external PHY and the
> internal PCS/PMA PHY need to be configured, we should explicitly use a
> phandle "pcs-phy" to get the reference to the PCS/PMA PHY. Otherwise, the
> driver would use "phy-handle" in the DT as the reference to both the
> external and the internal PCS/PMA PHY.
>
> In other cases where the core is connected to a SFP cage, we could still
> point phy-handle to the intenal PCS/PMA PHY, and let the driver connect
> to the SFP module, if exist, via phylink.
>
> Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode)
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> Reviewed-by: Robert Hancock <robert.hancock@calian.com>
I'm not sure if this is a fix or adding support for a new configuration.
Andrew, WDYT?
If it really is a fix and needs to be backported we should take patch 2
out of this series, and post it separately later. Refactoring does not
belong in stable trees.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-29 22:56 ` Jakub Kicinski
@ 2022-03-30 1:25 ` Andrew Lunn
2022-03-30 1:48 ` Jakub Kicinski
0 siblings, 1 reply; 10+ messages in thread
From: Andrew Lunn @ 2022-03-30 1:25 UTC (permalink / raw)
To: Jakub Kicinski
Cc: Andy Chiu, radhey.shyam.pandey, robert.hancock, michal.simek,
davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Greentime Hu
On Tue, Mar 29, 2022 at 03:56:09PM -0700, Jakub Kicinski wrote:
> On Tue, 29 Mar 2022 10:49:21 +0800 Andy Chiu wrote:
> > In some SGMII use cases where both a fixed link external PHY and the
> > internal PCS/PMA PHY need to be configured, we should explicitly use a
> > phandle "pcs-phy" to get the reference to the PCS/PMA PHY. Otherwise, the
> > driver would use "phy-handle" in the DT as the reference to both the
> > external and the internal PCS/PMA PHY.
> >
> > In other cases where the core is connected to a SFP cage, we could still
> > point phy-handle to the intenal PCS/PMA PHY, and let the driver connect
> > to the SFP module, if exist, via phylink.
> >
> > Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode)
> > Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> > Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> > Reviewed-by: Robert Hancock <robert.hancock@calian.com>
>
> I'm not sure if this is a fix or adding support for a new configuration.
> Andrew, WDYT?
I guess it fails this stable rule:
It must fix a problem that causes a build error (but not for things
marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
security issue, or some “oh, that’s not good” issue. In short,
something critical.
So this probably should be for net-next.
Andrew
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-30 1:25 ` Andrew Lunn
@ 2022-03-30 1:48 ` Jakub Kicinski
2022-03-30 8:50 ` Andy Chiu
0 siblings, 1 reply; 10+ messages in thread
From: Jakub Kicinski @ 2022-03-30 1:48 UTC (permalink / raw)
To: Andrew Lunn, Andy Chiu
Cc: radhey.shyam.pandey, robert.hancock, michal.simek, davem, pabeni,
robh+dt, linux, netdev, devicetree, robh, Greentime Hu
On Wed, 30 Mar 2022 03:25:15 +0200 Andrew Lunn wrote:
> > I'm not sure if this is a fix or adding support for a new configuration.
> > Andrew, WDYT?
>
> I guess it fails this stable rule:
>
> It must fix a problem that causes a build error (but not for things
> marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
> security issue, or some “oh, that’s not good” issue. In short,
> something critical.
>
> So this probably should be for net-next.
Okay, thanks! Just to spell it out this means you'll need to hold off
with reposting, Andy, until net-next re-opens (which means until
5.18-rc1 kernel version is tagged by Linus, see the netdev-FAQ).
You should also drop the Fixes tag from patch 4. The change will make
it to Linux 5.19 and won't be backported to stable.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-30 1:48 ` Jakub Kicinski
@ 2022-03-30 8:50 ` Andy Chiu
0 siblings, 0 replies; 10+ messages in thread
From: Andy Chiu @ 2022-03-30 8:50 UTC (permalink / raw)
To: Jakub Kicinski
Cc: Andrew Lunn, radhey.shyam.pandey, Robert Hancock, michal.simek,
davem, pabeni, robh+dt, linux, netdev, devicetree, robh,
Greentime Hu
thanks for explaining this,
I will make the change accordingly and post it to net-next when available.
Andy
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute
2022-03-29 2:49 ` [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
@ 2022-04-04 18:08 ` Rob Herring
0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2022-04-04 18:08 UTC (permalink / raw)
To: Andy Chiu
Cc: netdev, pabeni, robert.hancock, davem, robh+dt, devicetree,
linux, kuba, michal.simek, radhey.shyam.pandey, Greentime Hu,
andrew
On Tue, 29 Mar 2022 10:49:20 +0800, Andy Chiu wrote:
> Document the new pcs-handle attribute to support connecting to an
> external PHY. For Xilinx's AXI Ethernet, this is used when the core
> operates in SGMII or 1000Base-X modes and links through the internal
> PCS/PMA PHY.
>
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> ---
> .../devicetree/bindings/net/ethernet-controller.yaml | 6 ++++++
> Documentation/devicetree/bindings/net/xilinx_axienet.txt | 8 +++++++-
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-04-04 21:17 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-29 2:49 [PATCH v7 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
2022-03-29 2:49 ` [PATCH v7 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
2022-04-04 18:08 ` Rob Herring
2022-03-29 2:49 ` [PATCH v7 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
2022-03-29 22:56 ` Jakub Kicinski
2022-03-30 1:25 ` Andrew Lunn
2022-03-30 1:48 ` Jakub Kicinski
2022-03-30 8:50 ` Andy Chiu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.