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From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Subject: [PATCH v7 1/9] drm/i915/gt: use engine instance directly for offset
Date: Fri,  1 Apr 2022 18:07:43 +0530	[thread overview]
Message-ID: <20220401123751.27771-2-ramalingam.c@intel.com> (raw)
In-Reply-To: <20220401123751.27771-1-ramalingam.c@intel.com>

To make it uniform across copy and clear, use the engine offset directly
to calculate the offset in the cmd forming for emit_clear.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 950fd6da146c..9d852a570400 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -613,15 +613,13 @@ intel_context_migrate_copy(struct intel_context *ce,
 	return err;
 }
 
-static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
+static int emit_clear(struct i915_request *rq, u32 offset, int size, u32 value)
 {
 	const int ver = GRAPHICS_VER(rq->engine->i915);
 	u32 *cs;
 
 	GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
 
-	offset += (u64)rq->engine->instance << 32;
-
 	cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
 	if (IS_ERR(cs))
 		return PTR_ERR(cs);
@@ -631,17 +629,16 @@ static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
-		*cs++ = upper_32_bits(offset);
+		*cs++ = offset;
+		*cs++ = rq->engine->instance;
 		*cs++ = value;
 		*cs++ = MI_NOOP;
 	} else {
-		GEM_BUG_ON(upper_32_bits(offset));
 		*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
+		*cs++ = offset;
 		*cs++ = value;
 	}
 
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>,
	dri-devel <dri-devel@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH v7 1/9] drm/i915/gt: use engine instance directly for offset
Date: Fri,  1 Apr 2022 18:07:43 +0530	[thread overview]
Message-ID: <20220401123751.27771-2-ramalingam.c@intel.com> (raw)
In-Reply-To: <20220401123751.27771-1-ramalingam.c@intel.com>

To make it uniform across copy and clear, use the engine offset directly
to calculate the offset in the cmd forming for emit_clear.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 950fd6da146c..9d852a570400 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -613,15 +613,13 @@ intel_context_migrate_copy(struct intel_context *ce,
 	return err;
 }
 
-static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
+static int emit_clear(struct i915_request *rq, u32 offset, int size, u32 value)
 {
 	const int ver = GRAPHICS_VER(rq->engine->i915);
 	u32 *cs;
 
 	GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
 
-	offset += (u64)rq->engine->instance << 32;
-
 	cs = intel_ring_begin(rq, ver >= 8 ? 8 : 6);
 	if (IS_ERR(cs))
 		return PTR_ERR(cs);
@@ -631,17 +629,16 @@ static int emit_clear(struct i915_request *rq, u64 offset, int size, u32 value)
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
-		*cs++ = upper_32_bits(offset);
+		*cs++ = offset;
+		*cs++ = rq->engine->instance;
 		*cs++ = value;
 		*cs++ = MI_NOOP;
 	} else {
-		GEM_BUG_ON(upper_32_bits(offset));
 		*cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
 		*cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
 		*cs++ = 0;
 		*cs++ = size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
-		*cs++ = lower_32_bits(offset);
+		*cs++ = offset;
 		*cs++ = value;
 	}
 
-- 
2.20.1


  reply	other threads:[~2022-04-01 12:37 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-01 12:37 [PATCH v7 0/9] drm/i915/ttm: Evict and restore of compressed object Ramalingam C
2022-04-01 12:37 ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` Ramalingam C [this message]
2022-04-01 12:37   ` [Intel-gfx] [PATCH v7 1/9] drm/i915/gt: use engine instance directly for offset Ramalingam C
2022-04-01 12:37 ` [PATCH v7 2/9] drm/i915/gt: Use XY_FAST_COLOR_BLT to clear obj on graphics ver 12+ Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 3/9] drm/i915/gt: Optimize the migration and clear loop Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-05  9:43   ` Balasubramani Vivekanandan
2022-04-05  9:43     ` [Intel-gfx] " Balasubramani Vivekanandan
2022-04-01 12:37 ` [PATCH v7 4/9] drm/i915/gt: Clear compress metadata for Flat-ccs objects Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 5/9] drm/i915/selftest_migrate: Consider the possible roundup of size Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 6/9] drm/i915/selftest_migrate: Check CCS meta data clear Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 7/9] drm/ttm: Add a parameter to add extra pages into ttm_tt Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 14:28   ` Ramalingam C
2022-04-01 14:28     ` [Intel-gfx] " Ramalingam C
2022-04-01 14:31     ` Christian König
2022-04-01 14:31       ` [Intel-gfx] " Christian König
2022-04-02  3:02       ` Ramalingam C
2022-04-02  3:02         ` [Intel-gfx] " Ramalingam C
2022-04-13  8:28         ` Joonas Lahtinen
2022-04-13  8:28           ` [Intel-gfx] " Joonas Lahtinen
2022-04-13 10:03           ` Ramalingam C
2022-04-13 10:03             ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 8/9] drm/i915/gem: Add extra pages in ttm_tt for ccs data Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 12:37 ` [PATCH v7 9/9] drm/i915/migrate: Evict and restore the flatccs capable lmem obj Ramalingam C
2022-04-01 12:37   ` [Intel-gfx] " Ramalingam C
2022-04-01 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ttm: Evict and restore of compressed object (rev7) Patchwork
2022-04-01 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-01 14:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-01 15:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-04-01 18:49   ` Ramalingam C
  -- strict thread matches above, loose matches on Subject: below --
2022-03-28 19:07 [PATCH v7 0/9] drm/i915/ttm: Evict and restore of compressed object Ramalingam C
2022-03-28 19:07 ` [PATCH v7 1/9] drm/i915/gt: use engine instance directly for offset Ramalingam C
2022-03-29  6:27   ` Hellstrom, Thomas

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