From: "Pali Rohár" <pali@kernel.org>
To: Priyanka Jain <priyanka.jain@nxp.com>,
Qiang Zhao <qiang.zhao@nxp.com>,
Shengzhou Liu <Shengzhou.Liu@nxp.com>,
Sinan Akman <sinan@writeme.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH 08/11] board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address
Date: Thu, 7 Apr 2022 12:16:21 +0200 [thread overview]
Message-ID: <20220407101624.15850-9-pali@kernel.org> (raw)
In-Reply-To: <20220407101624.15850-1-pali@kernel.org>
Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.
Same macros are used in U-Boot board code when reading information from
boot i2c data.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
include/configs/p1_p2_rdb_pc.h | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 7b5a8dd9e509..cb3b1a1da05d 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -568,28 +568,28 @@
#ifdef __SW_BOOT_NOR
#define __NOR_RST_CMD \
-norboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NOR 1; \
-i2c mw 18 3 __SW_BOOT_MASK 1; reset
+norboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NOR 1; \
+i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif
#ifdef __SW_BOOT_SPI
#define __SPI_RST_CMD \
-spiboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SPI 1; \
-i2c mw 18 3 __SW_BOOT_MASK 1; reset
+spiboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SPI 1; \
+i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif
#ifdef __SW_BOOT_SD
#define __SD_RST_CMD \
-sdboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_SD 1; \
-i2c mw 18 3 __SW_BOOT_MASK 1; reset
+sdboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_SD 1; \
+i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif
#ifdef __SW_BOOT_NAND
#define __NAND_RST_CMD \
-nandboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_NAND 1; \
-i2c mw 18 3 __SW_BOOT_MASK 1; reset
+nandboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_NAND 1; \
+i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif
#ifdef __SW_BOOT_PCIE
#define __PCIE_RST_CMD \
-pciboot=i2c dev 1; i2c mw 18 1 __SW_BOOT_PCIE 1; \
-i2c mw 18 3 __SW_BOOT_MASK 1; reset
+pciboot=i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 __SW_BOOT_PCIE 1; \
+i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -616,9 +616,9 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset
"nandbootaddr=100000\0" \
"nandfdtaddr=80000\0" \
"ramdisk_size=120000\0" \
-"map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \
-"map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \
__VSCFW_ADDR \
+"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 02 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
+"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 00 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
__stringify(__NOR_RST_CMD)"\0" \
__stringify(__SPI_RST_CMD)"\0" \
__stringify(__SD_RST_CMD)"\0" \
--
2.20.1
next prev parent reply other threads:[~2022-04-07 10:20 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-07 10:16 [PATCH 00/11] board: freescale: p1_p2_rdb_pc: Various cleanups and fixes Pali Rohár
2022-04-07 10:16 ` [PATCH 01/11] board: freescale: p1_p2_rdb_pc: Do not hang in checkboard() Pali Rohár
2022-04-07 10:16 ` [PATCH 02/11] board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations Pali Rohár
2022-04-07 10:16 ` [PATCH 03/11] board: freescale: p1_p2_rdb_pc: Fix parsing negated upper 4 bits from boot input data Pali Rohár
2022-04-25 14:12 ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Fix parsing inverted " Pali Rohár
2022-06-16 9:00 ` Peng Fan (OSS)
2022-06-16 12:37 ` [PATCH v3] " Pali Rohár
2022-06-23 13:04 ` Pali Rohár
2022-07-03 12:39 ` Pali Rohár
2022-07-08 22:49 ` Pali Rohár
2022-07-08 23:10 ` Tom Rini
2022-07-23 9:48 ` Pali Rohár
2022-04-07 10:16 ` [PATCH 04/11] board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO Pali Rohár
2022-04-07 10:16 ` [PATCH 05/11] board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map Pali Rohár
2022-04-07 10:16 ` [PATCH 06/11] board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place Pali Rohár
2022-04-07 10:16 ` [PATCH 07/11] board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr Pali Rohár
2022-04-07 10:16 ` Pali Rohár [this message]
2022-04-07 10:16 ` [PATCH 09/11] board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banks Pali Rohár
2022-04-07 10:16 ` [PATCH 10/11] board: freescale: p1_p2_rdb_pc: Move BootROM change source macros to p1_p2_bootrom.h Pali Rohár
2022-04-25 14:48 ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h Pali Rohár
2022-05-26 6:08 ` Priyanka Jain (OSS)
2022-05-26 8:32 ` Pali Rohár
2022-05-26 8:52 ` [PATCH v3] " Pali Rohár
2022-06-02 22:02 ` Pali Rohár
2022-04-07 10:16 ` [PATCH 11/11] board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot Pali Rohár
2022-04-25 14:50 ` [PATCH v2] " Pali Rohár
2022-06-16 9:01 ` Peng Fan (OSS)
2022-06-23 13:43 ` Pali Rohár
2022-07-03 12:38 ` Pali Rohár
[not found] ` <20220708224344.jswbjxp3tdnfnmlp@pali>
2022-07-08 23:12 ` Tom Rini
2022-07-21 22:20 ` Pali Rohár
2022-08-01 13:01 ` Pali Rohár
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