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From: "Pali Rohár" <pali@kernel.org>
To: Priyanka Jain <priyanka.jain@nxp.com>,
	Qiang Zhao <qiang.zhao@nxp.com>,
	Shengzhou Liu <Shengzhou.Liu@nxp.com>,
	Sinan Akman <sinan@writeme.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH 11/11] board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot
Date: Thu,  7 Apr 2022 12:16:24 +0200	[thread overview]
Message-ID: <20220407101624.15850-12-pali@kernel.org> (raw)
In-Reply-To: <20220407101624.15850-1-pali@kernel.org>

All *boot env commands overrides default BootROM boot location via i2c.
BootROM then starts booting U-Boot from this specified location instead of
the default one.

Add new env command defboot which reverts BootROM boot location to the
default value, which in most cases is configurable by HW DIP switches.

And add new env commands norlowerboot, norupperboot, sd2boot to boot from
other locations. norlowerboot would instruct BootROM to boot from lower NOR
bank, norupperboot from upper NOR bank and sd2boot from SD card with
alternative configuration.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 include/configs/p1_p2_bootrom.h | 14 +++++++++++++
 include/configs/p1_p2_rdb_pc.h  | 37 +++++++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)

diff --git a/include/configs/p1_p2_bootrom.h b/include/configs/p1_p2_bootrom.h
index a1f61b788cf7..d1e91049606b 100644
--- a/include/configs/p1_p2_bootrom.h
+++ b/include/configs/p1_p2_bootrom.h
@@ -15,6 +15,14 @@
 #define CHANGE_BOOTROM_SOURCE_DEF_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK)
 #endif
 
+#ifdef __SW_BOOT_NOR_BANK_LO
+#define CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_NOR_BANK_MASK)
+#endif
+
+#ifdef __SW_BOOT_NOR_BANK_UP
+#define CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_NOR_BANK_MASK)
+#endif
+
 #ifdef __SW_BOOT_SPI
 #define CHANGE_BOOTROM_SOURCE_SPI_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)
 #endif
@@ -23,6 +31,10 @@
 #define CHANGE_BOOTROM_SOURCE_SD_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SD, __SW_BOOT_MASK)
 #endif
 
+#ifdef __SW_BOOT_SD2
+#define CHANGE_BOOTROM_SOURCE_SD2_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK)
+#endif
+
 #ifdef __SW_BOOT_NAND
 #define CHANGE_BOOTROM_SOURCE_NAND_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)
 #endif
@@ -30,3 +42,5 @@
 #ifdef __SW_BOOT_PCIE
 #define CHANGE_BOOTROM_SOURCE_PCIE_CMD CHANGE_BOOTROM_SOURCE_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK)
 #endif
+
+#define CHANGE_BOOTROM_SOURCE_DEF_CMD CHANGE_BOOTROM_SOURCE_CMD(0x00, 0xff)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index d41b31081017..ac8199a88aa0 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -25,6 +25,9 @@
 #define __SW_NOR_BANK_MASK	0xfd
 #define __SW_NOR_BANK_UP	0x00
 #define __SW_NOR_BANK_LO	0x02
+#define __SW_BOOT_NOR_BANK_UP	0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO	0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK	0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE	(256 << 10)
 #endif
 
@@ -54,6 +57,9 @@
 #define __SW_NOR_BANK_MASK	0xfd
 #define __SW_NOR_BANK_UP	0x00
 #define __SW_NOR_BANK_LO	0x02
+#define __SW_BOOT_NOR_BANK_UP	0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO	0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK	0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE	(256 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -73,6 +79,9 @@
 #define __SW_NOR_BANK_MASK	0xfd
 #define __SW_NOR_BANK_UP	0x00
 #define __SW_NOR_BANK_LO	0x02
+#define __SW_BOOT_NOR_BANK_UP	0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */
+#define __SW_BOOT_NOR_BANK_LO	0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */
+#define __SW_BOOT_NOR_BANK_MASK	0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */
 #define CONFIG_SYS_L2_SIZE	(512 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -595,6 +604,18 @@
 #define __NOR_RST_CMD ""
 #endif
 
+#ifdef CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD
+#define __NOR_LOWER_RST_CMD "norlowerboot="__stringify(CHANGE_BOOTROM_SOURCE_LOWER_NOR_BANK_CMD)"; reset\0"
+#else
+#define __NOR_LOWER_RST_CMD ""
+#endif
+
+#ifdef CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD
+#define __NOR_UPPER_RST_CMD "norupperboot="__stringify(CHANGE_BOOTROM_SOURCE_UPPER_NOR_BANK_CMD)"; reset\0"
+#else
+#define __NOR_UPPER_RST_CMD ""
+#endif
+
 #ifdef CHANGE_BOOTROM_SOURCE_SPI_CMD
 #define __SPI_RST_CMD "spiboot="__stringify(CHANGE_BOOTROM_SOURCE_SPI_CMD)"; reset\0"
 #else
@@ -607,6 +628,12 @@
 #define __SD_RST_CMD ""
 #endif
 
+#ifdef CHANGE_BOOTROM_SOURCE_SD2_CMD
+#define __SD2_RST_CMD "sd2boot="__stringify(CHANGE_BOOTROM_SOURCE_SD2_CMD)"; reset\0"
+#else
+#define __SD2_RST_CMD ""
+#endif
+
 #ifdef CHANGE_BOOTROM_SOURCE_NAND_CMD
 #define __NAND_RST_CMD "nandboot="__stringify(CHANGE_BOOTROM_SOURCE_NAND_CMD)"; reset\0"
 #else
@@ -619,6 +646,12 @@
 #define __PCIE_RST_CMD ""
 #endif
 
+#ifdef CHANGE_BOOTROM_SOURCE_DEF_CMD
+#define __DEF_RST_CMD "defboot="__stringify(CHANGE_BOOTROM_SOURCE_DEF_CMD)"; reset\0"
+#else
+#define __DEF_RST_CMD ""
+#endif
+
 #define	CONFIG_EXTRA_ENV_SETTINGS	\
 "netdev=eth0\0"	\
 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"	\
@@ -647,10 +680,14 @@ __VSCFW_ADDR	\
 __MAP_NOR_LOWER_CMD	\
 __MAP_NOR_UPPER_CMD	\
 __NOR_RST_CMD	\
+__NOR_LOWER_RST_CMD	\
+__NOR_UPPER_RST_CMD	\
 __SPI_RST_CMD	\
 __SD_RST_CMD	\
+__SD2_RST_CMD	\
 __NAND_RST_CMD	\
 __PCIE_RST_CMD	\
+__DEF_RST_CMD	\
 ""
 
 #define CONFIG_USB_FAT_BOOT	\
-- 
2.20.1


  parent reply	other threads:[~2022-04-07 10:19 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-07 10:16 [PATCH 00/11] board: freescale: p1_p2_rdb_pc: Various cleanups and fixes Pali Rohár
2022-04-07 10:16 ` [PATCH 01/11] board: freescale: p1_p2_rdb_pc: Do not hang in checkboard() Pali Rohár
2022-04-07 10:16 ` [PATCH 02/11] board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations Pali Rohár
2022-04-07 10:16 ` [PATCH 03/11] board: freescale: p1_p2_rdb_pc: Fix parsing negated upper 4 bits from boot input data Pali Rohár
2022-04-25 14:12   ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Fix parsing inverted " Pali Rohár
2022-06-16  9:00     ` Peng Fan (OSS)
2022-06-16 12:37       ` [PATCH v3] " Pali Rohár
2022-06-23 13:04         ` Pali Rohár
2022-07-03 12:39           ` Pali Rohár
2022-07-08 22:49             ` Pali Rohár
2022-07-08 23:10               ` Tom Rini
2022-07-23  9:48                 ` Pali Rohár
2022-04-07 10:16 ` [PATCH 04/11] board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO Pali Rohár
2022-04-07 10:16 ` [PATCH 05/11] board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map Pali Rohár
2022-04-07 10:16 ` [PATCH 06/11] board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place Pali Rohár
2022-04-07 10:16 ` [PATCH 07/11] board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr Pali Rohár
2022-04-07 10:16 ` [PATCH 08/11] board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address Pali Rohár
2022-04-07 10:16 ` [PATCH 09/11] board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banks Pali Rohár
2022-04-07 10:16 ` [PATCH 10/11] board: freescale: p1_p2_rdb_pc: Move BootROM change source macros to p1_p2_bootrom.h Pali Rohár
2022-04-25 14:48   ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h Pali Rohár
2022-05-26  6:08     ` Priyanka Jain (OSS)
2022-05-26  8:32       ` Pali Rohár
2022-05-26  8:52         ` [PATCH v3] " Pali Rohár
2022-06-02 22:02           ` Pali Rohár
2022-04-07 10:16 ` Pali Rohár [this message]
2022-04-25 14:50   ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot Pali Rohár
2022-06-16  9:01     ` Peng Fan (OSS)
2022-06-23 13:43       ` Pali Rohár
2022-07-03 12:38         ` Pali Rohár
     [not found]           ` <20220708224344.jswbjxp3tdnfnmlp@pali>
2022-07-08 23:12             ` Tom Rini
2022-07-21 22:20               ` Pali Rohár
2022-08-01 13:01                 ` Pali Rohár

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